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0001 /*
0002  * Copyright © 2007 Dave Mueller
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice (including the next
0012  * paragraph) shall be included in all copies or substantial portions of the
0013  * Software.
0014  *
0015  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0016  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0017  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0018  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
0019  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0020  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
0021  * IN THE SOFTWARE.
0022  *
0023  * Authors:
0024  *    Dave Mueller <dave.mueller@gmx.ch>
0025  *
0026  */
0027 
0028 #include "intel_display_types.h"
0029 #include "intel_dvo_dev.h"
0030 
0031 /* register definitions according to the TFP410 data sheet */
0032 #define TFP410_VID      0x014C
0033 #define TFP410_DID      0x0410
0034 
0035 #define TFP410_VID_LO       0x00
0036 #define TFP410_VID_HI       0x01
0037 #define TFP410_DID_LO       0x02
0038 #define TFP410_DID_HI       0x03
0039 #define TFP410_REV      0x04
0040 
0041 #define TFP410_CTL_1        0x08
0042 #define TFP410_CTL_1_TDIS   (1<<6)
0043 #define TFP410_CTL_1_VEN    (1<<5)
0044 #define TFP410_CTL_1_HEN    (1<<4)
0045 #define TFP410_CTL_1_DSEL   (1<<3)
0046 #define TFP410_CTL_1_BSEL   (1<<2)
0047 #define TFP410_CTL_1_EDGE   (1<<1)
0048 #define TFP410_CTL_1_PD     (1<<0)
0049 
0050 #define TFP410_CTL_2        0x09
0051 #define TFP410_CTL_2_VLOW   (1<<7)
0052 #define TFP410_CTL_2_MSEL_MASK  (0x7<<4)
0053 #define TFP410_CTL_2_MSEL   (1<<4)
0054 #define TFP410_CTL_2_TSEL   (1<<3)
0055 #define TFP410_CTL_2_RSEN   (1<<2)
0056 #define TFP410_CTL_2_HTPLG  (1<<1)
0057 #define TFP410_CTL_2_MDI    (1<<0)
0058 
0059 #define TFP410_CTL_3        0x0A
0060 #define TFP410_CTL_3_DK_MASK    (0x7<<5)
0061 #define TFP410_CTL_3_DK     (1<<5)
0062 #define TFP410_CTL_3_DKEN   (1<<4)
0063 #define TFP410_CTL_3_CTL_MASK   (0x7<<1)
0064 #define TFP410_CTL_3_CTL    (1<<1)
0065 
0066 #define TFP410_USERCFG      0x0B
0067 
0068 #define TFP410_DE_DLY       0x32
0069 
0070 #define TFP410_DE_CTL       0x33
0071 #define TFP410_DE_CTL_DEGEN (1<<6)
0072 #define TFP410_DE_CTL_VSPOL (1<<5)
0073 #define TFP410_DE_CTL_HSPOL (1<<4)
0074 #define TFP410_DE_CTL_DEDLY8    (1<<0)
0075 
0076 #define TFP410_DE_TOP       0x34
0077 
0078 #define TFP410_DE_CNT_LO    0x36
0079 #define TFP410_DE_CNT_HI    0x37
0080 
0081 #define TFP410_DE_LIN_LO    0x38
0082 #define TFP410_DE_LIN_HI    0x39
0083 
0084 #define TFP410_H_RES_LO     0x3A
0085 #define TFP410_H_RES_HI     0x3B
0086 
0087 #define TFP410_V_RES_LO     0x3C
0088 #define TFP410_V_RES_HI     0x3D
0089 
0090 struct tfp410_priv {
0091     bool quiet;
0092 };
0093 
0094 static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
0095 {
0096     struct tfp410_priv *tfp = dvo->dev_priv;
0097     struct i2c_adapter *adapter = dvo->i2c_bus;
0098     u8 out_buf[2];
0099     u8 in_buf[2];
0100 
0101     struct i2c_msg msgs[] = {
0102         {
0103             .addr = dvo->slave_addr,
0104             .flags = 0,
0105             .len = 1,
0106             .buf = out_buf,
0107         },
0108         {
0109             .addr = dvo->slave_addr,
0110             .flags = I2C_M_RD,
0111             .len = 1,
0112             .buf = in_buf,
0113         }
0114     };
0115 
0116     out_buf[0] = addr;
0117     out_buf[1] = 0;
0118 
0119     if (i2c_transfer(adapter, msgs, 2) == 2) {
0120         *ch = in_buf[0];
0121         return true;
0122     }
0123 
0124     if (!tfp->quiet) {
0125         DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
0126               addr, adapter->name, dvo->slave_addr);
0127     }
0128     return false;
0129 }
0130 
0131 static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
0132 {
0133     struct tfp410_priv *tfp = dvo->dev_priv;
0134     struct i2c_adapter *adapter = dvo->i2c_bus;
0135     u8 out_buf[2];
0136     struct i2c_msg msg = {
0137         .addr = dvo->slave_addr,
0138         .flags = 0,
0139         .len = 2,
0140         .buf = out_buf,
0141     };
0142 
0143     out_buf[0] = addr;
0144     out_buf[1] = ch;
0145 
0146     if (i2c_transfer(adapter, &msg, 1) == 1)
0147         return true;
0148 
0149     if (!tfp->quiet) {
0150         DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
0151               addr, adapter->name, dvo->slave_addr);
0152     }
0153 
0154     return false;
0155 }
0156 
0157 static int tfp410_getid(struct intel_dvo_device *dvo, int addr)
0158 {
0159     u8 ch1, ch2;
0160 
0161     if (tfp410_readb(dvo, addr+0, &ch1) &&
0162         tfp410_readb(dvo, addr+1, &ch2))
0163         return ((ch2 << 8) & 0xFF00) | (ch1 & 0x00FF);
0164 
0165     return -1;
0166 }
0167 
0168 /* Ti TFP410 driver for chip on i2c bus */
0169 static bool tfp410_init(struct intel_dvo_device *dvo,
0170             struct i2c_adapter *adapter)
0171 {
0172     /* this will detect the tfp410 chip on the specified i2c bus */
0173     struct tfp410_priv *tfp;
0174     int id;
0175 
0176     tfp = kzalloc(sizeof(struct tfp410_priv), GFP_KERNEL);
0177     if (tfp == NULL)
0178         return false;
0179 
0180     dvo->i2c_bus = adapter;
0181     dvo->dev_priv = tfp;
0182     tfp->quiet = true;
0183 
0184     if ((id = tfp410_getid(dvo, TFP410_VID_LO)) != TFP410_VID) {
0185         DRM_DEBUG_KMS("tfp410 not detected got VID %X: from %s "
0186                 "Slave %d.\n",
0187               id, adapter->name, dvo->slave_addr);
0188         goto out;
0189     }
0190 
0191     if ((id = tfp410_getid(dvo, TFP410_DID_LO)) != TFP410_DID) {
0192         DRM_DEBUG_KMS("tfp410 not detected got DID %X: from %s "
0193                 "Slave %d.\n",
0194               id, adapter->name, dvo->slave_addr);
0195         goto out;
0196     }
0197     tfp->quiet = false;
0198     return true;
0199 out:
0200     kfree(tfp);
0201     return false;
0202 }
0203 
0204 static enum drm_connector_status tfp410_detect(struct intel_dvo_device *dvo)
0205 {
0206     enum drm_connector_status ret = connector_status_disconnected;
0207     u8 ctl2;
0208 
0209     if (tfp410_readb(dvo, TFP410_CTL_2, &ctl2)) {
0210         if (ctl2 & TFP410_CTL_2_RSEN)
0211             ret = connector_status_connected;
0212         else
0213             ret = connector_status_disconnected;
0214     }
0215 
0216     return ret;
0217 }
0218 
0219 static enum drm_mode_status tfp410_mode_valid(struct intel_dvo_device *dvo,
0220                           struct drm_display_mode *mode)
0221 {
0222     return MODE_OK;
0223 }
0224 
0225 static void tfp410_mode_set(struct intel_dvo_device *dvo,
0226                 const struct drm_display_mode *mode,
0227                 const struct drm_display_mode *adjusted_mode)
0228 {
0229     /* As long as the basics are set up, since we don't have clock dependencies
0230     * in the mode setup, we can just leave the registers alone and everything
0231     * will work fine.
0232     */
0233     /* don't do much */
0234     return;
0235 }
0236 
0237 /* set the tfp410 power state */
0238 static void tfp410_dpms(struct intel_dvo_device *dvo, bool enable)
0239 {
0240     u8 ctl1;
0241 
0242     if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1))
0243         return;
0244 
0245     if (enable)
0246         ctl1 |= TFP410_CTL_1_PD;
0247     else
0248         ctl1 &= ~TFP410_CTL_1_PD;
0249 
0250     tfp410_writeb(dvo, TFP410_CTL_1, ctl1);
0251 }
0252 
0253 static bool tfp410_get_hw_state(struct intel_dvo_device *dvo)
0254 {
0255     u8 ctl1;
0256 
0257     if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1))
0258         return false;
0259 
0260     if (ctl1 & TFP410_CTL_1_PD)
0261         return true;
0262     else
0263         return false;
0264 }
0265 
0266 static void tfp410_dump_regs(struct intel_dvo_device *dvo)
0267 {
0268     u8 val, val2;
0269 
0270     tfp410_readb(dvo, TFP410_REV, &val);
0271     DRM_DEBUG_KMS("TFP410_REV: 0x%02X\n", val);
0272     tfp410_readb(dvo, TFP410_CTL_1, &val);
0273     DRM_DEBUG_KMS("TFP410_CTL1: 0x%02X\n", val);
0274     tfp410_readb(dvo, TFP410_CTL_2, &val);
0275     DRM_DEBUG_KMS("TFP410_CTL2: 0x%02X\n", val);
0276     tfp410_readb(dvo, TFP410_CTL_3, &val);
0277     DRM_DEBUG_KMS("TFP410_CTL3: 0x%02X\n", val);
0278     tfp410_readb(dvo, TFP410_USERCFG, &val);
0279     DRM_DEBUG_KMS("TFP410_USERCFG: 0x%02X\n", val);
0280     tfp410_readb(dvo, TFP410_DE_DLY, &val);
0281     DRM_DEBUG_KMS("TFP410_DE_DLY: 0x%02X\n", val);
0282     tfp410_readb(dvo, TFP410_DE_CTL, &val);
0283     DRM_DEBUG_KMS("TFP410_DE_CTL: 0x%02X\n", val);
0284     tfp410_readb(dvo, TFP410_DE_TOP, &val);
0285     DRM_DEBUG_KMS("TFP410_DE_TOP: 0x%02X\n", val);
0286     tfp410_readb(dvo, TFP410_DE_CNT_LO, &val);
0287     tfp410_readb(dvo, TFP410_DE_CNT_HI, &val2);
0288     DRM_DEBUG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
0289     tfp410_readb(dvo, TFP410_DE_LIN_LO, &val);
0290     tfp410_readb(dvo, TFP410_DE_LIN_HI, &val2);
0291     DRM_DEBUG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
0292     tfp410_readb(dvo, TFP410_H_RES_LO, &val);
0293     tfp410_readb(dvo, TFP410_H_RES_HI, &val2);
0294     DRM_DEBUG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val);
0295     tfp410_readb(dvo, TFP410_V_RES_LO, &val);
0296     tfp410_readb(dvo, TFP410_V_RES_HI, &val2);
0297     DRM_DEBUG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val);
0298 }
0299 
0300 static void tfp410_destroy(struct intel_dvo_device *dvo)
0301 {
0302     struct tfp410_priv *tfp = dvo->dev_priv;
0303 
0304     if (tfp) {
0305         kfree(tfp);
0306         dvo->dev_priv = NULL;
0307     }
0308 }
0309 
0310 const struct intel_dvo_dev_ops tfp410_ops = {
0311     .init = tfp410_init,
0312     .detect = tfp410_detect,
0313     .mode_valid = tfp410_mode_valid,
0314     .mode_set = tfp410_mode_set,
0315     .dpms = tfp410_dpms,
0316     .get_hw_state = tfp410_get_hw_state,
0317     .dump_regs = tfp410_dump_regs,
0318     .destroy = tfp410_destroy,
0319 };