drm/gma500/psb_intel_sdvo.c

0001 /*
0002  * Copyright 2006 Dave Airlie <airlied@linux.ie>
0003  * Copyright © 2006-2007 Intel Corporation
0004  *   Jesse Barnes <jesse.barnes@intel.com>
0005  *
0006  * Permission is hereby granted, free of charge, to any person obtaining a
0007  * copy of this software and associated documentation files (the "Software"),
0008  * to deal in the Software without restriction, including without limitation
0009  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0010  * and/or sell copies of the Software, and to permit persons to whom the
0011  * Software is furnished to do so, subject to the following conditions:
0012  *
0013  * The above copyright notice and this permission notice (including the next
0014  * paragraph) shall be included in all copies or substantial portions of the
0015  * Software.
0016  *
0017  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0018  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0019  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0020  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
0021  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0022  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
0023  * DEALINGS IN THE SOFTWARE.
0024  *
0025  * Authors:
0026  *  Eric Anholt <eric@anholt.net>
0027  */
0028
0029 #include <linux/delay.h>
0030 #include <linux/i2c.h>
0031 #include <linux/kernel.h>
0032 #include <linux/module.h>
0033 #include <linux/slab.h>
0034
0035 #include <drm/drm_crtc.h>
0036 #include <drm/drm_edid.h>
0037
0038 #include "psb_drv.h"
0039 #include "psb_intel_drv.h"
0040 #include "psb_intel_reg.h"
0041 #include "psb_intel_sdvo_regs.h"
0042
0043 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
0044 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
0045 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
0046 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
0047
0048 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
0049                          SDVO_TV_MASK)
0050
0051 #define IS_TV(c)    (c->output_flag & SDVO_TV_MASK)
0052 #define IS_TMDS(c)  (c->output_flag & SDVO_TMDS_MASK)
0053 #define IS_LVDS(c)  (c->output_flag & SDVO_LVDS_MASK)
0054 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
0055
0056
0057 static const char *tv_format_names[] = {
0058     "NTSC_M"   , "NTSC_J"  , "NTSC_443",
0059     "PAL_B"    , "PAL_D"   , "PAL_G"   ,
0060     "PAL_H"    , "PAL_I"   , "PAL_M"   ,
0061     "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
0062     "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
0063     "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
0064     "SECAM_60"
0065 };
0066
0067 struct psb_intel_sdvo {
0068     struct gma_encoder base;
0069
0070     struct i2c_adapter *i2c;
0071     u8 slave_addr;
0072
0073     struct i2c_adapter ddc;
0074
0075     /* Register for the SDVO device: SDVOB or SDVOC */
0076     int sdvo_reg;
0077
0078     /* Active outputs controlled by this SDVO output */
0079     uint16_t controlled_output;
0080
0081     /*
0082      * Capabilities of the SDVO device returned by
0083      * i830_sdvo_get_capabilities()
0084      */
0085     struct psb_intel_sdvo_caps caps;
0086
0087     /* Pixel clock limitations reported by the SDVO device, in kHz */
0088     int pixel_clock_min, pixel_clock_max;
0089
0090     /*
0091     * For multiple function SDVO device,
0092     * this is for current attached outputs.
0093     */
0094     uint16_t attached_output;
0095
0096     /**
0097      * This is used to select the color range of RBG outputs in HDMI mode.
0098      * It is only valid when using TMDS encoding and 8 bit per color mode.
0099      */
0100     uint32_t color_range;
0101
0102     /**
0103      * This is set if we're going to treat the device as TV-out.
0104      *
0105      * While we have these nice friendly flags for output types that ought
0106      * to decide this for us, the S-Video output on our HDMI+S-Video card
0107      * shows up as RGB1 (VGA).
0108      */
0109     bool is_tv;
0110
0111     /* This is for current tv format name */
0112     int tv_format_index;
0113
0114     /**
0115      * This is set if we treat the device as HDMI, instead of DVI.
0116      */
0117     bool is_hdmi;
0118     bool has_hdmi_monitor;
0119     bool has_hdmi_audio;
0120
0121     /**
0122      * This is set if we detect output of sdvo device as LVDS and
0123      * have a valid fixed mode to use with the panel.
0124      */
0125     bool is_lvds;
0126
0127     /**
0128      * This is sdvo fixed panel mode pointer
0129      */
0130     struct drm_display_mode *sdvo_lvds_fixed_mode;
0131
0132     /* DDC bus used by this SDVO encoder */
0133     uint8_t ddc_bus;
0134
0135     u8 pixel_multiplier;
0136
0137     /* Input timings for adjusted_mode */
0138     struct psb_intel_sdvo_dtd input_dtd;
0139
0140     /* Saved SDVO output states */
0141     uint32_t saveSDVO; /* Can be SDVOB or SDVOC depending on sdvo_reg */
0142 };
0143
0144 struct psb_intel_sdvo_connector {
0145     struct gma_connector base;
0146
0147     /* Mark the type of connector */
0148     uint16_t output_flag;
0149
0150     int force_audio;
0151
0152     /* This contains all current supported TV format */
0153     u8 tv_format_supported[ARRAY_SIZE(tv_format_names)];
0154     int   format_supported_num;
0155     struct drm_property *tv_format;
0156
0157     /* add the property for the SDVO-TV */
0158     struct drm_property *left;
0159     struct drm_property *right;
0160     struct drm_property *top;
0161     struct drm_property *bottom;
0162     struct drm_property *hpos;
0163     struct drm_property *vpos;
0164     struct drm_property *contrast;
0165     struct drm_property *saturation;
0166     struct drm_property *hue;
0167     struct drm_property *sharpness;
0168     struct drm_property *flicker_filter;
0169     struct drm_property *flicker_filter_adaptive;
0170     struct drm_property *flicker_filter_2d;
0171     struct drm_property *tv_chroma_filter;
0172     struct drm_property *tv_luma_filter;
0173     struct drm_property *dot_crawl;
0174
0175     /* add the property for the SDVO-TV/LVDS */
0176     struct drm_property *brightness;
0177
0178     /* Add variable to record current setting for the above property */
0179     u32 left_margin, right_margin, top_margin, bottom_margin;
0180
0181     /* this is to get the range of margin.*/
0182     u32 max_hscan,  max_vscan;
0183     u32 max_hpos, cur_hpos;
0184     u32 max_vpos, cur_vpos;
0185     u32 cur_brightness, max_brightness;
0186     u32 cur_contrast,   max_contrast;
0187     u32 cur_saturation, max_saturation;
0188     u32 cur_hue,    max_hue;
0189     u32 cur_sharpness,  max_sharpness;
0190     u32 cur_flicker_filter,     max_flicker_filter;
0191     u32 cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
0192     u32 cur_flicker_filter_2d,      max_flicker_filter_2d;
0193     u32 cur_tv_chroma_filter,   max_tv_chroma_filter;
0194     u32 cur_tv_luma_filter, max_tv_luma_filter;
0195     u32 cur_dot_crawl,  max_dot_crawl;
0196 };
0197
0198 static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder)
0199 {
0200     return container_of(encoder, struct psb_intel_sdvo, base.base);
0201 }
0202
0203 static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
0204 {
0205     return container_of(gma_attached_encoder(connector),
0206                 struct psb_intel_sdvo, base);
0207 }
0208
0209 static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector)
0210 {
0211     return container_of(to_gma_connector(connector), struct psb_intel_sdvo_connector, base);
0212 }
0213
0214 static bool
0215 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags);
0216 static bool
0217 psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
0218                   struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
0219                   int type);
0220 static bool
0221 psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
0222                    struct psb_intel_sdvo_connector *psb_intel_sdvo_connector);
0223
0224 /*
0225  * Writes the SDVOB or SDVOC with the given value, but always writes both
0226  * SDVOB and SDVOC to work around apparent hardware issues (according to
0227  * comments in the BIOS).
0228  */
0229 static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val)
0230 {
0231     struct drm_device *dev = psb_intel_sdvo->base.base.dev;
0232     u32 bval = val, cval = val;
0233     int i, j;
0234     int need_aux = IS_MRST(dev) ? 1 : 0;
0235
0236     for (j = 0; j <= need_aux; j++) {
0237         if (psb_intel_sdvo->sdvo_reg == SDVOB)
0238             cval = REG_READ_WITH_AUX(SDVOC, j);
0239         else
0240             bval = REG_READ_WITH_AUX(SDVOB, j);
0241
0242         /*
0243         * Write the registers twice for luck. Sometimes,
0244         * writing them only once doesn't appear to 'stick'.
0245         * The BIOS does this too. Yay, magic
0246         */
0247         for (i = 0; i < 2; i++) {
0248             REG_WRITE_WITH_AUX(SDVOB, bval, j);
0249             REG_READ_WITH_AUX(SDVOB, j);
0250             REG_WRITE_WITH_AUX(SDVOC, cval, j);
0251             REG_READ_WITH_AUX(SDVOC, j);
0252         }
0253     }
0254 }
0255
0256 static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch)
0257 {
0258     struct i2c_msg msgs[] = {
0259         {
0260             .addr = psb_intel_sdvo->slave_addr,
0261             .flags = 0,
0262             .len = 1,
0263             .buf = &addr,
0264         },
0265         {
0266             .addr = psb_intel_sdvo->slave_addr,
0267             .flags = I2C_M_RD,
0268             .len = 1,
0269             .buf = ch,
0270         }
0271     };
0272     int ret;
0273
0274     if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2)
0275         return true;
0276
0277     DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
0278     return false;
0279 }
0280
0281 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
0282 /** Mapping of command numbers to names, for debug output */
0283 static const struct _sdvo_cmd_name {
0284     u8 cmd;
0285     const char *name;
0286 } sdvo_cmd_names[] = {
0287     SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
0288     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
0289     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
0290     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
0291     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
0292     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
0293     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
0294     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
0295     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
0296     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
0297     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
0298     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
0299     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
0300     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
0301     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
0302     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
0303     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
0304     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
0305     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
0306     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
0307     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
0308     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
0309     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
0310     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
0311     SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
0312     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
0313     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
0314     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
0315     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
0316     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
0317     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
0318     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
0319     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
0320     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
0321     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
0322     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
0323     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
0324     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
0325     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
0326     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
0327     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
0328     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
0329     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
0330
0331     /* Add the op code for SDVO enhancements */
0332     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
0333     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
0334     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
0335     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
0336     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
0337     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
0338     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
0339     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
0340     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
0341     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
0342     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
0343     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
0344     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
0345     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
0346     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
0347     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
0348     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
0349     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
0350     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
0351     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
0352     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
0353     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
0354     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
0355     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
0356     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
0357     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
0358     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
0359     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
0360     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
0361     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
0362     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
0363     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
0364     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
0365     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
0366     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
0367     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
0368     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
0369     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
0370     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
0371     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
0372     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
0373     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
0374     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
0375     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
0376
0377     /* HDMI op code */
0378     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
0379     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
0380     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
0381     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
0382     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
0383     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
0384     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
0385     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
0386     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
0387     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
0388     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
0389     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
0390     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
0391     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
0392     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
0393     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
0394     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
0395     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
0396     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
0397     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
0398 };
0399
0400 #define IS_SDVOB(reg)   (reg == SDVOB)
0401 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
0402
0403 static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
0404                    const void *args, int args_len)
0405 {
0406     int i;
0407
0408     DRM_DEBUG_KMS("%s: W: %02X ",
0409                 SDVO_NAME(psb_intel_sdvo), cmd);
0410     for (i = 0; i < args_len; i++)
0411         DRM_DEBUG_KMS("%02X ", ((u8 *)args)[i]);
0412     for (; i < 8; i++)
0413         DRM_DEBUG_KMS("   ");
0414     for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
0415         if (cmd == sdvo_cmd_names[i].cmd) {
0416             DRM_DEBUG_KMS("(%s)", sdvo_cmd_names[i].name);
0417             break;
0418         }
0419     }
0420     if (i == ARRAY_SIZE(sdvo_cmd_names))
0421         DRM_DEBUG_KMS("(%02X)", cmd);
0422     DRM_DEBUG_KMS("\n");
0423 }
0424
0425 static const char *cmd_status_names[] = {
0426     "Power on",
0427     "Success",
0428     "Not supported",
0429     "Invalid arg",
0430     "Pending",
0431     "Target not specified",
0432     "Scaling not supported"
0433 };
0434
0435 #define MAX_ARG_LEN 32
0436
0437 static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
0438                  const void *args, int args_len)
0439 {
0440     u8 buf[MAX_ARG_LEN*2 + 2], status;
0441     struct i2c_msg msgs[MAX_ARG_LEN + 3];
0442     int i, ret;
0443
0444     if (args_len > MAX_ARG_LEN) {
0445         DRM_ERROR("Need to increase arg length\n");
0446         return false;
0447     }
0448
0449     psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len);
0450
0451     for (i = 0; i < args_len; i++) {
0452         msgs[i].addr = psb_intel_sdvo->slave_addr;
0453         msgs[i].flags = 0;
0454         msgs[i].len = 2;
0455         msgs[i].buf = buf + 2 *i;
0456         buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
0457         buf[2*i + 1] = ((u8*)args)[i];
0458     }
0459     msgs[i].addr = psb_intel_sdvo->slave_addr;
0460     msgs[i].flags = 0;
0461     msgs[i].len = 2;
0462     msgs[i].buf = buf + 2*i;
0463     buf[2*i + 0] = SDVO_I2C_OPCODE;
0464     buf[2*i + 1] = cmd;
0465
0466     /* the following two are to read the response */
0467     status = SDVO_I2C_CMD_STATUS;
0468     msgs[i+1].addr = psb_intel_sdvo->slave_addr;
0469     msgs[i+1].flags = 0;
0470     msgs[i+1].len = 1;
0471     msgs[i+1].buf = &status;
0472
0473     msgs[i+2].addr = psb_intel_sdvo->slave_addr;
0474     msgs[i+2].flags = I2C_M_RD;
0475     msgs[i+2].len = 1;
0476     msgs[i+2].buf = &status;
0477
0478     ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3);
0479     if (ret < 0) {
0480         DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
0481         return false;
0482     }
0483     if (ret != i+3) {
0484         /* failure in I2C transfer */
0485         DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
0486         return false;
0487     }
0488
0489     return true;
0490 }
0491
0492 static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo,
0493                      void *response, int response_len)
0494 {
0495     u8 retry = 5;
0496     u8 status;
0497     int i;
0498
0499     DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(psb_intel_sdvo));
0500
0501     /*
0502      * The documentation states that all commands will be
0503      * processed within 15µs, and that we need only poll
0504      * the status byte a maximum of 3 times in order for the
0505      * command to be complete.
0506      *
0507      * Check 5 times in case the hardware failed to read the docs.
0508      */
0509     if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
0510                   SDVO_I2C_CMD_STATUS,
0511                   &status))
0512         goto log_fail;
0513
0514     while ((status == SDVO_CMD_STATUS_PENDING ||
0515         status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && retry--) {
0516         udelay(15);
0517         if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
0518                       SDVO_I2C_CMD_STATUS,
0519                       &status))
0520             goto log_fail;
0521     }
0522
0523     if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
0524         DRM_DEBUG_KMS("(%s)", cmd_status_names[status]);
0525     else
0526         DRM_DEBUG_KMS("(??? %d)", status);
0527
0528     if (status != SDVO_CMD_STATUS_SUCCESS)
0529         goto log_fail;
0530
0531     /* Read the command response */
0532     for (i = 0; i < response_len; i++) {
0533         if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
0534                       SDVO_I2C_RETURN_0 + i,
0535                       &((u8 *)response)[i]))
0536             goto log_fail;
0537         DRM_DEBUG_KMS(" %02X", ((u8 *)response)[i]);
0538     }
0539     DRM_DEBUG_KMS("\n");
0540     return true;
0541
0542 log_fail:
0543     DRM_DEBUG_KMS("... failed\n");
0544     return false;
0545 }
0546
0547 static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
0548 {
0549     if (mode->clock >= 100000)
0550         return 1;
0551     else if (mode->clock >= 50000)
0552         return 2;
0553     else
0554         return 4;
0555 }
0556
0557 static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo,
0558                           u8 ddc_bus)
0559 {
0560     /* This must be the immediately preceding write before the i2c xfer */
0561     return psb_intel_sdvo_write_cmd(psb_intel_sdvo,
0562                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
0563                     &ddc_bus, 1);
0564 }
0565
0566 static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len)
0567 {
0568     if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len))
0569         return false;
0570
0571     return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0);
0572 }
0573
0574 static bool
0575 psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len)
0576 {
0577     if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0))
0578         return false;
0579
0580     return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len);
0581 }
0582
0583 static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo)
0584 {
0585     struct psb_intel_sdvo_set_target_input_args targets = {0};
0586     return psb_intel_sdvo_set_value(psb_intel_sdvo,
0587                     SDVO_CMD_SET_TARGET_INPUT,
0588                     &targets, sizeof(targets));
0589 }
0590
0591 /*
0592  * Return whether each input is trained.
0593  *
0594  * This function is making an assumption about the layout of the response,
0595  * which should be checked against the docs.
0596  */
0597 static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2)
0598 {
0599     struct psb_intel_sdvo_get_trained_inputs_response response;
0600
0601     BUILD_BUG_ON(sizeof(response) != 1);
0602     if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
0603                   &response, sizeof(response)))
0604         return false;
0605
0606     *input_1 = response.input0_trained;
0607     *input_2 = response.input1_trained;
0608     return true;
0609 }
0610
0611 static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo,
0612                       u16 outputs)
0613 {
0614     return psb_intel_sdvo_set_value(psb_intel_sdvo,
0615                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
0616                     &outputs, sizeof(outputs));
0617 }
0618
0619 static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo,
0620                            int mode)
0621 {
0622     u8 state = SDVO_ENCODER_STATE_ON;
0623
0624     switch (mode) {
0625     case DRM_MODE_DPMS_ON:
0626         state = SDVO_ENCODER_STATE_ON;
0627         break;
0628     case DRM_MODE_DPMS_STANDBY:
0629         state = SDVO_ENCODER_STATE_STANDBY;
0630         break;
0631     case DRM_MODE_DPMS_SUSPEND:
0632         state = SDVO_ENCODER_STATE_SUSPEND;
0633         break;
0634     case DRM_MODE_DPMS_OFF:
0635         state = SDVO_ENCODER_STATE_OFF;
0636         break;
0637     }
0638
0639     return psb_intel_sdvo_set_value(psb_intel_sdvo,
0640                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
0641 }
0642
0643 static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo,
0644                            int *clock_min,
0645                            int *clock_max)
0646 {
0647     struct psb_intel_sdvo_pixel_clock_range clocks;
0648
0649     BUILD_BUG_ON(sizeof(clocks) != 4);
0650     if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
0651                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
0652                   &clocks, sizeof(clocks)))
0653         return false;
0654
0655     /* Convert the values from units of 10 kHz to kHz. */
0656     *clock_min = clocks.min * 10;
0657     *clock_max = clocks.max * 10;
0658     return true;
0659 }
0660
0661 static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo,
0662                      u16 outputs)
0663 {
0664     return psb_intel_sdvo_set_value(psb_intel_sdvo,
0665                     SDVO_CMD_SET_TARGET_OUTPUT,
0666                     &outputs, sizeof(outputs));
0667 }
0668
0669 static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
0670                   struct psb_intel_sdvo_dtd *dtd)
0671 {
0672     return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
0673         psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
0674 }
0675
0676 static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
0677                      struct psb_intel_sdvo_dtd *dtd)
0678 {
0679     return psb_intel_sdvo_set_timing(psb_intel_sdvo,
0680                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
0681 }
0682
0683 static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo,
0684                      struct psb_intel_sdvo_dtd *dtd)
0685 {
0686     return psb_intel_sdvo_set_timing(psb_intel_sdvo,
0687                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
0688 }
0689
0690 static bool
0691 psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
0692                      uint16_t clock,
0693                      uint16_t width,
0694                      uint16_t height)
0695 {
0696     struct psb_intel_sdvo_preferred_input_timing_args args;
0697
0698     memset(&args, 0, sizeof(args));
0699     args.clock = clock;
0700     args.width = width;
0701     args.height = height;
0702     args.interlace = 0;
0703
0704     if (psb_intel_sdvo->is_lvds &&
0705        (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
0706         psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
0707         args.scaled = 1;
0708
0709     return psb_intel_sdvo_set_value(psb_intel_sdvo,
0710                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
0711                     &args, sizeof(args));
0712 }
0713
0714 static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
0715                           struct psb_intel_sdvo_dtd *dtd)
0716 {
0717     BUILD_BUG_ON(sizeof(dtd->part1) != 8);
0718     BUILD_BUG_ON(sizeof(dtd->part2) != 8);
0719     return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
0720                     &dtd->part1, sizeof(dtd->part1)) &&
0721         psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
0722                      &dtd->part2, sizeof(dtd->part2));
0723 }
0724
0725 static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val)
0726 {
0727     return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
0728 }
0729
0730 static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd,
0731                      const struct drm_display_mode *mode)
0732 {
0733     uint16_t width, height;
0734     uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
0735     uint16_t h_sync_offset, v_sync_offset;
0736
0737     width = mode->crtc_hdisplay;
0738     height = mode->crtc_vdisplay;
0739
0740     /* do some mode translations */
0741     h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
0742     h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
0743
0744     v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
0745     v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
0746
0747     h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
0748     v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
0749
0750     dtd->part1.clock = mode->clock / 10;
0751     dtd->part1.h_active = width & 0xff;
0752     dtd->part1.h_blank = h_blank_len & 0xff;
0753     dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
0754         ((h_blank_len >> 8) & 0xf);
0755     dtd->part1.v_active = height & 0xff;
0756     dtd->part1.v_blank = v_blank_len & 0xff;
0757     dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
0758         ((v_blank_len >> 8) & 0xf);
0759
0760     dtd->part2.h_sync_off = h_sync_offset & 0xff;
0761     dtd->part2.h_sync_width = h_sync_len & 0xff;
0762     dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
0763         (v_sync_len & 0xf);
0764     dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
0765         ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
0766         ((v_sync_len & 0x30) >> 4);
0767
0768     dtd->part2.dtd_flags = 0x18;
0769     if (mode->flags & DRM_MODE_FLAG_PHSYNC)
0770         dtd->part2.dtd_flags |= 0x2;
0771     if (mode->flags & DRM_MODE_FLAG_PVSYNC)
0772         dtd->part2.dtd_flags |= 0x4;
0773
0774     dtd->part2.sdvo_flags = 0;
0775     dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
0776     dtd->part2.reserved = 0;
0777 }
0778
0779 static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
0780                      const struct psb_intel_sdvo_dtd *dtd)
0781 {
0782     mode->hdisplay = dtd->part1.h_active;
0783     mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
0784     mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
0785     mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
0786     mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
0787     mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
0788     mode->htotal = mode->hdisplay + dtd->part1.h_blank;
0789     mode->htotal += (dtd->part1.h_high & 0xf) << 8;
0790
0791     mode->vdisplay = dtd->part1.v_active;
0792     mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
0793     mode->vsync_start = mode->vdisplay;
0794     mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
0795     mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
0796     mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
0797     mode->vsync_end = mode->vsync_start +
0798         (dtd->part2.v_sync_off_width & 0xf);
0799     mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
0800     mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
0801     mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
0802
0803     mode->clock = dtd->part1.clock * 10;
0804
0805     mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
0806     if (dtd->part2.dtd_flags & 0x2)
0807         mode->flags |= DRM_MODE_FLAG_PHSYNC;
0808     if (dtd->part2.dtd_flags & 0x4)
0809         mode->flags |= DRM_MODE_FLAG_PVSYNC;
0810 }
0811
0812 static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo)
0813 {
0814     struct psb_intel_sdvo_encode encode;
0815
0816     BUILD_BUG_ON(sizeof(encode) != 2);
0817     return psb_intel_sdvo_get_value(psb_intel_sdvo,
0818                   SDVO_CMD_GET_SUPP_ENCODE,
0819                   &encode, sizeof(encode));
0820 }
0821
0822 static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo,
0823                   uint8_t mode)
0824 {
0825     return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
0826 }
0827
0828 static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo,
0829                        uint8_t mode)
0830 {
0831     return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
0832 }
0833
0834 #if 0
0835 static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo)
0836 {
0837     int i, j;
0838     uint8_t set_buf_index[2];
0839     uint8_t av_split;
0840     uint8_t buf_size;
0841     uint8_t buf[48];
0842     uint8_t *pos;
0843
0844     psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
0845
0846     for (i = 0; i <= av_split; i++) {
0847         set_buf_index[0] = i; set_buf_index[1] = 0;
0848         psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
0849                      set_buf_index, 2);
0850         psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
0851         psb_intel_sdvo_read_response(encoder, &buf_size, 1);
0852
0853         pos = buf;
0854         for (j = 0; j <= buf_size; j += 8) {
0855             psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
0856                          NULL, 0);
0857             psb_intel_sdvo_read_response(encoder, pos, 8);
0858             pos += 8;
0859         }
0860     }
0861 }
0862 #endif
0863
0864 static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo)
0865 {
0866     DRM_INFO("HDMI is not supported yet");
0867
0868     return false;
0869 }
0870
0871 static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo)
0872 {
0873     struct psb_intel_sdvo_tv_format format;
0874     uint32_t format_map;
0875
0876     format_map = 1 << psb_intel_sdvo->tv_format_index;
0877     memset(&format, 0, sizeof(format));
0878     memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
0879
0880     BUILD_BUG_ON(sizeof(format) != 6);
0881     return psb_intel_sdvo_set_value(psb_intel_sdvo,
0882                     SDVO_CMD_SET_TV_FORMAT,
0883                     &format, sizeof(format));
0884 }
0885
0886 static bool
0887 psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo,
0888                     const struct drm_display_mode *mode)
0889 {
0890     struct psb_intel_sdvo_dtd output_dtd;
0891
0892     if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
0893                       psb_intel_sdvo->attached_output))
0894         return false;
0895
0896     psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
0897     if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd))
0898         return false;
0899
0900     return true;
0901 }
0902
0903 static bool
0904 psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo,
0905                     const struct drm_display_mode *mode,
0906                     struct drm_display_mode *adjusted_mode)
0907 {
0908     /* Reset the input timing to the screen. Assume always input 0. */
0909     if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
0910         return false;
0911
0912     if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo,
0913                               mode->clock / 10,
0914                               mode->hdisplay,
0915                               mode->vdisplay))
0916         return false;
0917
0918     if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo,
0919                            &psb_intel_sdvo->input_dtd))
0920         return false;
0921
0922     psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd);
0923
0924     drm_mode_set_crtcinfo(adjusted_mode, 0);
0925     return true;
0926 }
0927
0928 static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder,
0929                   const struct drm_display_mode *mode,
0930                   struct drm_display_mode *adjusted_mode)
0931 {
0932     struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
0933
0934     /* We need to construct preferred input timings based on our
0935      * output timings.  To do that, we have to set the output
0936      * timings, even though this isn't really the right place in
0937      * the sequence to do it. Oh well.
0938      */
0939     if (psb_intel_sdvo->is_tv) {
0940         if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode))
0941             return false;
0942
0943         (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
0944                                  mode,
0945                                  adjusted_mode);
0946     } else if (psb_intel_sdvo->is_lvds) {
0947         if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo,
0948                                  psb_intel_sdvo->sdvo_lvds_fixed_mode))
0949             return false;
0950
0951         (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
0952                                  mode,
0953                                  adjusted_mode);
0954     }
0955
0956     /* Make the CRTC code factor in the SDVO pixel multiplier.  The
0957      * SDVO device will factor out the multiplier during mode_set.
0958      */
0959     psb_intel_sdvo->pixel_multiplier =
0960         psb_intel_sdvo_get_pixel_multiplier(adjusted_mode);
0961     adjusted_mode->clock *= psb_intel_sdvo->pixel_multiplier;
0962
0963     return true;
0964 }
0965
0966 static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder,
0967                 struct drm_display_mode *mode,
0968                 struct drm_display_mode *adjusted_mode)
0969 {
0970     struct drm_device *dev = encoder->dev;
0971     struct drm_crtc *crtc = encoder->crtc;
0972     struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
0973     struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
0974     u32 sdvox;
0975     struct psb_intel_sdvo_in_out_map in_out;
0976     struct psb_intel_sdvo_dtd input_dtd;
0977     int rate;
0978     int need_aux = IS_MRST(dev) ? 1 : 0;
0979
0980     if (!mode)
0981         return;
0982
0983     /* First, set the input mapping for the first input to our controlled
0984      * output. This is only correct if we're a single-input device, in
0985      * which case the first input is the output from the appropriate SDVO
0986      * channel on the motherboard.  In a two-input device, the first input
0987      * will be SDVOB and the second SDVOC.
0988      */
0989     in_out.in0 = psb_intel_sdvo->attached_output;
0990     in_out.in1 = 0;
0991
0992     psb_intel_sdvo_set_value(psb_intel_sdvo,
0993                  SDVO_CMD_SET_IN_OUT_MAP,
0994                  &in_out, sizeof(in_out));
0995
0996     /* Set the output timings to the screen */
0997     if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
0998                       psb_intel_sdvo->attached_output))
0999         return;
1000
1001     /* We have tried to get input timing in mode_fixup, and filled into
1002      * adjusted_mode.
1003      */
1004     if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) {
1005         input_dtd = psb_intel_sdvo->input_dtd;
1006     } else {
1007         /* Set the output timing to the screen */
1008         if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1009                           psb_intel_sdvo->attached_output))
1010             return;
1011
1012         psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1013         (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd);
1014     }
1015
1016     /* Set the input timing to the screen. Assume always input 0. */
1017     if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
1018         return;
1019
1020     if (psb_intel_sdvo->has_hdmi_monitor) {
1021         psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI);
1022         psb_intel_sdvo_set_colorimetry(psb_intel_sdvo,
1023                        SDVO_COLORIMETRY_RGB256);
1024         psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo);
1025     } else
1026         psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI);
1027
1028     if (psb_intel_sdvo->is_tv &&
1029         !psb_intel_sdvo_set_tv_format(psb_intel_sdvo))
1030         return;
1031
1032     (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd);
1033
1034     switch (psb_intel_sdvo->pixel_multiplier) {
1035     default:
1036     case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1037     case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1038     case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1039     }
1040     if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate))
1041         return;
1042
1043     /* Set the SDVO control regs. */
1044     if (need_aux)
1045         sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1046     else
1047         sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
1048
1049     switch (psb_intel_sdvo->sdvo_reg) {
1050     case SDVOB:
1051         sdvox &= SDVOB_PRESERVE_MASK;
1052         break;
1053     case SDVOC:
1054         sdvox &= SDVOC_PRESERVE_MASK;
1055         break;
1056     }
1057     sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1058
1059     if (gma_crtc->pipe == 1)
1060         sdvox |= SDVO_PIPE_B_SELECT;
1061     if (psb_intel_sdvo->has_hdmi_audio)
1062         sdvox |= SDVO_AUDIO_ENABLE;
1063
1064     /* FIXME: Check if this is needed for PSB
1065     sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1066     */
1067
1068     if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1069         sdvox |= SDVO_STALL_SELECT;
1070     psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox);
1071 }
1072
1073 static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1074 {
1075     struct drm_device *dev = encoder->dev;
1076     struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1077     u32 temp;
1078     int i;
1079     int need_aux = IS_MRST(dev) ? 1 : 0;
1080
1081     switch (mode) {
1082     case DRM_MODE_DPMS_ON:
1083         DRM_DEBUG("DPMS_ON");
1084         break;
1085     case DRM_MODE_DPMS_OFF:
1086         DRM_DEBUG("DPMS_OFF");
1087         break;
1088     default:
1089         DRM_DEBUG("DPMS: %d", mode);
1090     }
1091
1092     if (mode != DRM_MODE_DPMS_ON) {
1093         psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0);
1094         if (0)
1095             psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1096
1097         if (mode == DRM_MODE_DPMS_OFF) {
1098             if (need_aux)
1099                 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1100             else
1101                 temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1102
1103             if ((temp & SDVO_ENABLE) != 0) {
1104                 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE);
1105             }
1106         }
1107     } else {
1108         bool input1, input2;
1109         u8 status;
1110
1111         if (need_aux)
1112             temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1113         else
1114             temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1115
1116         if ((temp & SDVO_ENABLE) == 0)
1117             psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
1118
1119         for (i = 0; i < 2; i++)
1120             gma_wait_for_vblank(dev);
1121
1122         status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
1123         /* Warn if the device reported failure to sync.
1124          * A lot of SDVO devices fail to notify of sync, but it's
1125          * a given it the status is a success, we succeeded.
1126          */
1127         if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1128             DRM_DEBUG_KMS("First %s output reported failure to "
1129                     "sync\n", SDVO_NAME(psb_intel_sdvo));
1130         }
1131
1132         if (0)
1133             psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1134         psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output);
1135     }
1136     return;
1137 }
1138
1139 static enum drm_mode_status psb_intel_sdvo_mode_valid(struct drm_connector *connector,
1140                  struct drm_display_mode *mode)
1141 {
1142     struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1143
1144     if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1145         return MODE_NO_DBLESCAN;
1146
1147     if (psb_intel_sdvo->pixel_clock_min > mode->clock)
1148         return MODE_CLOCK_LOW;
1149
1150     if (psb_intel_sdvo->pixel_clock_max < mode->clock)
1151         return MODE_CLOCK_HIGH;
1152
1153     if (psb_intel_sdvo->is_lvds) {
1154         if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1155             return MODE_PANEL;
1156
1157         if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1158             return MODE_PANEL;
1159     }
1160
1161     return MODE_OK;
1162 }
1163
1164 static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps)
1165 {
1166     BUILD_BUG_ON(sizeof(*caps) != 8);
1167     if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
1168                   SDVO_CMD_GET_DEVICE_CAPS,
1169                   caps, sizeof(*caps)))
1170         return false;
1171
1172     DRM_DEBUG_KMS("SDVO capabilities:\n"
1173               "  vendor_id: %d\n"
1174               "  device_id: %d\n"
1175               "  device_rev_id: %d\n"
1176               "  sdvo_version_major: %d\n"
1177               "  sdvo_version_minor: %d\n"
1178               "  sdvo_inputs_mask: %d\n"
1179               "  smooth_scaling: %d\n"
1180               "  sharp_scaling: %d\n"
1181               "  up_scaling: %d\n"
1182               "  down_scaling: %d\n"
1183               "  stall_support: %d\n"
1184               "  output_flags: %d\n",
1185               caps->vendor_id,
1186               caps->device_id,
1187               caps->device_rev_id,
1188               caps->sdvo_version_major,
1189               caps->sdvo_version_minor,
1190               caps->sdvo_inputs_mask,
1191               caps->smooth_scaling,
1192               caps->sharp_scaling,
1193               caps->up_scaling,
1194               caps->down_scaling,
1195               caps->stall_support,
1196               caps->output_flags);
1197
1198     return true;
1199 }
1200
1201 static bool
1202 psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo)
1203 {
1204     /* Is there more than one type of output? */
1205     int caps = psb_intel_sdvo->caps.output_flags & 0xf;
1206     return caps & -caps;
1207 }
1208
1209 static struct edid *
1210 psb_intel_sdvo_get_edid(struct drm_connector *connector)
1211 {
1212     struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector);
1213     return drm_get_edid(connector, &sdvo->ddc);
1214 }
1215
1216 /* Mac mini hack -- use the same DDC as the analog connector */
1217 static struct edid *
1218 psb_intel_sdvo_get_analog_edid(struct drm_connector *connector)
1219 {
1220     struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1221
1222     return drm_get_edid(connector,
1223                 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1224 }
1225
1226 static enum drm_connector_status
1227 psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1228 {
1229     struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1230     enum drm_connector_status status;
1231     struct edid *edid;
1232
1233     edid = psb_intel_sdvo_get_edid(connector);
1234
1235     if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) {
1236         u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus;
1237
1238         /*
1239          * Don't use the 1 as the argument of DDC bus switch to get
1240          * the EDID. It is used for SDVO SPD ROM.
1241          */
1242         for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1243             psb_intel_sdvo->ddc_bus = ddc;
1244             edid = psb_intel_sdvo_get_edid(connector);
1245             if (edid)
1246                 break;
1247         }
1248         /*
1249          * If we found the EDID on the other bus,
1250          * assume that is the correct DDC bus.
1251          */
1252         if (edid == NULL)
1253             psb_intel_sdvo->ddc_bus = saved_ddc;
1254     }
1255
1256     /*
1257      * When there is no edid and no monitor is connected with VGA
1258      * port, try to use the CRT ddc to read the EDID for DVI-connector.
1259      */
1260     if (edid == NULL)
1261         edid = psb_intel_sdvo_get_analog_edid(connector);
1262
1263     status = connector_status_unknown;
1264     if (edid != NULL) {
1265         /* DDC bus is shared, match EDID to connector type */
1266         if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1267             status = connector_status_connected;
1268             if (psb_intel_sdvo->is_hdmi) {
1269                 psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1270                 psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1271             }
1272         } else
1273             status = connector_status_disconnected;
1274         kfree(edid);
1275     }
1276
1277     if (status == connector_status_connected) {
1278         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1279         if (psb_intel_sdvo_connector->force_audio)
1280             psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0;
1281     }
1282
1283     return status;
1284 }
1285
1286 static enum drm_connector_status
1287 psb_intel_sdvo_detect(struct drm_connector *connector, bool force)
1288 {
1289     uint16_t response;
1290     struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1291     struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1292     enum drm_connector_status ret;
1293
1294     if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1295                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1296         return connector_status_unknown;
1297
1298     /* add 30ms delay when the output type might be TV */
1299     if (psb_intel_sdvo->caps.output_flags &
1300         (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1301         mdelay(30);
1302
1303     if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2))
1304         return connector_status_unknown;
1305
1306     DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1307               response & 0xff, response >> 8,
1308               psb_intel_sdvo_connector->output_flag);
1309
1310     if (response == 0)
1311         return connector_status_disconnected;
1312
1313     psb_intel_sdvo->attached_output = response;
1314
1315     psb_intel_sdvo->has_hdmi_monitor = false;
1316     psb_intel_sdvo->has_hdmi_audio = false;
1317
1318     if ((psb_intel_sdvo_connector->output_flag & response) == 0)
1319         ret = connector_status_disconnected;
1320     else if (IS_TMDS(psb_intel_sdvo_connector))
1321         ret = psb_intel_sdvo_hdmi_sink_detect(connector);
1322     else {
1323         struct edid *edid;
1324
1325         /* if we have an edid check it matches the connection */
1326         edid = psb_intel_sdvo_get_edid(connector);
1327         if (edid == NULL)
1328             edid = psb_intel_sdvo_get_analog_edid(connector);
1329         if (edid != NULL) {
1330             if (edid->input & DRM_EDID_INPUT_DIGITAL)
1331                 ret = connector_status_disconnected;
1332             else
1333                 ret = connector_status_connected;
1334             kfree(edid);
1335         } else
1336             ret = connector_status_connected;
1337     }
1338
1339     /* May update encoder flag for like clock for SDVO TV, etc.*/
1340     if (ret == connector_status_connected) {
1341         psb_intel_sdvo->is_tv = false;
1342         psb_intel_sdvo->is_lvds = false;
1343         psb_intel_sdvo->base.needs_tv_clock = false;
1344
1345         if (response & SDVO_TV_MASK) {
1346             psb_intel_sdvo->is_tv = true;
1347             psb_intel_sdvo->base.needs_tv_clock = true;
1348         }
1349         if (response & SDVO_LVDS_MASK)
1350             psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1351     }
1352
1353     return ret;
1354 }
1355
1356 static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1357 {
1358     struct edid *edid;
1359
1360     /* set the bus switch and get the modes */
1361     edid = psb_intel_sdvo_get_edid(connector);
1362
1363     /*
1364      * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1365      * link between analog and digital outputs. So, if the regular SDVO
1366      * DDC fails, check to see if the analog output is disconnected, in
1367      * which case we'll look there for the digital DDC data.
1368      */
1369     if (edid == NULL)
1370         edid = psb_intel_sdvo_get_analog_edid(connector);
1371
1372     if (edid != NULL) {
1373         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1374         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1375         bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector);
1376
1377         if (connector_is_digital == monitor_is_digital) {
1378             drm_connector_update_edid_property(connector, edid);
1379             drm_add_edid_modes(connector, edid);
1380         }
1381
1382         kfree(edid);
1383     }
1384 }
1385
1386 /*
1387  * Set of SDVO TV modes.
1388  * Note!  This is in reply order (see loop in get_tv_modes).
1389  * XXX: all 60Hz refresh?
1390  */
1391 static const struct drm_display_mode sdvo_tv_modes[] = {
1392     { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1393            416, 0, 200, 201, 232, 233, 0,
1394            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1395     { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1396            416, 0, 240, 241, 272, 273, 0,
1397            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1398     { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1399            496, 0, 300, 301, 332, 333, 0,
1400            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1401     { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1402            736, 0, 350, 351, 382, 383, 0,
1403            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1404     { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1405            736, 0, 400, 401, 432, 433, 0,
1406            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1407     { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1408            736, 0, 480, 481, 512, 513, 0,
1409            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1410     { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1411            800, 0, 480, 481, 512, 513, 0,
1412            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1413     { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1414            800, 0, 576, 577, 608, 609, 0,
1415            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1416     { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1417            816, 0, 350, 351, 382, 383, 0,
1418            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1419     { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1420            816, 0, 400, 401, 432, 433, 0,
1421            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1422     { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1423            816, 0, 480, 481, 512, 513, 0,
1424            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1425     { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1426            816, 0, 540, 541, 572, 573, 0,
1427            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1428     { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1429            816, 0, 576, 577, 608, 609, 0,
1430            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1431     { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1432            864, 0, 576, 577, 608, 609, 0,
1433            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1434     { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1435            896, 0, 600, 601, 632, 633, 0,
1436            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1437     { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1438            928, 0, 624, 625, 656, 657, 0,
1439            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1440     { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1441            1016, 0, 766, 767, 798, 799, 0,
1442            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1443     { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1444            1120, 0, 768, 769, 800, 801, 0,
1445            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1446     { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1447            1376, 0, 1024, 1025, 1056, 1057, 0,
1448            DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1449 };
1450
1451 static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector)
1452 {
1453     struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1454     struct psb_intel_sdvo_sdtv_resolution_request tv_res;
1455     uint32_t reply = 0, format_map = 0;
1456     int i;
1457
1458     /* Read the list of supported input resolutions for the selected TV
1459      * format.
1460      */
1461     format_map = 1 << psb_intel_sdvo->tv_format_index;
1462     memcpy(&tv_res, &format_map,
1463            min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request)));
1464
1465     if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output))
1466         return;
1467
1468     BUILD_BUG_ON(sizeof(tv_res) != 3);
1469     if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1470                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1471                   &tv_res, sizeof(tv_res)))
1472         return;
1473     if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3))
1474         return;
1475
1476     for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1477         if (reply & (1 << i)) {
1478             struct drm_display_mode *nmode;
1479             nmode = drm_mode_duplicate(connector->dev,
1480                            &sdvo_tv_modes[i]);
1481             if (nmode)
1482                 drm_mode_probed_add(connector, nmode);
1483         }
1484 }
1485
1486 static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1487 {
1488     struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1489     struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1490     struct drm_display_mode *newmode;
1491
1492     /*
1493      * Attempt to get the mode list from DDC.
1494      * Assume that the preferred modes are
1495      * arranged in priority order.
1496      */
1497     psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c);
1498     if (list_empty(&connector->probed_modes) == false)
1499         goto end;
1500
1501     /* Fetch modes from VBT */
1502     if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1503         newmode = drm_mode_duplicate(connector->dev,
1504                          dev_priv->sdvo_lvds_vbt_mode);
1505         if (newmode != NULL) {
1506             /* Guarantee the mode is preferred */
1507             newmode->type = (DRM_MODE_TYPE_PREFERRED |
1508                      DRM_MODE_TYPE_DRIVER);
1509             drm_mode_probed_add(connector, newmode);
1510         }
1511     }
1512
1513 end:
1514     list_for_each_entry(newmode, &connector->probed_modes, head) {
1515         if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1516             psb_intel_sdvo->sdvo_lvds_fixed_mode =
1517                 drm_mode_duplicate(connector->dev, newmode);
1518
1519             drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode,
1520                           0);
1521
1522             psb_intel_sdvo->is_lvds = true;
1523             break;
1524         }
1525     }
1526
1527 }
1528
1529 static int psb_intel_sdvo_get_modes(struct drm_connector *connector)
1530 {
1531     struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1532
1533     if (IS_TV(psb_intel_sdvo_connector))
1534         psb_intel_sdvo_get_tv_modes(connector);
1535     else if (IS_LVDS(psb_intel_sdvo_connector))
1536         psb_intel_sdvo_get_lvds_modes(connector);
1537     else
1538         psb_intel_sdvo_get_ddc_modes(connector);
1539
1540     return !list_empty(&connector->probed_modes);
1541 }
1542
1543 static void psb_intel_sdvo_destroy(struct drm_connector *connector)
1544 {
1545     struct gma_connector *gma_connector = to_gma_connector(connector);
1546
1547     drm_connector_cleanup(connector);
1548     kfree(gma_connector);
1549 }
1550
1551 static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1552 {
1553     struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1554     struct edid *edid;
1555     bool has_audio = false;
1556
1557     if (!psb_intel_sdvo->is_hdmi)
1558         return false;
1559
1560     edid = psb_intel_sdvo_get_edid(connector);
1561     if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1562         has_audio = drm_detect_monitor_audio(edid);
1563
1564     return has_audio;
1565 }
1566
1567 static int
1568 psb_intel_sdvo_set_property(struct drm_connector *connector,
1569             struct drm_property *property,
1570             uint64_t val)
1571 {
1572     struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1573     struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1574     struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1575     uint16_t temp_value;
1576     uint8_t cmd;
1577     int ret;
1578
1579     ret = drm_object_property_set_value(&connector->base, property, val);
1580     if (ret)
1581         return ret;
1582
1583     if (property == dev_priv->force_audio_property) {
1584         int i = val;
1585         bool has_audio;
1586
1587         if (i == psb_intel_sdvo_connector->force_audio)
1588             return 0;
1589
1590         psb_intel_sdvo_connector->force_audio = i;
1591
1592         if (i == 0)
1593             has_audio = psb_intel_sdvo_detect_hdmi_audio(connector);
1594         else
1595             has_audio = i > 0;
1596
1597         if (has_audio == psb_intel_sdvo->has_hdmi_audio)
1598             return 0;
1599
1600         psb_intel_sdvo->has_hdmi_audio = has_audio;
1601         goto done;
1602     }
1603
1604     if (property == dev_priv->broadcast_rgb_property) {
1605         if (val == !!psb_intel_sdvo->color_range)
1606             return 0;
1607
1608         psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1609         goto done;
1610     }
1611
1612 #define CHECK_PROPERTY(name, NAME) \
1613     if (psb_intel_sdvo_connector->name == property) { \
1614         if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \
1615         if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1616         cmd = SDVO_CMD_SET_##NAME; \
1617         psb_intel_sdvo_connector->cur_##name = temp_value; \
1618         goto set_value; \
1619     }
1620
1621     if (property == psb_intel_sdvo_connector->tv_format) {
1622         if (val >= ARRAY_SIZE(tv_format_names))
1623             return -EINVAL;
1624
1625         if (psb_intel_sdvo->tv_format_index ==
1626             psb_intel_sdvo_connector->tv_format_supported[val])
1627             return 0;
1628
1629         psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val];
1630         goto done;
1631     } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) {
1632         temp_value = val;
1633         if (psb_intel_sdvo_connector->left == property) {
1634             drm_object_property_set_value(&connector->base,
1635                              psb_intel_sdvo_connector->right, val);
1636             if (psb_intel_sdvo_connector->left_margin == temp_value)
1637                 return 0;
1638
1639             psb_intel_sdvo_connector->left_margin = temp_value;
1640             psb_intel_sdvo_connector->right_margin = temp_value;
1641             temp_value = psb_intel_sdvo_connector->max_hscan -
1642                 psb_intel_sdvo_connector->left_margin;
1643             cmd = SDVO_CMD_SET_OVERSCAN_H;
1644             goto set_value;
1645         } else if (psb_intel_sdvo_connector->right == property) {
1646             drm_object_property_set_value(&connector->base,
1647                              psb_intel_sdvo_connector->left, val);
1648             if (psb_intel_sdvo_connector->right_margin == temp_value)
1649                 return 0;
1650
1651             psb_intel_sdvo_connector->left_margin = temp_value;
1652             psb_intel_sdvo_connector->right_margin = temp_value;
1653             temp_value = psb_intel_sdvo_connector->max_hscan -
1654                 psb_intel_sdvo_connector->left_margin;
1655             cmd = SDVO_CMD_SET_OVERSCAN_H;
1656             goto set_value;
1657         } else if (psb_intel_sdvo_connector->top == property) {
1658             drm_object_property_set_value(&connector->base,
1659                              psb_intel_sdvo_connector->bottom, val);
1660             if (psb_intel_sdvo_connector->top_margin == temp_value)
1661                 return 0;
1662
1663             psb_intel_sdvo_connector->top_margin = temp_value;
1664             psb_intel_sdvo_connector->bottom_margin = temp_value;
1665             temp_value = psb_intel_sdvo_connector->max_vscan -
1666                 psb_intel_sdvo_connector->top_margin;
1667             cmd = SDVO_CMD_SET_OVERSCAN_V;
1668             goto set_value;
1669         } else if (psb_intel_sdvo_connector->bottom == property) {
1670             drm_object_property_set_value(&connector->base,
1671                              psb_intel_sdvo_connector->top, val);
1672             if (psb_intel_sdvo_connector->bottom_margin == temp_value)
1673                 return 0;
1674
1675             psb_intel_sdvo_connector->top_margin = temp_value;
1676             psb_intel_sdvo_connector->bottom_margin = temp_value;
1677             temp_value = psb_intel_sdvo_connector->max_vscan -
1678                 psb_intel_sdvo_connector->top_margin;
1679             cmd = SDVO_CMD_SET_OVERSCAN_V;
1680             goto set_value;
1681         }
1682         CHECK_PROPERTY(hpos, HPOS)
1683         CHECK_PROPERTY(vpos, VPOS)
1684         CHECK_PROPERTY(saturation, SATURATION)
1685         CHECK_PROPERTY(contrast, CONTRAST)
1686         CHECK_PROPERTY(hue, HUE)
1687         CHECK_PROPERTY(brightness, BRIGHTNESS)
1688         CHECK_PROPERTY(sharpness, SHARPNESS)
1689         CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1690         CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1691         CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1692         CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1693         CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1694         CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1695     }
1696
1697     return -EINVAL; /* unknown property */
1698
1699 set_value:
1700     if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2))
1701         return -EIO;
1702
1703
1704 done:
1705     if (psb_intel_sdvo->base.base.crtc) {
1706         struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc;
1707         drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1708                      crtc->y, crtc->primary->fb);
1709     }
1710
1711     return 0;
1712 #undef CHECK_PROPERTY
1713 }
1714
1715 static void psb_intel_sdvo_save(struct drm_connector *connector)
1716 {
1717     struct drm_device *dev = connector->dev;
1718     struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
1719     struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base);
1720
1721     sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg);
1722 }
1723
1724 static void psb_intel_sdvo_restore(struct drm_connector *connector)
1725 {
1726     struct drm_device *dev = connector->dev;
1727     struct drm_encoder *encoder = &gma_attached_encoder(connector)->base;
1728     struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder);
1729     struct drm_crtc *crtc = encoder->crtc;
1730
1731     REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO);
1732
1733     /* Force a full mode set on the crtc. We're supposed to have the
1734        mode_config lock already. */
1735     if (connector->status == connector_status_connected)
1736         drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y,
1737                      NULL);
1738 }
1739
1740 static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = {
1741     .dpms = psb_intel_sdvo_dpms,
1742     .mode_fixup = psb_intel_sdvo_mode_fixup,
1743     .prepare = gma_encoder_prepare,
1744     .mode_set = psb_intel_sdvo_mode_set,
1745     .commit = gma_encoder_commit,
1746 };
1747
1748 static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = {
1749     .dpms = drm_helper_connector_dpms,
1750     .detect = psb_intel_sdvo_detect,
1751     .fill_modes = drm_helper_probe_single_connector_modes,
1752     .set_property = psb_intel_sdvo_set_property,
1753     .destroy = psb_intel_sdvo_destroy,
1754 };
1755
1756 static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = {
1757     .get_modes = psb_intel_sdvo_get_modes,
1758     .mode_valid = psb_intel_sdvo_mode_valid,
1759     .best_encoder = gma_best_encoder,
1760 };
1761
1762 static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1763 {
1764     struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1765
1766     if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1767         drm_mode_destroy(encoder->dev,
1768                  psb_intel_sdvo->sdvo_lvds_fixed_mode);
1769
1770     i2c_del_adapter(&psb_intel_sdvo->ddc);
1771     gma_encoder_destroy(encoder);
1772 }
1773
1774 static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = {
1775     .destroy = psb_intel_sdvo_enc_destroy,
1776 };
1777
1778 static void
1779 psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo)
1780 {
1781     /* FIXME: At the moment, ddc_bus = 2 is the only thing that works.
1782      * We need to figure out if this is true for all available poulsbo
1783      * hardware, or if we need to fiddle with the guessing code above.
1784      * The problem might go away if we can parse sdvo mappings from bios */
1785     sdvo->ddc_bus = 2;
1786
1787 #if 0
1788     uint16_t mask = 0;
1789     unsigned int num_bits;
1790
1791     /* Make a mask of outputs less than or equal to our own priority in the
1792      * list.
1793      */
1794     switch (sdvo->controlled_output) {
1795     case SDVO_OUTPUT_LVDS1:
1796         mask |= SDVO_OUTPUT_LVDS1;
1797     case SDVO_OUTPUT_LVDS0:
1798         mask |= SDVO_OUTPUT_LVDS0;
1799     case SDVO_OUTPUT_TMDS1:
1800         mask |= SDVO_OUTPUT_TMDS1;
1801     case SDVO_OUTPUT_TMDS0:
1802         mask |= SDVO_OUTPUT_TMDS0;
1803     case SDVO_OUTPUT_RGB1:
1804         mask |= SDVO_OUTPUT_RGB1;
1805     case SDVO_OUTPUT_RGB0:
1806         mask |= SDVO_OUTPUT_RGB0;
1807         break;
1808     }
1809
1810     /* Count bits to find what number we are in the priority list. */
1811     mask &= sdvo->caps.output_flags;
1812     num_bits = hweight16(mask);
1813     /* If more than 3 outputs, default to DDC bus 3 for now. */
1814     if (num_bits > 3)
1815         num_bits = 3;
1816
1817     /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1818     sdvo->ddc_bus = 1 << num_bits;
1819 #endif
1820 }
1821
1822 /*
1823  * Choose the appropriate DDC bus for control bus switch command for this
1824  * SDVO output based on the controlled output.
1825  *
1826  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1827  * outputs, then LVDS outputs.
1828  */
1829 static void
1830 psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv,
1831               struct psb_intel_sdvo *sdvo, u32 reg)
1832 {
1833     struct sdvo_device_mapping *mapping;
1834
1835     if (IS_SDVOB(reg))
1836         mapping = &(dev_priv->sdvo_mappings[0]);
1837     else
1838         mapping = &(dev_priv->sdvo_mappings[1]);
1839
1840     if (mapping->initialized)
1841         sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1842     else
1843         psb_intel_sdvo_guess_ddc_bus(sdvo);
1844 }
1845
1846 static void
1847 psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv,
1848               struct psb_intel_sdvo *sdvo, u32 reg)
1849 {
1850     struct sdvo_device_mapping *mapping;
1851     u8 pin, speed;
1852
1853     if (IS_SDVOB(reg))
1854         mapping = &dev_priv->sdvo_mappings[0];
1855     else
1856         mapping = &dev_priv->sdvo_mappings[1];
1857
1858     pin = GMBUS_PORT_DPB;
1859     speed = GMBUS_RATE_1MHZ >> 8;
1860     if (mapping->initialized) {
1861         pin = mapping->i2c_pin;
1862         speed = mapping->i2c_speed;
1863     }
1864
1865     if (pin < GMBUS_NUM_PORTS) {
1866         sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1867         gma_intel_gmbus_set_speed(sdvo->i2c, speed);
1868         gma_intel_gmbus_force_bit(sdvo->i2c, true);
1869     } else
1870         sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1871 }
1872
1873 static bool
1874 psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device)
1875 {
1876     return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo);
1877 }
1878
1879 static u8
1880 psb_intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1881 {
1882     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
1883     struct sdvo_device_mapping *my_mapping, *other_mapping;
1884
1885     if (IS_SDVOB(sdvo_reg)) {
1886         my_mapping = &dev_priv->sdvo_mappings[0];
1887         other_mapping = &dev_priv->sdvo_mappings[1];
1888     } else {
1889         my_mapping = &dev_priv->sdvo_mappings[1];
1890         other_mapping = &dev_priv->sdvo_mappings[0];
1891     }
1892
1893     /* If the BIOS described our SDVO device, take advantage of it. */
1894     if (my_mapping->slave_addr)
1895         return my_mapping->slave_addr;
1896
1897     /* If the BIOS only described a different SDVO device, use the
1898      * address that it isn't using.
1899      */
1900     if (other_mapping->slave_addr) {
1901         if (other_mapping->slave_addr == 0x70)
1902             return 0x72;
1903         else
1904             return 0x70;
1905     }
1906
1907     /* No SDVO device info is found for another DVO port,
1908      * so use mapping assumption we had before BIOS parsing.
1909      */
1910     if (IS_SDVOB(sdvo_reg))
1911         return 0x70;
1912     else
1913         return 0x72;
1914 }
1915
1916 static void
1917 psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector,
1918               struct psb_intel_sdvo *encoder)
1919 {
1920     drm_connector_init(encoder->base.base.dev,
1921                &connector->base.base,
1922                &psb_intel_sdvo_connector_funcs,
1923                connector->base.base.connector_type);
1924
1925     drm_connector_helper_add(&connector->base.base,
1926                  &psb_intel_sdvo_connector_helper_funcs);
1927
1928     connector->base.base.interlace_allowed = 0;
1929     connector->base.base.doublescan_allowed = 0;
1930     connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1931
1932     connector->base.save = psb_intel_sdvo_save;
1933     connector->base.restore = psb_intel_sdvo_restore;
1934
1935     gma_connector_attach_encoder(&connector->base, &encoder->base);
1936 }
1937
1938 static void
1939 psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector)
1940 {
1941     /* FIXME: We don't support HDMI at the moment
1942     struct drm_device *dev = connector->base.base.dev;
1943
1944     intel_attach_force_audio_property(&connector->base.base);
1945     intel_attach_broadcast_rgb_property(&connector->base.base);
1946     */
1947 }
1948
1949 static bool
1950 psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
1951 {
1952     struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
1953     struct drm_connector *connector;
1954     struct gma_connector *intel_connector;
1955     struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
1956
1957     psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
1958     if (!psb_intel_sdvo_connector)
1959         return false;
1960
1961     if (device == 0) {
1962         psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
1963         psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
1964     } else if (device == 1) {
1965         psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
1966         psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
1967     }
1968
1969     intel_connector = &psb_intel_sdvo_connector->base;
1970     connector = &intel_connector->base;
1971     // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
1972     encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
1973     connector->connector_type = DRM_MODE_CONNECTOR_DVID;
1974
1975     if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) {
1976         connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
1977         psb_intel_sdvo->is_hdmi = true;
1978     }
1979     psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
1980                        (1 << INTEL_ANALOG_CLONE_BIT));
1981
1982     psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
1983     if (psb_intel_sdvo->is_hdmi)
1984         psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector);
1985
1986     return true;
1987 }
1988
1989 static bool
1990 psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type)
1991 {
1992     struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
1993     struct drm_connector *connector;
1994     struct gma_connector *intel_connector;
1995     struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
1996
1997     psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
1998     if (!psb_intel_sdvo_connector)
1999         return false;
2000
2001     intel_connector = &psb_intel_sdvo_connector->base;
2002     connector = &intel_connector->base;
2003     encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2004     connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2005
2006     psb_intel_sdvo->controlled_output |= type;
2007     psb_intel_sdvo_connector->output_flag = type;
2008
2009     psb_intel_sdvo->is_tv = true;
2010     psb_intel_sdvo->base.needs_tv_clock = true;
2011     psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2012
2013     psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2014
2015     if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type))
2016         goto err;
2017
2018     if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2019         goto err;
2020
2021     return true;
2022
2023 err:
2024     psb_intel_sdvo_destroy(connector);
2025     return false;
2026 }
2027
2028 static bool
2029 psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2030 {
2031     struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2032     struct drm_connector *connector;
2033     struct gma_connector *intel_connector;
2034     struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2035
2036     psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2037     if (!psb_intel_sdvo_connector)
2038         return false;
2039
2040     intel_connector = &psb_intel_sdvo_connector->base;
2041     connector = &intel_connector->base;
2042     connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2043     encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2044     connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2045
2046     if (device == 0) {
2047         psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2048         psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2049     } else if (device == 1) {
2050         psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2051         psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2052     }
2053
2054     psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2055                        (1 << INTEL_ANALOG_CLONE_BIT));
2056
2057     psb_intel_sdvo_connector_init(psb_intel_sdvo_connector,
2058                   psb_intel_sdvo);
2059     return true;
2060 }
2061
2062 static bool
2063 psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2064 {
2065     struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2066     struct drm_connector *connector;
2067     struct gma_connector *intel_connector;
2068     struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2069
2070     psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2071     if (!psb_intel_sdvo_connector)
2072         return false;
2073
2074     intel_connector = &psb_intel_sdvo_connector->base;
2075     connector = &intel_connector->base;
2076     encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2077     connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2078
2079     if (device == 0) {
2080         psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2081         psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2082     } else if (device == 1) {
2083         psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2084         psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2085     }
2086
2087     psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2088                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2089
2090     psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2091     if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2092         goto err;
2093
2094     return true;
2095
2096 err:
2097     psb_intel_sdvo_destroy(connector);
2098     return false;
2099 }
2100
2101 static bool
2102 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags)
2103 {
2104     psb_intel_sdvo->is_tv = false;
2105     psb_intel_sdvo->base.needs_tv_clock = false;
2106     psb_intel_sdvo->is_lvds = false;
2107
2108     /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2109
2110     if (flags & SDVO_OUTPUT_TMDS0)
2111         if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0))
2112             return false;
2113
2114     if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2115         if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1))
2116             return false;
2117
2118     /* TV has no XXX1 function block */
2119     if (flags & SDVO_OUTPUT_SVID0)
2120         if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0))
2121             return false;
2122
2123     if (flags & SDVO_OUTPUT_CVBS0)
2124         if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0))
2125             return false;
2126
2127     if (flags & SDVO_OUTPUT_RGB0)
2128         if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0))
2129             return false;
2130
2131     if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2132         if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1))
2133             return false;
2134
2135     if (flags & SDVO_OUTPUT_LVDS0)
2136         if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0))
2137             return false;
2138
2139     if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2140         if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1))
2141             return false;
2142
2143     if ((flags & SDVO_OUTPUT_MASK) == 0) {
2144         unsigned char bytes[2];
2145
2146         psb_intel_sdvo->controlled_output = 0;
2147         memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2);
2148         DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2149                   SDVO_NAME(psb_intel_sdvo),
2150                   bytes[0], bytes[1]);
2151         return false;
2152     }
2153     psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2154
2155     return true;
2156 }
2157
2158 static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
2159                       struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2160                       int type)
2161 {
2162     struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2163     struct psb_intel_sdvo_tv_format format;
2164     uint32_t format_map, i;
2165
2166     if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type))
2167         return false;
2168
2169     BUILD_BUG_ON(sizeof(format) != 6);
2170     if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2171                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2172                   &format, sizeof(format)))
2173         return false;
2174
2175     memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2176
2177     if (format_map == 0)
2178         return false;
2179
2180     psb_intel_sdvo_connector->format_supported_num = 0;
2181     for (i = 0 ; i < ARRAY_SIZE(tv_format_names); i++)
2182         if (format_map & (1 << i))
2183             psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i;
2184
2185
2186     psb_intel_sdvo_connector->tv_format =
2187             drm_property_create(dev, DRM_MODE_PROP_ENUM,
2188                         "mode", psb_intel_sdvo_connector->format_supported_num);
2189     if (!psb_intel_sdvo_connector->tv_format)
2190         return false;
2191
2192     for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++)
2193         drm_property_add_enum(
2194                 psb_intel_sdvo_connector->tv_format,
2195                 i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]);
2196
2197     psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0];
2198     drm_object_attach_property(&psb_intel_sdvo_connector->base.base.base,
2199                       psb_intel_sdvo_connector->tv_format, 0);
2200     return true;
2201
2202 }
2203
2204 #define ENHANCEMENT(name, NAME) do { \
2205     if (enhancements.name) { \
2206         if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2207             !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2208             return false; \
2209         psb_intel_sdvo_connector->max_##name = data_value[0]; \
2210         psb_intel_sdvo_connector->cur_##name = response; \
2211         psb_intel_sdvo_connector->name = \
2212             drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2213         if (!psb_intel_sdvo_connector->name) return false; \
2214         drm_object_attach_property(&connector->base, \
2215                           psb_intel_sdvo_connector->name, \
2216                           psb_intel_sdvo_connector->cur_##name); \
2217         DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2218                   data_value[0], data_value[1], response); \
2219     } \
2220 } while(0)
2221
2222 static bool
2223 psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo,
2224                       struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2225                       struct psb_intel_sdvo_enhancements_reply enhancements)
2226 {
2227     struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2228     struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2229     uint16_t response, data_value[2];
2230
2231     /* when horizontal overscan is supported, Add the left/right  property */
2232     if (enhancements.overscan_h) {
2233         if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2234                       SDVO_CMD_GET_MAX_OVERSCAN_H,
2235                       &data_value, 4))
2236             return false;
2237
2238         if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2239                       SDVO_CMD_GET_OVERSCAN_H,
2240                       &response, 2))
2241             return false;
2242
2243         psb_intel_sdvo_connector->max_hscan = data_value[0];
2244         psb_intel_sdvo_connector->left_margin = data_value[0] - response;
2245         psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin;
2246         psb_intel_sdvo_connector->left =
2247             drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2248         if (!psb_intel_sdvo_connector->left)
2249             return false;
2250
2251         drm_object_attach_property(&connector->base,
2252                           psb_intel_sdvo_connector->left,
2253                           psb_intel_sdvo_connector->left_margin);
2254
2255         psb_intel_sdvo_connector->right =
2256             drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2257         if (!psb_intel_sdvo_connector->right)
2258             return false;
2259
2260         drm_object_attach_property(&connector->base,
2261                           psb_intel_sdvo_connector->right,
2262                           psb_intel_sdvo_connector->right_margin);
2263         DRM_DEBUG_KMS("h_overscan: max %d, "
2264                   "default %d, current %d\n",
2265                   data_value[0], data_value[1], response);
2266     }
2267
2268     if (enhancements.overscan_v) {
2269         if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2270                       SDVO_CMD_GET_MAX_OVERSCAN_V,
2271                       &data_value, 4))
2272             return false;
2273
2274         if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2275                       SDVO_CMD_GET_OVERSCAN_V,
2276                       &response, 2))
2277             return false;
2278
2279         psb_intel_sdvo_connector->max_vscan = data_value[0];
2280         psb_intel_sdvo_connector->top_margin = data_value[0] - response;
2281         psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin;
2282         psb_intel_sdvo_connector->top =
2283             drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]);
2284         if (!psb_intel_sdvo_connector->top)
2285             return false;
2286
2287         drm_object_attach_property(&connector->base,
2288                           psb_intel_sdvo_connector->top,
2289                           psb_intel_sdvo_connector->top_margin);
2290
2291         psb_intel_sdvo_connector->bottom =
2292             drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]);
2293         if (!psb_intel_sdvo_connector->bottom)
2294             return false;
2295
2296         drm_object_attach_property(&connector->base,
2297                           psb_intel_sdvo_connector->bottom,
2298                           psb_intel_sdvo_connector->bottom_margin);
2299         DRM_DEBUG_KMS("v_overscan: max %d, "
2300                   "default %d, current %d\n",
2301                   data_value[0], data_value[1], response);
2302     }
2303
2304     ENHANCEMENT(hpos, HPOS);
2305     ENHANCEMENT(vpos, VPOS);
2306     ENHANCEMENT(saturation, SATURATION);
2307     ENHANCEMENT(contrast, CONTRAST);
2308     ENHANCEMENT(hue, HUE);
2309     ENHANCEMENT(sharpness, SHARPNESS);
2310     ENHANCEMENT(brightness, BRIGHTNESS);
2311     ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2312     ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2313     ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2314     ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2315     ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2316
2317     if (enhancements.dot_crawl) {
2318         if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2319             return false;
2320
2321         psb_intel_sdvo_connector->max_dot_crawl = 1;
2322         psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2323         psb_intel_sdvo_connector->dot_crawl =
2324             drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2325         if (!psb_intel_sdvo_connector->dot_crawl)
2326             return false;
2327
2328         drm_object_attach_property(&connector->base,
2329                           psb_intel_sdvo_connector->dot_crawl,
2330                           psb_intel_sdvo_connector->cur_dot_crawl);
2331         DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2332     }
2333
2334     return true;
2335 }
2336
2337 static bool
2338 psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo,
2339                     struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2340                     struct psb_intel_sdvo_enhancements_reply enhancements)
2341 {
2342     struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2343     struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2344     uint16_t response, data_value[2];
2345
2346     ENHANCEMENT(brightness, BRIGHTNESS);
2347
2348     return true;
2349 }
2350 #undef ENHANCEMENT
2351
2352 static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
2353                            struct psb_intel_sdvo_connector *psb_intel_sdvo_connector)
2354 {
2355     union {
2356         struct psb_intel_sdvo_enhancements_reply reply;
2357         uint16_t response;
2358     } enhancements;
2359
2360     BUILD_BUG_ON(sizeof(enhancements) != 2);
2361
2362     enhancements.response = 0;
2363     psb_intel_sdvo_get_value(psb_intel_sdvo,
2364                  SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2365                  &enhancements, sizeof(enhancements));
2366     if (enhancements.response == 0) {
2367         DRM_DEBUG_KMS("No enhancement is supported\n");
2368         return true;
2369     }
2370
2371     if (IS_TV(psb_intel_sdvo_connector))
2372         return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2373     else if(IS_LVDS(psb_intel_sdvo_connector))
2374         return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2375     else
2376         return true;
2377 }
2378
2379 static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2380                      struct i2c_msg *msgs,
2381                      int num)
2382 {
2383     struct psb_intel_sdvo *sdvo = adapter->algo_data;
2384
2385     if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2386         return -EIO;
2387
2388     return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2389 }
2390
2391 static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2392 {
2393     struct psb_intel_sdvo *sdvo = adapter->algo_data;
2394     return sdvo->i2c->algo->functionality(sdvo->i2c);
2395 }
2396
2397 static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = {
2398     .master_xfer    = psb_intel_sdvo_ddc_proxy_xfer,
2399     .functionality  = psb_intel_sdvo_ddc_proxy_func
2400 };
2401
2402 static bool
2403 psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo,
2404               struct drm_device *dev)
2405 {
2406     sdvo->ddc.owner = THIS_MODULE;
2407     sdvo->ddc.class = I2C_CLASS_DDC;
2408     snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2409     sdvo->ddc.dev.parent = dev->dev;
2410     sdvo->ddc.algo_data = sdvo;
2411     sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy;
2412
2413     return i2c_add_adapter(&sdvo->ddc) == 0;
2414 }
2415
2416 bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2417 {
2418     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
2419     struct gma_encoder *gma_encoder;
2420     struct psb_intel_sdvo *psb_intel_sdvo;
2421     int i;
2422
2423     psb_intel_sdvo = kzalloc(sizeof(struct psb_intel_sdvo), GFP_KERNEL);
2424     if (!psb_intel_sdvo)
2425         return false;
2426
2427     psb_intel_sdvo->sdvo_reg = sdvo_reg;
2428     psb_intel_sdvo->slave_addr = psb_intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2429     psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2430     if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) {
2431         kfree(psb_intel_sdvo);
2432         return false;
2433     }
2434
2435     /* encoder type will be decided later */
2436     gma_encoder = &psb_intel_sdvo->base;
2437     gma_encoder->type = INTEL_OUTPUT_SDVO;
2438     drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs,
2439              0, NULL);
2440
2441     /* Read the regs to test if we can talk to the device */
2442     for (i = 0; i < 0x40; i++) {
2443         u8 byte;
2444
2445         if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) {
2446             DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2447                       IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2448             goto err;
2449         }
2450     }
2451
2452     if (IS_SDVOB(sdvo_reg))
2453         dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2454     else
2455         dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2456
2457     drm_encoder_helper_add(&gma_encoder->base, &psb_intel_sdvo_helper_funcs);
2458
2459     /* In default case sdvo lvds is false */
2460     if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps))
2461         goto err;
2462
2463     if (psb_intel_sdvo_output_setup(psb_intel_sdvo,
2464                     psb_intel_sdvo->caps.output_flags) != true) {
2465         DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2466                   IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2467         goto err;
2468     }
2469
2470     psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2471
2472     /* Set the input timing to the screen. Assume always input 0. */
2473     if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
2474         goto err;
2475
2476     if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo,
2477                             &psb_intel_sdvo->pixel_clock_min,
2478                             &psb_intel_sdvo->pixel_clock_max))
2479         goto err;
2480
2481     DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2482             "clock range %dMHz - %dMHz, "
2483             "input 1: %c, input 2: %c, "
2484             "output 1: %c, output 2: %c\n",
2485             SDVO_NAME(psb_intel_sdvo),
2486             psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id,
2487             psb_intel_sdvo->caps.device_rev_id,
2488             psb_intel_sdvo->pixel_clock_min / 1000,
2489             psb_intel_sdvo->pixel_clock_max / 1000,
2490             (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2491             (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2492             /* check currently supported outputs */
2493             psb_intel_sdvo->caps.output_flags &
2494             (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2495             psb_intel_sdvo->caps.output_flags &
2496             (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2497     return true;
2498
2499 err:
2500     drm_encoder_cleanup(&gma_encoder->base);
2501     i2c_del_adapter(&psb_intel_sdvo->ddc);
2502     kfree(psb_intel_sdvo);
2503
2504     return false;
2505 }