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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright © 2006-2007 Intel Corporation
0004  *
0005  * Authors:
0006  *  Eric Anholt <eric@anholt.net>
0007  *  Dave Airlie <airlied@linux.ie>
0008  *  Jesse Barnes <jesse.barnes@intel.com>
0009  */
0010 
0011 #include <linux/i2c.h>
0012 #include <linux/pm_runtime.h>
0013 
0014 #include <drm/drm_simple_kms_helper.h>
0015 
0016 #include "intel_bios.h"
0017 #include "power.h"
0018 #include "psb_drv.h"
0019 #include "psb_intel_drv.h"
0020 #include "psb_intel_reg.h"
0021 
0022 /*
0023  * LVDS I2C backlight control macros
0024  */
0025 #define BRIGHTNESS_MAX_LEVEL 100
0026 #define BRIGHTNESS_MASK 0xFF
0027 #define BLC_I2C_TYPE    0x01
0028 #define BLC_PWM_TYPT    0x02
0029 
0030 #define BLC_POLARITY_NORMAL 0
0031 #define BLC_POLARITY_INVERSE 1
0032 
0033 #define PSB_BLC_MAX_PWM_REG_FREQ       (0xFFFE)
0034 #define PSB_BLC_MIN_PWM_REG_FREQ    (0x2)
0035 #define PSB_BLC_PWM_PRECISION_FACTOR    (10)
0036 #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
0037 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
0038 
0039 struct psb_intel_lvds_priv {
0040     /*
0041      * Saved LVDO output states
0042      */
0043     uint32_t savePP_ON;
0044     uint32_t savePP_OFF;
0045     uint32_t saveLVDS;
0046     uint32_t savePP_CONTROL;
0047     uint32_t savePP_CYCLE;
0048     uint32_t savePFIT_CONTROL;
0049     uint32_t savePFIT_PGM_RATIOS;
0050     uint32_t saveBLC_PWM_CTL;
0051 
0052     struct gma_i2c_chan *i2c_bus;
0053 };
0054 
0055 
0056 /*
0057  * Returns the maximum level of the backlight duty cycle field.
0058  */
0059 static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
0060 {
0061     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0062     u32 ret;
0063 
0064     if (gma_power_begin(dev, false)) {
0065         ret = REG_READ(BLC_PWM_CTL);
0066         gma_power_end(dev);
0067     } else /* Powered off, use the saved value */
0068         ret = dev_priv->regs.saveBLC_PWM_CTL;
0069 
0070     /* Top 15bits hold the frequency mask */
0071     ret = (ret &  BACKLIGHT_MODULATION_FREQ_MASK) >>
0072                     BACKLIGHT_MODULATION_FREQ_SHIFT;
0073 
0074         ret *= 2;   /* Return a 16bit range as needed for setting */
0075         if (ret == 0)
0076                 dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
0077                         REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
0078     return ret;
0079 }
0080 
0081 /*
0082  * Set LVDS backlight level by I2C command
0083  *
0084  * FIXME: at some point we need to both track this for PM and also
0085  * disable runtime pm on MRST if the brightness is nil (ie blanked)
0086  */
0087 static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
0088                     unsigned int level)
0089 {
0090     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0091 
0092     struct gma_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
0093     u8 out_buf[2];
0094     unsigned int blc_i2c_brightness;
0095 
0096     struct i2c_msg msgs[] = {
0097         {
0098             .addr = lvds_i2c_bus->slave_addr,
0099             .flags = 0,
0100             .len = 2,
0101             .buf = out_buf,
0102         }
0103     };
0104 
0105     blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
0106                  BRIGHTNESS_MASK /
0107                  BRIGHTNESS_MAX_LEVEL);
0108 
0109     if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
0110         blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
0111 
0112     out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
0113     out_buf[1] = (u8)blc_i2c_brightness;
0114 
0115     if (i2c_transfer(&lvds_i2c_bus->base, msgs, 1) == 1) {
0116         dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
0117             dev_priv->lvds_bl->brightnesscmd,
0118             blc_i2c_brightness);
0119         return 0;
0120     }
0121 
0122     dev_err(dev->dev, "I2C transfer error\n");
0123     return -1;
0124 }
0125 
0126 
0127 static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
0128 {
0129     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0130 
0131     u32 max_pwm_blc;
0132     u32 blc_pwm_duty_cycle;
0133 
0134     max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
0135 
0136     /*BLC_PWM_CTL Should be initiated while backlight device init*/
0137     BUG_ON(max_pwm_blc == 0);
0138 
0139     blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
0140 
0141     if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
0142         blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
0143 
0144     blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
0145     REG_WRITE(BLC_PWM_CTL,
0146           (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
0147           (blc_pwm_duty_cycle));
0148 
0149         dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
0150           (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
0151           (blc_pwm_duty_cycle));
0152 
0153     return 0;
0154 }
0155 
0156 /*
0157  * Set LVDS backlight level either by I2C or PWM
0158  */
0159 void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
0160 {
0161     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0162 
0163     dev_dbg(dev->dev, "backlight level is %d\n", level);
0164 
0165     if (!dev_priv->lvds_bl) {
0166         dev_err(dev->dev, "NO LVDS backlight info\n");
0167         return;
0168     }
0169 
0170     if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
0171         psb_lvds_i2c_set_brightness(dev, level);
0172     else
0173         psb_lvds_pwm_set_brightness(dev, level);
0174 }
0175 
0176 /*
0177  * Sets the backlight level.
0178  *
0179  * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
0180  */
0181 static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
0182 {
0183     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0184     u32 blc_pwm_ctl;
0185 
0186     if (gma_power_begin(dev, false)) {
0187         blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
0188         blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
0189         REG_WRITE(BLC_PWM_CTL,
0190                 (blc_pwm_ctl |
0191                 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
0192         dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
0193                     (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
0194         gma_power_end(dev);
0195     } else {
0196         blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
0197                 ~BACKLIGHT_DUTY_CYCLE_MASK;
0198         dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
0199                     (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
0200     }
0201 }
0202 
0203 /*
0204  * Sets the power state for the panel.
0205  */
0206 static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
0207 {
0208     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0209     struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
0210     u32 pp_status;
0211 
0212     if (!gma_power_begin(dev, true)) {
0213             dev_err(dev->dev, "set power, chip off!\n");
0214         return;
0215         }
0216 
0217     if (on) {
0218         REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
0219               POWER_TARGET_ON);
0220         do {
0221             pp_status = REG_READ(PP_STATUS);
0222         } while ((pp_status & PP_ON) == 0);
0223 
0224         psb_intel_lvds_set_backlight(dev,
0225                          mode_dev->backlight_duty_cycle);
0226     } else {
0227         psb_intel_lvds_set_backlight(dev, 0);
0228 
0229         REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
0230               ~POWER_TARGET_ON);
0231         do {
0232             pp_status = REG_READ(PP_STATUS);
0233         } while (pp_status & PP_ON);
0234     }
0235 
0236     gma_power_end(dev);
0237 }
0238 
0239 static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
0240 {
0241     struct drm_device *dev = encoder->dev;
0242 
0243     if (mode == DRM_MODE_DPMS_ON)
0244         psb_intel_lvds_set_power(dev, true);
0245     else
0246         psb_intel_lvds_set_power(dev, false);
0247 
0248     /* XXX: We never power down the LVDS pairs. */
0249 }
0250 
0251 static void psb_intel_lvds_save(struct drm_connector *connector)
0252 {
0253     struct drm_device *dev = connector->dev;
0254     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0255     struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
0256     struct psb_intel_lvds_priv *lvds_priv =
0257         (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
0258 
0259     lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
0260     lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
0261     lvds_priv->saveLVDS = REG_READ(LVDS);
0262     lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
0263     lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
0264     /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
0265     lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
0266     lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
0267     lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
0268 
0269     /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
0270     dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
0271                         BACKLIGHT_DUTY_CYCLE_MASK);
0272 
0273     /*
0274      * If the light is off at server startup,
0275      * just make it full brightness
0276      */
0277     if (dev_priv->backlight_duty_cycle == 0)
0278         dev_priv->backlight_duty_cycle =
0279         psb_intel_lvds_get_max_backlight(dev);
0280 
0281     dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
0282             lvds_priv->savePP_ON,
0283             lvds_priv->savePP_OFF,
0284             lvds_priv->saveLVDS,
0285             lvds_priv->savePP_CONTROL,
0286             lvds_priv->savePP_CYCLE,
0287             lvds_priv->saveBLC_PWM_CTL);
0288 }
0289 
0290 static void psb_intel_lvds_restore(struct drm_connector *connector)
0291 {
0292     struct drm_device *dev = connector->dev;
0293     u32 pp_status;
0294     struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
0295     struct psb_intel_lvds_priv *lvds_priv =
0296         (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
0297 
0298     dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
0299             lvds_priv->savePP_ON,
0300             lvds_priv->savePP_OFF,
0301             lvds_priv->saveLVDS,
0302             lvds_priv->savePP_CONTROL,
0303             lvds_priv->savePP_CYCLE,
0304             lvds_priv->saveBLC_PWM_CTL);
0305 
0306     REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
0307     REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
0308     REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
0309     REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
0310     REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
0311     /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
0312     REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
0313     REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
0314     REG_WRITE(LVDS, lvds_priv->saveLVDS);
0315 
0316     if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
0317         REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
0318             POWER_TARGET_ON);
0319         do {
0320             pp_status = REG_READ(PP_STATUS);
0321         } while ((pp_status & PP_ON) == 0);
0322     } else {
0323         REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
0324             ~POWER_TARGET_ON);
0325         do {
0326             pp_status = REG_READ(PP_STATUS);
0327         } while (pp_status & PP_ON);
0328     }
0329 }
0330 
0331 enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector,
0332                  struct drm_display_mode *mode)
0333 {
0334     struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
0335     struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
0336     struct drm_display_mode *fixed_mode =
0337                     dev_priv->mode_dev.panel_fixed_mode;
0338 
0339     if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
0340         fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
0341 
0342     /* just in case */
0343     if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
0344         return MODE_NO_DBLESCAN;
0345 
0346     /* just in case */
0347     if (mode->flags & DRM_MODE_FLAG_INTERLACE)
0348         return MODE_NO_INTERLACE;
0349 
0350     if (fixed_mode) {
0351         if (mode->hdisplay > fixed_mode->hdisplay)
0352             return MODE_PANEL;
0353         if (mode->vdisplay > fixed_mode->vdisplay)
0354             return MODE_PANEL;
0355     }
0356     return MODE_OK;
0357 }
0358 
0359 bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
0360                   const struct drm_display_mode *mode,
0361                   struct drm_display_mode *adjusted_mode)
0362 {
0363     struct drm_device *dev = encoder->dev;
0364     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0365     struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
0366     struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
0367     struct drm_encoder *tmp_encoder;
0368     struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
0369     struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
0370 
0371     if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
0372         panel_fixed_mode = mode_dev->panel_fixed_mode2;
0373 
0374     /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
0375     if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
0376         pr_err("Can't support LVDS on pipe A\n");
0377         return false;
0378     }
0379     if (IS_MRST(dev) && gma_crtc->pipe != 0) {
0380         pr_err("Must use PIPE A\n");
0381         return false;
0382     }
0383     /* Should never happen!! */
0384     list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
0385                 head) {
0386         if (tmp_encoder != encoder
0387             && tmp_encoder->crtc == encoder->crtc) {
0388             pr_err("Can't enable LVDS and another encoder on the same pipe\n");
0389             return false;
0390         }
0391     }
0392 
0393     /*
0394      * If we have timings from the BIOS for the panel, put them in
0395      * to the adjusted mode.  The CRTC will be set up for this mode,
0396      * with the panel scaling set up to source from the H/VDisplay
0397      * of the original mode.
0398      */
0399     if (panel_fixed_mode != NULL) {
0400         adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
0401         adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
0402         adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
0403         adjusted_mode->htotal = panel_fixed_mode->htotal;
0404         adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
0405         adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
0406         adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
0407         adjusted_mode->vtotal = panel_fixed_mode->vtotal;
0408         adjusted_mode->clock = panel_fixed_mode->clock;
0409         drm_mode_set_crtcinfo(adjusted_mode,
0410                       CRTC_INTERLACE_HALVE_V);
0411     }
0412 
0413     /*
0414      * XXX: It would be nice to support lower refresh rates on the
0415      * panels to reduce power consumption, and perhaps match the
0416      * user's requested refresh rate.
0417      */
0418 
0419     return true;
0420 }
0421 
0422 static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
0423 {
0424     struct drm_device *dev = encoder->dev;
0425     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0426     struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
0427 
0428     if (!gma_power_begin(dev, true))
0429         return;
0430 
0431     mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
0432     mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
0433                       BACKLIGHT_DUTY_CYCLE_MASK);
0434 
0435     psb_intel_lvds_set_power(dev, false);
0436 
0437     gma_power_end(dev);
0438 }
0439 
0440 static void psb_intel_lvds_commit(struct drm_encoder *encoder)
0441 {
0442     struct drm_device *dev = encoder->dev;
0443     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0444     struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
0445 
0446     if (mode_dev->backlight_duty_cycle == 0)
0447         mode_dev->backlight_duty_cycle =
0448             psb_intel_lvds_get_max_backlight(dev);
0449 
0450     psb_intel_lvds_set_power(dev, true);
0451 }
0452 
0453 static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
0454                 struct drm_display_mode *mode,
0455                 struct drm_display_mode *adjusted_mode)
0456 {
0457     struct drm_device *dev = encoder->dev;
0458     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0459     u32 pfit_control;
0460 
0461     /*
0462      * The LVDS pin pair will already have been turned on in the
0463      * psb_intel_crtc_mode_set since it has a large impact on the DPLL
0464      * settings.
0465      */
0466 
0467     /*
0468      * Enable automatic panel scaling so that non-native modes fill the
0469      * screen.  Should be enabled before the pipe is enabled, according to
0470      * register description and PRM.
0471      */
0472     if (mode->hdisplay != adjusted_mode->hdisplay ||
0473         mode->vdisplay != adjusted_mode->vdisplay)
0474         pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
0475                 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
0476                 HORIZ_INTERP_BILINEAR);
0477     else
0478         pfit_control = 0;
0479 
0480     if (dev_priv->lvds_dither)
0481         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
0482 
0483     REG_WRITE(PFIT_CONTROL, pfit_control);
0484 }
0485 
0486 /*
0487  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
0488  */
0489 static int psb_intel_lvds_get_modes(struct drm_connector *connector)
0490 {
0491     struct drm_device *dev = connector->dev;
0492     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0493     struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
0494     int ret = 0;
0495 
0496     if (!IS_MRST(dev))
0497         ret = psb_intel_ddc_get_modes(connector, connector->ddc);
0498 
0499     if (ret)
0500         return ret;
0501 
0502     if (mode_dev->panel_fixed_mode != NULL) {
0503         struct drm_display_mode *mode =
0504             drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
0505         drm_mode_probed_add(connector, mode);
0506         return 1;
0507     }
0508 
0509     return 0;
0510 }
0511 
0512 void psb_intel_lvds_destroy(struct drm_connector *connector)
0513 {
0514     struct gma_connector *gma_connector = to_gma_connector(connector);
0515     struct gma_i2c_chan *ddc_bus = to_gma_i2c_chan(connector->ddc);
0516 
0517     gma_i2c_destroy(ddc_bus);
0518     drm_connector_cleanup(connector);
0519     kfree(gma_connector);
0520 }
0521 
0522 int psb_intel_lvds_set_property(struct drm_connector *connector,
0523                        struct drm_property *property,
0524                        uint64_t value)
0525 {
0526     struct drm_encoder *encoder = connector->encoder;
0527 
0528     if (!encoder)
0529         return -1;
0530 
0531     if (!strcmp(property->name, "scaling mode")) {
0532         struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
0533         uint64_t curval;
0534 
0535         if (!crtc)
0536             goto set_prop_error;
0537 
0538         switch (value) {
0539         case DRM_MODE_SCALE_FULLSCREEN:
0540             break;
0541         case DRM_MODE_SCALE_NO_SCALE:
0542             break;
0543         case DRM_MODE_SCALE_ASPECT:
0544             break;
0545         default:
0546             goto set_prop_error;
0547         }
0548 
0549         if (drm_object_property_get_value(&connector->base,
0550                              property,
0551                              &curval))
0552             goto set_prop_error;
0553 
0554         if (curval == value)
0555             goto set_prop_done;
0556 
0557         if (drm_object_property_set_value(&connector->base,
0558                             property,
0559                             value))
0560             goto set_prop_error;
0561 
0562         if (crtc->saved_mode.hdisplay != 0 &&
0563             crtc->saved_mode.vdisplay != 0) {
0564             if (!drm_crtc_helper_set_mode(encoder->crtc,
0565                               &crtc->saved_mode,
0566                               encoder->crtc->x,
0567                               encoder->crtc->y,
0568                               encoder->crtc->primary->fb))
0569                 goto set_prop_error;
0570         }
0571     } else if (!strcmp(property->name, "backlight")) {
0572         if (drm_object_property_set_value(&connector->base,
0573                             property,
0574                             value))
0575             goto set_prop_error;
0576         else
0577                         gma_backlight_set(encoder->dev, value);
0578     } else if (!strcmp(property->name, "DPMS")) {
0579         const struct drm_encoder_helper_funcs *hfuncs
0580                         = encoder->helper_private;
0581         hfuncs->dpms(encoder, value);
0582     }
0583 
0584 set_prop_done:
0585     return 0;
0586 set_prop_error:
0587     return -1;
0588 }
0589 
0590 static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
0591     .dpms = psb_intel_lvds_encoder_dpms,
0592     .mode_fixup = psb_intel_lvds_mode_fixup,
0593     .prepare = psb_intel_lvds_prepare,
0594     .mode_set = psb_intel_lvds_mode_set,
0595     .commit = psb_intel_lvds_commit,
0596 };
0597 
0598 const struct drm_connector_helper_funcs
0599                 psb_intel_lvds_connector_helper_funcs = {
0600     .get_modes = psb_intel_lvds_get_modes,
0601     .mode_valid = psb_intel_lvds_mode_valid,
0602     .best_encoder = gma_best_encoder,
0603 };
0604 
0605 const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
0606     .dpms = drm_helper_connector_dpms,
0607     .fill_modes = drm_helper_probe_single_connector_modes,
0608     .set_property = psb_intel_lvds_set_property,
0609     .destroy = psb_intel_lvds_destroy,
0610 };
0611 
0612 /**
0613  * psb_intel_lvds_init - setup LVDS connectors on this device
0614  * @dev: drm device
0615  * @mode_dev: mode device
0616  *
0617  * Create the connector, register the LVDS DDC bus, and try to figure out what
0618  * modes we can display on the LVDS panel (if present).
0619  */
0620 void psb_intel_lvds_init(struct drm_device *dev,
0621              struct psb_intel_mode_device *mode_dev)
0622 {
0623     struct gma_encoder *gma_encoder;
0624     struct gma_connector *gma_connector;
0625     struct psb_intel_lvds_priv *lvds_priv;
0626     struct drm_connector *connector;
0627     struct drm_encoder *encoder;
0628     struct drm_display_mode *scan;  /* *modes, *bios_mode; */
0629     struct drm_crtc *crtc;
0630     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0631     struct gma_i2c_chan *ddc_bus;
0632     u32 lvds;
0633     int pipe;
0634     int ret;
0635 
0636     gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
0637     if (!gma_encoder) {
0638         dev_err(dev->dev, "gma_encoder allocation error\n");
0639         return;
0640     }
0641     encoder = &gma_encoder->base;
0642 
0643     gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
0644     if (!gma_connector) {
0645         dev_err(dev->dev, "gma_connector allocation error\n");
0646         goto err_free_encoder;
0647     }
0648 
0649     lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
0650     if (!lvds_priv) {
0651         dev_err(dev->dev, "LVDS private allocation error\n");
0652         goto err_free_connector;
0653     }
0654 
0655     gma_encoder->dev_priv = lvds_priv;
0656 
0657     connector = &gma_connector->base;
0658     gma_connector->save = psb_intel_lvds_save;
0659     gma_connector->restore = psb_intel_lvds_restore;
0660 
0661     /* Set up the DDC bus. */
0662     ddc_bus = gma_i2c_create(dev, GPIOC, "LVDSDDC_C");
0663     if (!ddc_bus) {
0664         dev_printk(KERN_ERR, dev->dev,
0665                "DDC bus registration " "failed.\n");
0666         goto err_free_lvds_priv;
0667     }
0668 
0669     ret = drm_connector_init_with_ddc(dev, connector,
0670                       &psb_intel_lvds_connector_funcs,
0671                       DRM_MODE_CONNECTOR_LVDS,
0672                       &ddc_bus->base);
0673     if (ret)
0674         goto err_ddc_destroy;
0675 
0676     ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_LVDS);
0677     if (ret)
0678         goto err_connector_cleanup;
0679 
0680     gma_connector_attach_encoder(gma_connector, gma_encoder);
0681     gma_encoder->type = INTEL_OUTPUT_LVDS;
0682 
0683     drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
0684     drm_connector_helper_add(connector,
0685                  &psb_intel_lvds_connector_helper_funcs);
0686     connector->display_info.subpixel_order = SubPixelHorizontalRGB;
0687     connector->interlace_allowed = false;
0688     connector->doublescan_allowed = false;
0689 
0690     /*Attach connector properties*/
0691     drm_object_attach_property(&connector->base,
0692                       dev->mode_config.scaling_mode_property,
0693                       DRM_MODE_SCALE_FULLSCREEN);
0694     drm_object_attach_property(&connector->base,
0695                       dev_priv->backlight_property,
0696                       BRIGHTNESS_MAX_LEVEL);
0697 
0698     /*
0699      * Set up I2C bus
0700      * FIXME: distroy i2c_bus when exit
0701      */
0702     lvds_priv->i2c_bus = gma_i2c_create(dev, GPIOB, "LVDSBLC_B");
0703     if (!lvds_priv->i2c_bus) {
0704         dev_printk(KERN_ERR,
0705             dev->dev, "I2C bus registration failed.\n");
0706         goto err_encoder_cleanup;
0707     }
0708     lvds_priv->i2c_bus->slave_addr = 0x2C;
0709     dev_priv->lvds_i2c_bus =  lvds_priv->i2c_bus;
0710 
0711     /*
0712      * LVDS discovery:
0713      * 1) check for EDID on DDC
0714      * 2) check for VBT data
0715      * 3) check to see if LVDS is already on
0716      *    if none of the above, no panel
0717      * 4) make sure lid is open
0718      *    if closed, act like it's not there for now
0719      */
0720 
0721     /*
0722      * Attempt to get the fixed panel mode from DDC.  Assume that the
0723      * preferred mode is the right one.
0724      */
0725     mutex_lock(&dev->mode_config.mutex);
0726     psb_intel_ddc_get_modes(connector, &ddc_bus->base);
0727 
0728     list_for_each_entry(scan, &connector->probed_modes, head) {
0729         if (scan->type & DRM_MODE_TYPE_PREFERRED) {
0730             mode_dev->panel_fixed_mode =
0731                 drm_mode_duplicate(dev, scan);
0732             DRM_DEBUG_KMS("Using mode from DDC\n");
0733             goto out;   /* FIXME: check for quirks */
0734         }
0735     }
0736 
0737     /* Failed to get EDID, what about VBT? do we need this? */
0738     if (dev_priv->lfp_lvds_vbt_mode) {
0739         mode_dev->panel_fixed_mode =
0740             drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
0741 
0742         if (mode_dev->panel_fixed_mode) {
0743             mode_dev->panel_fixed_mode->type |=
0744                 DRM_MODE_TYPE_PREFERRED;
0745             DRM_DEBUG_KMS("Using mode from VBT\n");
0746             goto out;
0747         }
0748     }
0749 
0750     /*
0751      * If we didn't get EDID, try checking if the panel is already turned
0752      * on.  If so, assume that whatever is currently programmed is the
0753      * correct mode.
0754      */
0755     lvds = REG_READ(LVDS);
0756     pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
0757     crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
0758 
0759     if (crtc && (lvds & LVDS_PORT_EN)) {
0760         mode_dev->panel_fixed_mode =
0761             psb_intel_crtc_mode_get(dev, crtc);
0762         if (mode_dev->panel_fixed_mode) {
0763             mode_dev->panel_fixed_mode->type |=
0764                 DRM_MODE_TYPE_PREFERRED;
0765             DRM_DEBUG_KMS("Using pre-programmed mode\n");
0766             goto out;   /* FIXME: check for quirks */
0767         }
0768     }
0769 
0770     /* If we still don't have a mode after all that, give up. */
0771     if (!mode_dev->panel_fixed_mode) {
0772         dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
0773         goto err_unlock;
0774     }
0775 
0776     /*
0777      * Blacklist machines with BIOSes that list an LVDS panel without
0778      * actually having one.
0779      */
0780 out:
0781     mutex_unlock(&dev->mode_config.mutex);
0782     return;
0783 
0784 err_unlock:
0785     mutex_unlock(&dev->mode_config.mutex);
0786     gma_i2c_destroy(lvds_priv->i2c_bus);
0787 err_encoder_cleanup:
0788     drm_encoder_cleanup(encoder);
0789 err_connector_cleanup:
0790     drm_connector_cleanup(connector);
0791 err_ddc_destroy:
0792     gma_i2c_destroy(ddc_bus);
0793 err_free_lvds_priv:
0794     kfree(lvds_priv);
0795 err_free_connector:
0796     kfree(gma_connector);
0797 err_free_encoder:
0798     kfree(gma_encoder);
0799 }
0800
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