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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /**************************************************************************
0003  * Copyright (c) 2007-2011, Intel Corporation.
0004  * All Rights Reserved.
0005  * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
0006  * All Rights Reserved.
0007  *
0008  **************************************************************************/
0009 
0010 #include <linux/cpu.h>
0011 #include <linux/module.h>
0012 #include <linux/notifier.h>
0013 #include <linux/pm_runtime.h>
0014 #include <linux/spinlock.h>
0015 #include <linux/delay.h>
0016 
0017 #include <asm/set_memory.h>
0018 
0019 #include <acpi/video.h>
0020 
0021 #include <drm/drm.h>
0022 #include <drm/drm_aperture.h>
0023 #include <drm/drm_drv.h>
0024 #include <drm/drm_fb_helper.h>
0025 #include <drm/drm_file.h>
0026 #include <drm/drm_ioctl.h>
0027 #include <drm/drm_pciids.h>
0028 #include <drm/drm_vblank.h>
0029 
0030 #include "framebuffer.h"
0031 #include "gem.h"
0032 #include "intel_bios.h"
0033 #include "mid_bios.h"
0034 #include "power.h"
0035 #include "psb_drv.h"
0036 #include "psb_intel_reg.h"
0037 #include "psb_irq.h"
0038 #include "psb_reg.h"
0039 
0040 static const struct drm_driver driver;
0041 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
0042 
0043 /*
0044  * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
0045  * to the different groups of PowerVR 5-series chip designs
0046  *
0047  * 0x8086 = Intel Corporation
0048  *
0049  * PowerVR SGX535    - Poulsbo    - Intel GMA 500, Intel Atom Z5xx
0050  * PowerVR SGX535    - Moorestown - Intel GMA 600
0051  * PowerVR SGX535    - Oaktrail   - Intel GMA 600, Intel Atom Z6xx, E6xx
0052  * PowerVR SGX545    - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
0053  * PowerVR SGX545    - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
0054  *                                  N2800
0055  */
0056 static const struct pci_device_id pciidlist[] = {
0057     /* Poulsbo */
0058     { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
0059     { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
0060     /* Oak Trail */
0061     { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
0062     { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
0063     { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
0064     { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
0065     { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
0066     { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
0067     { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
0068     { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
0069     { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
0070     /* Cedar Trail */
0071     { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0072     { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0073     { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0074     { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0075     { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0076     { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0077     { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0078     { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0079     { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0080     { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0081     { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0082     { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0083     { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0084     { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0085     { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0086     { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
0087     { 0, }
0088 };
0089 MODULE_DEVICE_TABLE(pci, pciidlist);
0090 
0091 /*
0092  * Standard IOCTLs.
0093  */
0094 static const struct drm_ioctl_desc psb_ioctls[] = {
0095 };
0096 
0097 /**
0098  *  psb_spank       -   reset the 2D engine
0099  *  @dev_priv: our PSB DRM device
0100  *
0101  *  Soft reset the graphics engine and then reload the necessary registers.
0102  */
0103 static void psb_spank(struct drm_psb_private *dev_priv)
0104 {
0105     PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
0106         _PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
0107         _PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
0108         _PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
0109     PSB_RSGX32(PSB_CR_SOFT_RESET);
0110 
0111     msleep(1);
0112 
0113     PSB_WSGX32(0, PSB_CR_SOFT_RESET);
0114     wmb();
0115     PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
0116            PSB_CR_BIF_CTRL);
0117     wmb();
0118     (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
0119 
0120     msleep(1);
0121     PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
0122            PSB_CR_BIF_CTRL);
0123     (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
0124     PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
0125 }
0126 
0127 static int psb_do_init(struct drm_device *dev)
0128 {
0129     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0130     struct psb_gtt *pg = &dev_priv->gtt;
0131 
0132     uint32_t stolen_gtt;
0133 
0134     if (pg->mmu_gatt_start & 0x0FFFFFFF) {
0135         dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
0136         return -EINVAL;
0137     }
0138 
0139     stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
0140     stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
0141     stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
0142 
0143     dev_priv->gatt_free_offset = pg->mmu_gatt_start +
0144         (stolen_gtt << PAGE_SHIFT) * 1024;
0145 
0146     spin_lock_init(&dev_priv->irqmask_lock);
0147 
0148     PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
0149     PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
0150     PSB_RSGX32(PSB_CR_BIF_BANK1);
0151 
0152     /* Do not bypass any MMU access, let them pagefault instead */
0153     PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
0154            PSB_CR_BIF_CTRL);
0155     PSB_RSGX32(PSB_CR_BIF_CTRL);
0156 
0157     psb_spank(dev_priv);
0158 
0159     /* mmu_gatt ?? */
0160     PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
0161     PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
0162 
0163     return 0;
0164 }
0165 
0166 static void psb_driver_unload(struct drm_device *dev)
0167 {
0168     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0169 
0170     /* TODO: Kill vblank etc here */
0171 
0172     if (dev_priv->backlight_device)
0173         gma_backlight_exit(dev);
0174     psb_modeset_cleanup(dev);
0175 
0176     gma_irq_uninstall(dev);
0177 
0178     if (dev_priv->ops->chip_teardown)
0179         dev_priv->ops->chip_teardown(dev);
0180 
0181     psb_intel_opregion_fini(dev);
0182 
0183     if (dev_priv->pf_pd) {
0184         psb_mmu_free_pagedir(dev_priv->pf_pd);
0185         dev_priv->pf_pd = NULL;
0186     }
0187     if (dev_priv->mmu) {
0188         struct psb_gtt *pg = &dev_priv->gtt;
0189 
0190         psb_mmu_remove_pfn_sequence(
0191             psb_mmu_get_default_pd
0192             (dev_priv->mmu),
0193             pg->mmu_gatt_start,
0194             dev_priv->vram_stolen_size >> PAGE_SHIFT);
0195         psb_mmu_driver_takedown(dev_priv->mmu);
0196         dev_priv->mmu = NULL;
0197     }
0198     psb_gem_mm_fini(dev);
0199     psb_gtt_fini(dev);
0200     if (dev_priv->scratch_page) {
0201         set_pages_wb(dev_priv->scratch_page, 1);
0202         __free_page(dev_priv->scratch_page);
0203         dev_priv->scratch_page = NULL;
0204     }
0205     if (dev_priv->vdc_reg) {
0206         iounmap(dev_priv->vdc_reg);
0207         dev_priv->vdc_reg = NULL;
0208     }
0209     if (dev_priv->sgx_reg) {
0210         iounmap(dev_priv->sgx_reg);
0211         dev_priv->sgx_reg = NULL;
0212     }
0213     if (dev_priv->aux_reg) {
0214         iounmap(dev_priv->aux_reg);
0215         dev_priv->aux_reg = NULL;
0216     }
0217     pci_dev_put(dev_priv->aux_pdev);
0218     pci_dev_put(dev_priv->lpc_pdev);
0219 
0220     /* Destroy VBT data */
0221     psb_intel_destroy_bios(dev);
0222 
0223     gma_power_uninit(dev);
0224 }
0225 
0226 static void psb_device_release(void *data)
0227 {
0228     struct drm_device *dev = data;
0229 
0230     psb_driver_unload(dev);
0231 }
0232 
0233 static int psb_driver_load(struct drm_device *dev, unsigned long flags)
0234 {
0235     struct pci_dev *pdev = to_pci_dev(dev->dev);
0236     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0237     unsigned long resource_start, resource_len;
0238     unsigned long irqflags;
0239     struct drm_connector_list_iter conn_iter;
0240     struct drm_connector *connector;
0241     struct gma_encoder *gma_encoder;
0242     struct psb_gtt *pg;
0243     int ret = -ENOMEM;
0244 
0245     /* initializing driver private data */
0246 
0247     dev_priv->ops = (struct psb_ops *)flags;
0248 
0249     pg = &dev_priv->gtt;
0250 
0251     pci_set_master(pdev);
0252 
0253     dev_priv->num_pipe = dev_priv->ops->pipes;
0254 
0255     resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE);
0256 
0257     dev_priv->vdc_reg =
0258         ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
0259     if (!dev_priv->vdc_reg)
0260         goto out_err;
0261 
0262     dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
0263                             PSB_SGX_SIZE);
0264     if (!dev_priv->sgx_reg)
0265         goto out_err;
0266 
0267     if (IS_MRST(dev)) {
0268         int domain = pci_domain_nr(pdev->bus);
0269 
0270         dev_priv->aux_pdev =
0271             pci_get_domain_bus_and_slot(domain, 0,
0272                             PCI_DEVFN(3, 0));
0273 
0274         if (dev_priv->aux_pdev) {
0275             resource_start = pci_resource_start(dev_priv->aux_pdev,
0276                                 PSB_AUX_RESOURCE);
0277             resource_len = pci_resource_len(dev_priv->aux_pdev,
0278                             PSB_AUX_RESOURCE);
0279             dev_priv->aux_reg = ioremap(resource_start,
0280                                 resource_len);
0281             if (!dev_priv->aux_reg)
0282                 goto out_err;
0283 
0284             DRM_DEBUG_KMS("Found aux vdc");
0285         } else {
0286             /* Couldn't find the aux vdc so map to primary vdc */
0287             dev_priv->aux_reg = dev_priv->vdc_reg;
0288             DRM_DEBUG_KMS("Couldn't find aux pci device");
0289         }
0290         dev_priv->gmbus_reg = dev_priv->aux_reg;
0291 
0292         dev_priv->lpc_pdev =
0293             pci_get_domain_bus_and_slot(domain, 0,
0294                             PCI_DEVFN(31, 0));
0295         if (dev_priv->lpc_pdev) {
0296             pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
0297                 &dev_priv->lpc_gpio_base);
0298             pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
0299                 (u32)dev_priv->lpc_gpio_base | (1L<<31));
0300             pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
0301                 &dev_priv->lpc_gpio_base);
0302             dev_priv->lpc_gpio_base &= 0xffc0;
0303             if (dev_priv->lpc_gpio_base)
0304                 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
0305                         dev_priv->lpc_gpio_base);
0306             else {
0307                 pci_dev_put(dev_priv->lpc_pdev);
0308                 dev_priv->lpc_pdev = NULL;
0309             }
0310         }
0311     } else {
0312         dev_priv->gmbus_reg = dev_priv->vdc_reg;
0313     }
0314 
0315     psb_intel_opregion_setup(dev);
0316 
0317     ret = dev_priv->ops->chip_setup(dev);
0318     if (ret)
0319         goto out_err;
0320 
0321     /* Init OSPM support */
0322     gma_power_init(dev);
0323 
0324     ret = -ENOMEM;
0325 
0326     dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
0327     if (!dev_priv->scratch_page)
0328         goto out_err;
0329 
0330     set_pages_uc(dev_priv->scratch_page, 1);
0331 
0332     ret = psb_gtt_init(dev);
0333     if (ret)
0334         goto out_err;
0335     ret = psb_gem_mm_init(dev);
0336     if (ret)
0337         goto out_err;
0338 
0339     ret = -ENOMEM;
0340 
0341     dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, NULL);
0342     if (!dev_priv->mmu)
0343         goto out_err;
0344 
0345     dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
0346     if (!dev_priv->pf_pd)
0347         goto out_err;
0348 
0349     ret = psb_do_init(dev);
0350     if (ret)
0351         return ret;
0352 
0353     /* Add stolen memory to SGX MMU */
0354     ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
0355                       dev_priv->stolen_base >> PAGE_SHIFT,
0356                       pg->gatt_start,
0357                       pg->stolen_size >> PAGE_SHIFT, 0);
0358 
0359     psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
0360     psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
0361 
0362     PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
0363     PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
0364 
0365     acpi_video_register();
0366 
0367     /* Setup vertical blanking handling */
0368     ret = drm_vblank_init(dev, dev_priv->num_pipe);
0369     if (ret)
0370         goto out_err;
0371 
0372     /*
0373      * Install interrupt handlers prior to powering off SGX or else we will
0374      * crash.
0375      */
0376     dev_priv->vdc_irq_mask = 0;
0377     dev_priv->pipestat[0] = 0;
0378     dev_priv->pipestat[1] = 0;
0379     dev_priv->pipestat[2] = 0;
0380     spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
0381     PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
0382     PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
0383     PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
0384     spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
0385 
0386     gma_irq_install(dev);
0387 
0388     dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
0389 
0390     psb_modeset_init(dev);
0391     psb_fbdev_init(dev);
0392     drm_kms_helper_poll_init(dev);
0393 
0394     /* Only add backlight support if we have LVDS or MIPI output */
0395     drm_connector_list_iter_begin(dev, &conn_iter);
0396     drm_for_each_connector_iter(connector, &conn_iter) {
0397         gma_encoder = gma_attached_encoder(connector);
0398 
0399         if (gma_encoder->type == INTEL_OUTPUT_LVDS ||
0400             gma_encoder->type == INTEL_OUTPUT_MIPI) {
0401             ret = gma_backlight_init(dev);
0402             break;
0403         }
0404     }
0405     drm_connector_list_iter_end(&conn_iter);
0406 
0407     if (ret)
0408         return ret;
0409     psb_intel_opregion_enable_asle(dev);
0410 #if 0
0411     /* Enable runtime pm at last */
0412     pm_runtime_enable(dev->dev);
0413     pm_runtime_set_active(dev->dev);
0414 #endif
0415 
0416     return devm_add_action_or_reset(dev->dev, psb_device_release, dev);
0417 
0418 out_err:
0419     psb_driver_unload(dev);
0420     return ret;
0421 }
0422 
0423 static inline void get_brightness(struct backlight_device *bd)
0424 {
0425 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
0426     if (bd) {
0427         bd->props.brightness = bd->ops->get_brightness(bd);
0428         backlight_update_status(bd);
0429     }
0430 #endif
0431 }
0432 
0433 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
0434                    unsigned long arg)
0435 {
0436     struct drm_file *file_priv = filp->private_data;
0437     struct drm_device *dev = file_priv->minor->dev;
0438     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0439     static unsigned int runtime_allowed;
0440 
0441     if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
0442         runtime_allowed++;
0443         pm_runtime_allow(dev->dev);
0444         dev_priv->rpm_enabled = 1;
0445     }
0446     return drm_ioctl(filp, cmd, arg);
0447     /* FIXME: do we need to wrap the other side of this */
0448 }
0449 
0450 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
0451 {
0452     struct drm_psb_private *dev_priv;
0453     struct drm_device *dev;
0454     int ret;
0455 
0456     /*
0457      * We cannot yet easily find the framebuffer's location in memory. So
0458      * remove all framebuffers here.
0459      *
0460      * TODO: Refactor psb_driver_load() to map vdc_reg earlier. Then we
0461      *       might be able to read the framebuffer range from the device.
0462      */
0463     ret = drm_aperture_remove_framebuffers(true, &driver);
0464     if (ret)
0465         return ret;
0466 
0467     ret = pcim_enable_device(pdev);
0468     if (ret)
0469         return ret;
0470 
0471     dev_priv = devm_drm_dev_alloc(&pdev->dev, &driver, struct drm_psb_private, dev);
0472     if (IS_ERR(dev_priv))
0473         return PTR_ERR(dev_priv);
0474     dev = &dev_priv->dev;
0475 
0476     pci_set_drvdata(pdev, dev);
0477 
0478     ret = psb_driver_load(dev, ent->driver_data);
0479     if (ret)
0480         return ret;
0481 
0482     ret = drm_dev_register(dev, ent->driver_data);
0483     if (ret)
0484         return ret;
0485 
0486     return 0;
0487 }
0488 
0489 static void psb_pci_remove(struct pci_dev *pdev)
0490 {
0491     struct drm_device *dev = pci_get_drvdata(pdev);
0492 
0493     drm_dev_unregister(dev);
0494 }
0495 
0496 static const struct dev_pm_ops psb_pm_ops = {
0497     .resume = gma_power_resume,
0498     .suspend = gma_power_suspend,
0499     .thaw = gma_power_thaw,
0500     .freeze = gma_power_freeze,
0501     .restore = gma_power_restore,
0502     .runtime_suspend = psb_runtime_suspend,
0503     .runtime_resume = psb_runtime_resume,
0504     .runtime_idle = psb_runtime_idle,
0505 };
0506 
0507 static const struct file_operations psb_gem_fops = {
0508     .owner = THIS_MODULE,
0509     .open = drm_open,
0510     .release = drm_release,
0511     .unlocked_ioctl = psb_unlocked_ioctl,
0512     .compat_ioctl = drm_compat_ioctl,
0513     .mmap = drm_gem_mmap,
0514     .poll = drm_poll,
0515     .read = drm_read,
0516 };
0517 
0518 static const struct drm_driver driver = {
0519     .driver_features = DRIVER_MODESET | DRIVER_GEM,
0520     .lastclose = drm_fb_helper_lastclose,
0521 
0522     .num_ioctls = ARRAY_SIZE(psb_ioctls),
0523 
0524     .dumb_create = psb_gem_dumb_create,
0525     .ioctls = psb_ioctls,
0526     .fops = &psb_gem_fops,
0527     .name = DRIVER_NAME,
0528     .desc = DRIVER_DESC,
0529     .date = DRIVER_DATE,
0530     .major = DRIVER_MAJOR,
0531     .minor = DRIVER_MINOR,
0532     .patchlevel = DRIVER_PATCHLEVEL
0533 };
0534 
0535 static struct pci_driver psb_pci_driver = {
0536     .name = DRIVER_NAME,
0537     .id_table = pciidlist,
0538     .probe = psb_pci_probe,
0539     .remove = psb_pci_remove,
0540     .driver.pm = &psb_pm_ops,
0541 };
0542 
0543 static int __init psb_init(void)
0544 {
0545     if (drm_firmware_drivers_only())
0546         return -ENODEV;
0547 
0548     return pci_register_driver(&psb_pci_driver);
0549 }
0550 
0551 static void __exit psb_exit(void)
0552 {
0553     pci_unregister_driver(&psb_pci_driver);
0554 }
0555 
0556 late_initcall(psb_init);
0557 module_exit(psb_exit);
0558 
0559 MODULE_AUTHOR(DRIVER_AUTHOR);
0560 MODULE_DESCRIPTION(DRIVER_DESC);
0561 MODULE_LICENSE("GPL");
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