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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright © 2006-2011 Intel Corporation
0004  *
0005  * Authors:
0006  *  Eric Anholt <eric@anholt.net>
0007  *  Dave Airlie <airlied@linux.ie>
0008  *  Jesse Barnes <jesse.barnes@intel.com>
0009  */
0010 
0011 #include <linux/dmi.h>
0012 #include <linux/i2c.h>
0013 #include <linux/pm_runtime.h>
0014 
0015 #include <drm/drm_simple_kms_helper.h>
0016 
0017 #include "cdv_device.h"
0018 #include "intel_bios.h"
0019 #include "power.h"
0020 #include "psb_drv.h"
0021 #include "psb_intel_drv.h"
0022 #include "psb_intel_reg.h"
0023 
0024 /*
0025  * LVDS I2C backlight control macros
0026  */
0027 #define BRIGHTNESS_MAX_LEVEL 100
0028 #define BRIGHTNESS_MASK 0xFF
0029 #define BLC_I2C_TYPE    0x01
0030 #define BLC_PWM_TYPT    0x02
0031 
0032 #define BLC_POLARITY_NORMAL 0
0033 #define BLC_POLARITY_INVERSE 1
0034 
0035 #define PSB_BLC_MAX_PWM_REG_FREQ       (0xFFFE)
0036 #define PSB_BLC_MIN_PWM_REG_FREQ    (0x2)
0037 #define PSB_BLC_PWM_PRECISION_FACTOR    (10)
0038 #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
0039 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
0040 
0041 struct cdv_intel_lvds_priv {
0042     /**
0043      * Saved LVDO output states
0044      */
0045     uint32_t savePP_ON;
0046     uint32_t savePP_OFF;
0047     uint32_t saveLVDS;
0048     uint32_t savePP_CONTROL;
0049     uint32_t savePP_CYCLE;
0050     uint32_t savePFIT_CONTROL;
0051     uint32_t savePFIT_PGM_RATIOS;
0052     uint32_t saveBLC_PWM_CTL;
0053 };
0054 
0055 /*
0056  * Returns the maximum level of the backlight duty cycle field.
0057  */
0058 static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev)
0059 {
0060     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0061     u32 retval;
0062 
0063     if (gma_power_begin(dev, false)) {
0064         retval = ((REG_READ(BLC_PWM_CTL) &
0065               BACKLIGHT_MODULATION_FREQ_MASK) >>
0066               BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
0067 
0068         gma_power_end(dev);
0069     } else
0070         retval = ((dev_priv->regs.saveBLC_PWM_CTL &
0071               BACKLIGHT_MODULATION_FREQ_MASK) >>
0072               BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
0073 
0074     return retval;
0075 }
0076 
0077 /*
0078  * Sets the backlight level.
0079  *
0080  * level backlight level, from 0 to cdv_intel_lvds_get_max_backlight().
0081  */
0082 static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
0083 {
0084     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0085     u32 blc_pwm_ctl;
0086 
0087     if (gma_power_begin(dev, false)) {
0088         blc_pwm_ctl =
0089             REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
0090         REG_WRITE(BLC_PWM_CTL,
0091                 (blc_pwm_ctl |
0092                 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
0093         gma_power_end(dev);
0094     } else {
0095         blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
0096                 ~BACKLIGHT_DUTY_CYCLE_MASK;
0097         dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
0098                     (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
0099     }
0100 }
0101 
0102 /*
0103  * Sets the power state for the panel.
0104  */
0105 static void cdv_intel_lvds_set_power(struct drm_device *dev,
0106                      struct drm_encoder *encoder, bool on)
0107 {
0108     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0109     u32 pp_status;
0110 
0111     if (!gma_power_begin(dev, true))
0112         return;
0113 
0114     if (on) {
0115         REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
0116               POWER_TARGET_ON);
0117         do {
0118             pp_status = REG_READ(PP_STATUS);
0119         } while ((pp_status & PP_ON) == 0);
0120 
0121         cdv_intel_lvds_set_backlight(dev,
0122                 dev_priv->mode_dev.backlight_duty_cycle);
0123     } else {
0124         cdv_intel_lvds_set_backlight(dev, 0);
0125 
0126         REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
0127               ~POWER_TARGET_ON);
0128         do {
0129             pp_status = REG_READ(PP_STATUS);
0130         } while (pp_status & PP_ON);
0131     }
0132     gma_power_end(dev);
0133 }
0134 
0135 static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
0136 {
0137     struct drm_device *dev = encoder->dev;
0138     if (mode == DRM_MODE_DPMS_ON)
0139         cdv_intel_lvds_set_power(dev, encoder, true);
0140     else
0141         cdv_intel_lvds_set_power(dev, encoder, false);
0142     /* XXX: We never power down the LVDS pairs. */
0143 }
0144 
0145 static void cdv_intel_lvds_save(struct drm_connector *connector)
0146 {
0147 }
0148 
0149 static void cdv_intel_lvds_restore(struct drm_connector *connector)
0150 {
0151 }
0152 
0153 static enum drm_mode_status cdv_intel_lvds_mode_valid(struct drm_connector *connector,
0154                   struct drm_display_mode *mode)
0155 {
0156     struct drm_device *dev = connector->dev;
0157     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0158     struct drm_display_mode *fixed_mode =
0159                     dev_priv->mode_dev.panel_fixed_mode;
0160 
0161     /* just in case */
0162     if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
0163         return MODE_NO_DBLESCAN;
0164 
0165     /* just in case */
0166     if (mode->flags & DRM_MODE_FLAG_INTERLACE)
0167         return MODE_NO_INTERLACE;
0168 
0169     if (fixed_mode) {
0170         if (mode->hdisplay > fixed_mode->hdisplay)
0171             return MODE_PANEL;
0172         if (mode->vdisplay > fixed_mode->vdisplay)
0173             return MODE_PANEL;
0174     }
0175     return MODE_OK;
0176 }
0177 
0178 static bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
0179                   const struct drm_display_mode *mode,
0180                   struct drm_display_mode *adjusted_mode)
0181 {
0182     struct drm_device *dev = encoder->dev;
0183     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0184     struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
0185     struct drm_encoder *tmp_encoder;
0186     struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
0187 
0188     /* Should never happen!! */
0189     list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
0190                 head) {
0191         if (tmp_encoder != encoder
0192             && tmp_encoder->crtc == encoder->crtc) {
0193             pr_err("Can't enable LVDS and another encoder on the same pipe\n");
0194             return false;
0195         }
0196     }
0197 
0198     /*
0199      * If we have timings from the BIOS for the panel, put them in
0200      * to the adjusted mode.  The CRTC will be set up for this mode,
0201      * with the panel scaling set up to source from the H/VDisplay
0202      * of the original mode.
0203      */
0204     if (panel_fixed_mode != NULL) {
0205         adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
0206         adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
0207         adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
0208         adjusted_mode->htotal = panel_fixed_mode->htotal;
0209         adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
0210         adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
0211         adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
0212         adjusted_mode->vtotal = panel_fixed_mode->vtotal;
0213         adjusted_mode->clock = panel_fixed_mode->clock;
0214         drm_mode_set_crtcinfo(adjusted_mode,
0215                       CRTC_INTERLACE_HALVE_V);
0216     }
0217 
0218     /*
0219      * XXX: It would be nice to support lower refresh rates on the
0220      * panels to reduce power consumption, and perhaps match the
0221      * user's requested refresh rate.
0222      */
0223 
0224     return true;
0225 }
0226 
0227 static void cdv_intel_lvds_prepare(struct drm_encoder *encoder)
0228 {
0229     struct drm_device *dev = encoder->dev;
0230     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0231     struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
0232 
0233     if (!gma_power_begin(dev, true))
0234         return;
0235 
0236     mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
0237     mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
0238                       BACKLIGHT_DUTY_CYCLE_MASK);
0239 
0240     cdv_intel_lvds_set_power(dev, encoder, false);
0241 
0242     gma_power_end(dev);
0243 }
0244 
0245 static void cdv_intel_lvds_commit(struct drm_encoder *encoder)
0246 {
0247     struct drm_device *dev = encoder->dev;
0248     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0249     struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
0250 
0251     if (mode_dev->backlight_duty_cycle == 0)
0252         mode_dev->backlight_duty_cycle =
0253             cdv_intel_lvds_get_max_backlight(dev);
0254 
0255     cdv_intel_lvds_set_power(dev, encoder, true);
0256 }
0257 
0258 static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
0259                 struct drm_display_mode *mode,
0260                 struct drm_display_mode *adjusted_mode)
0261 {
0262     struct drm_device *dev = encoder->dev;
0263     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0264     struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
0265     u32 pfit_control;
0266 
0267     /*
0268      * The LVDS pin pair will already have been turned on in the
0269      * cdv_intel_crtc_mode_set since it has a large impact on the DPLL
0270      * settings.
0271      */
0272 
0273     /*
0274      * Enable automatic panel scaling so that non-native modes fill the
0275      * screen.  Should be enabled before the pipe is enabled, according to
0276      * register description and PRM.
0277      */
0278     if (mode->hdisplay != adjusted_mode->hdisplay ||
0279         mode->vdisplay != adjusted_mode->vdisplay)
0280         pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
0281                 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
0282                 HORIZ_INTERP_BILINEAR);
0283     else
0284         pfit_control = 0;
0285 
0286     pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
0287 
0288     if (dev_priv->lvds_dither)
0289         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
0290 
0291     REG_WRITE(PFIT_CONTROL, pfit_control);
0292 }
0293 
0294 /*
0295  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
0296  */
0297 static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
0298 {
0299     struct drm_device *dev = connector->dev;
0300     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0301     struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
0302     int ret;
0303 
0304     ret = psb_intel_ddc_get_modes(connector, connector->ddc);
0305 
0306     if (ret)
0307         return ret;
0308 
0309     if (mode_dev->panel_fixed_mode != NULL) {
0310         struct drm_display_mode *mode =
0311             drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
0312         drm_mode_probed_add(connector, mode);
0313         return 1;
0314     }
0315 
0316     return 0;
0317 }
0318 
0319 static void cdv_intel_lvds_destroy(struct drm_connector *connector)
0320 {
0321     struct gma_connector *gma_connector = to_gma_connector(connector);
0322     struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
0323 
0324     gma_i2c_destroy(to_gma_i2c_chan(connector->ddc));
0325     gma_i2c_destroy(gma_encoder->i2c_bus);
0326     drm_connector_cleanup(connector);
0327     kfree(gma_connector);
0328 }
0329 
0330 static int cdv_intel_lvds_set_property(struct drm_connector *connector,
0331                        struct drm_property *property,
0332                        uint64_t value)
0333 {
0334     struct drm_encoder *encoder = connector->encoder;
0335 
0336     if (!strcmp(property->name, "scaling mode") && encoder) {
0337         struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
0338         uint64_t curValue;
0339 
0340         if (!crtc)
0341             return -1;
0342 
0343         switch (value) {
0344         case DRM_MODE_SCALE_FULLSCREEN:
0345             break;
0346         case DRM_MODE_SCALE_NO_SCALE:
0347             break;
0348         case DRM_MODE_SCALE_ASPECT:
0349             break;
0350         default:
0351             return -1;
0352         }
0353 
0354         if (drm_object_property_get_value(&connector->base,
0355                              property,
0356                              &curValue))
0357             return -1;
0358 
0359         if (curValue == value)
0360             return 0;
0361 
0362         if (drm_object_property_set_value(&connector->base,
0363                             property,
0364                             value))
0365             return -1;
0366 
0367         if (crtc->saved_mode.hdisplay != 0 &&
0368             crtc->saved_mode.vdisplay != 0) {
0369             if (!drm_crtc_helper_set_mode(encoder->crtc,
0370                               &crtc->saved_mode,
0371                               encoder->crtc->x,
0372                               encoder->crtc->y,
0373                               encoder->crtc->primary->fb))
0374                 return -1;
0375         }
0376     } else if (!strcmp(property->name, "backlight") && encoder) {
0377         if (drm_object_property_set_value(&connector->base,
0378                             property,
0379                             value))
0380             return -1;
0381         else
0382                         gma_backlight_set(encoder->dev, value);
0383     } else if (!strcmp(property->name, "DPMS") && encoder) {
0384         const struct drm_encoder_helper_funcs *helpers =
0385                     encoder->helper_private;
0386         helpers->dpms(encoder, value);
0387     }
0388     return 0;
0389 }
0390 
0391 static const struct drm_encoder_helper_funcs
0392                     cdv_intel_lvds_helper_funcs = {
0393     .dpms = cdv_intel_lvds_encoder_dpms,
0394     .mode_fixup = cdv_intel_lvds_mode_fixup,
0395     .prepare = cdv_intel_lvds_prepare,
0396     .mode_set = cdv_intel_lvds_mode_set,
0397     .commit = cdv_intel_lvds_commit,
0398 };
0399 
0400 static const struct drm_connector_helper_funcs
0401                 cdv_intel_lvds_connector_helper_funcs = {
0402     .get_modes = cdv_intel_lvds_get_modes,
0403     .mode_valid = cdv_intel_lvds_mode_valid,
0404     .best_encoder = gma_best_encoder,
0405 };
0406 
0407 static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
0408     .dpms = drm_helper_connector_dpms,
0409     .fill_modes = drm_helper_probe_single_connector_modes,
0410     .set_property = cdv_intel_lvds_set_property,
0411     .destroy = cdv_intel_lvds_destroy,
0412 };
0413 
0414 /*
0415  * Enumerate the child dev array parsed from VBT to check whether
0416  * the LVDS is present.
0417  * If it is present, return 1.
0418  * If it is not present, return false.
0419  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
0420  */
0421 static bool lvds_is_present_in_vbt(struct drm_device *dev,
0422                    u8 *i2c_pin)
0423 {
0424     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0425     int i;
0426 
0427     if (!dev_priv->child_dev_num)
0428         return true;
0429 
0430     for (i = 0; i < dev_priv->child_dev_num; i++) {
0431         struct child_device_config *child = dev_priv->child_dev + i;
0432 
0433         /* If the device type is not LFP, continue.
0434          * We have to check both the new identifiers as well as the
0435          * old for compatibility with some BIOSes.
0436          */
0437         if (child->device_type != DEVICE_TYPE_INT_LFP &&
0438             child->device_type != DEVICE_TYPE_LFP)
0439             continue;
0440 
0441         if (child->i2c_pin)
0442             *i2c_pin = child->i2c_pin;
0443 
0444         /* However, we cannot trust the BIOS writers to populate
0445          * the VBT correctly.  Since LVDS requires additional
0446          * information from AIM blocks, a non-zero addin offset is
0447          * a good indicator that the LVDS is actually present.
0448          */
0449         if (child->addin_offset)
0450             return true;
0451 
0452         /* But even then some BIOS writers perform some black magic
0453          * and instantiate the device without reference to any
0454          * additional data.  Trust that if the VBT was written into
0455          * the OpRegion then they have validated the LVDS's existence.
0456          */
0457         if (dev_priv->opregion.vbt)
0458             return true;
0459     }
0460 
0461     return false;
0462 }
0463 
0464 /**
0465  * cdv_intel_lvds_init - setup LVDS connectors on this device
0466  * @dev: drm device
0467  * @mode_dev: PSB mode device
0468  *
0469  * Create the connector, register the LVDS DDC bus, and try to figure out what
0470  * modes we can display on the LVDS panel (if present).
0471  */
0472 void cdv_intel_lvds_init(struct drm_device *dev,
0473              struct psb_intel_mode_device *mode_dev)
0474 {
0475     struct gma_encoder *gma_encoder;
0476     struct gma_connector *gma_connector;
0477     struct cdv_intel_lvds_priv *lvds_priv;
0478     struct drm_connector *connector;
0479     struct drm_encoder *encoder;
0480     struct drm_display_mode *scan;
0481     struct drm_crtc *crtc;
0482     struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
0483     struct gma_i2c_chan *ddc_bus;
0484     u32 lvds;
0485     int pipe;
0486     int ret;
0487     u8 pin;
0488 
0489     if (!dev_priv->lvds_enabled_in_vbt)
0490         return;
0491 
0492     pin = GMBUS_PORT_PANEL;
0493     if (!lvds_is_present_in_vbt(dev, &pin)) {
0494         DRM_DEBUG_KMS("LVDS is not present in VBT\n");
0495         return;
0496     }
0497 
0498     gma_encoder = kzalloc(sizeof(struct gma_encoder),
0499                     GFP_KERNEL);
0500     if (!gma_encoder)
0501         return;
0502 
0503     gma_connector = kzalloc(sizeof(struct gma_connector),
0504                       GFP_KERNEL);
0505     if (!gma_connector)
0506         goto err_free_encoder;
0507 
0508     lvds_priv = kzalloc(sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL);
0509     if (!lvds_priv)
0510         goto err_free_connector;
0511 
0512     gma_encoder->dev_priv = lvds_priv;
0513 
0514     connector = &gma_connector->base;
0515     gma_connector->save = cdv_intel_lvds_save;
0516     gma_connector->restore = cdv_intel_lvds_restore;
0517     encoder = &gma_encoder->base;
0518 
0519     /* Set up the DDC bus. */
0520     ddc_bus = gma_i2c_create(dev, GPIOC, "LVDSDDC_C");
0521     if (!ddc_bus) {
0522         dev_printk(KERN_ERR, dev->dev,
0523                "DDC bus registration " "failed.\n");
0524         goto err_free_lvds_priv;
0525     }
0526 
0527     ret = drm_connector_init_with_ddc(dev, connector,
0528                       &cdv_intel_lvds_connector_funcs,
0529                       DRM_MODE_CONNECTOR_LVDS,
0530                       &ddc_bus->base);
0531     if (ret)
0532         goto err_destroy_ddc;
0533 
0534     ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_LVDS);
0535     if (ret)
0536         goto err_connector_cleanup;
0537 
0538     gma_connector_attach_encoder(gma_connector, gma_encoder);
0539     gma_encoder->type = INTEL_OUTPUT_LVDS;
0540 
0541     drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
0542     drm_connector_helper_add(connector,
0543                  &cdv_intel_lvds_connector_helper_funcs);
0544     connector->display_info.subpixel_order = SubPixelHorizontalRGB;
0545     connector->interlace_allowed = false;
0546     connector->doublescan_allowed = false;
0547 
0548     /*Attach connector properties*/
0549     drm_object_attach_property(&connector->base,
0550                       dev->mode_config.scaling_mode_property,
0551                       DRM_MODE_SCALE_FULLSCREEN);
0552     drm_object_attach_property(&connector->base,
0553                       dev_priv->backlight_property,
0554                       BRIGHTNESS_MAX_LEVEL);
0555 
0556     /**
0557      * Set up I2C bus
0558      * FIXME: distroy i2c_bus when exit
0559      */
0560     gma_encoder->i2c_bus = gma_i2c_create(dev, GPIOB, "LVDSBLC_B");
0561     if (!gma_encoder->i2c_bus) {
0562         dev_printk(KERN_ERR,
0563             dev->dev, "I2C bus registration failed.\n");
0564         goto err_encoder_cleanup;
0565     }
0566     gma_encoder->i2c_bus->slave_addr = 0x2C;
0567     dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus;
0568 
0569     /*
0570      * LVDS discovery:
0571      * 1) check for EDID on DDC
0572      * 2) check for VBT data
0573      * 3) check to see if LVDS is already on
0574      *    if none of the above, no panel
0575      * 4) make sure lid is open
0576      *    if closed, act like it's not there for now
0577      */
0578 
0579     /*
0580      * Attempt to get the fixed panel mode from DDC.  Assume that the
0581      * preferred mode is the right one.
0582      */
0583     mutex_lock(&dev->mode_config.mutex);
0584     psb_intel_ddc_get_modes(connector, &ddc_bus->base);
0585 
0586     list_for_each_entry(scan, &connector->probed_modes, head) {
0587         if (scan->type & DRM_MODE_TYPE_PREFERRED) {
0588             mode_dev->panel_fixed_mode =
0589                 drm_mode_duplicate(dev, scan);
0590             goto out;   /* FIXME: check for quirks */
0591         }
0592     }
0593 
0594     /* Failed to get EDID, what about VBT? do we need this?*/
0595     if (dev_priv->lfp_lvds_vbt_mode) {
0596         mode_dev->panel_fixed_mode =
0597             drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
0598         if (mode_dev->panel_fixed_mode) {
0599             mode_dev->panel_fixed_mode->type |=
0600                 DRM_MODE_TYPE_PREFERRED;
0601             goto out;   /* FIXME: check for quirks */
0602         }
0603     }
0604     /*
0605      * If we didn't get EDID, try checking if the panel is already turned
0606      * on.  If so, assume that whatever is currently programmed is the
0607      * correct mode.
0608      */
0609     lvds = REG_READ(LVDS);
0610     pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
0611     crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
0612 
0613     if (crtc && (lvds & LVDS_PORT_EN)) {
0614         mode_dev->panel_fixed_mode =
0615             cdv_intel_crtc_mode_get(dev, crtc);
0616         if (mode_dev->panel_fixed_mode) {
0617             mode_dev->panel_fixed_mode->type |=
0618                 DRM_MODE_TYPE_PREFERRED;
0619             goto out;   /* FIXME: check for quirks */
0620         }
0621     }
0622 
0623     /* If we still don't have a mode after all that, give up. */
0624     if (!mode_dev->panel_fixed_mode) {
0625         DRM_DEBUG
0626             ("Found no modes on the lvds, ignoring the LVDS\n");
0627         goto err_unlock;
0628     }
0629 
0630     /* setup PWM */
0631     {
0632         u32 pwm;
0633 
0634         pwm = REG_READ(BLC_PWM_CTL2);
0635         if (pipe == 1)
0636             pwm |= PWM_PIPE_B;
0637         else
0638             pwm &= ~PWM_PIPE_B;
0639         pwm |= PWM_ENABLE;
0640         REG_WRITE(BLC_PWM_CTL2, pwm);
0641     }
0642 
0643 out:
0644     mutex_unlock(&dev->mode_config.mutex);
0645     return;
0646 
0647 err_unlock:
0648     mutex_unlock(&dev->mode_config.mutex);
0649     gma_i2c_destroy(gma_encoder->i2c_bus);
0650 err_encoder_cleanup:
0651     drm_encoder_cleanup(encoder);
0652 err_connector_cleanup:
0653     drm_connector_cleanup(connector);
0654 err_destroy_ddc:
0655     gma_i2c_destroy(ddc_bus);
0656 err_free_lvds_priv:
0657     kfree(lvds_priv);
0658 err_free_connector:
0659     kfree(gma_connector);
0660 err_free_encoder:
0661     kfree(gma_encoder);
0662 }
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