bridge/synopsys/dw-hdmi-i2s-audio.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * dw-hdmi-i2s-audio.c
0004  *
0005  * Copyright (c) 2017 Renesas Solutions Corp.
0006  * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
0007  */
0008
0009 #include <linux/dma-mapping.h>
0010 #include <linux/module.h>
0011
0012 #include <drm/bridge/dw_hdmi.h>
0013 #include <drm/drm_crtc.h>
0014
0015 #include <sound/hdmi-codec.h>
0016
0017 #include "dw-hdmi.h"
0018 #include "dw-hdmi-audio.h"
0019
0020 #define DRIVER_NAME "dw-hdmi-i2s-audio"
0021
0022 static inline void hdmi_write(struct dw_hdmi_i2s_audio_data *audio,
0023                   u8 val, int offset)
0024 {
0025     struct dw_hdmi *hdmi = audio->hdmi;
0026
0027     audio->write(hdmi, val, offset);
0028 }
0029
0030 static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset)
0031 {
0032     struct dw_hdmi *hdmi = audio->hdmi;
0033
0034     return audio->read(hdmi, offset);
0035 }
0036
0037 static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
0038                  struct hdmi_codec_daifmt *fmt,
0039                  struct hdmi_codec_params *hparms)
0040 {
0041     struct dw_hdmi_i2s_audio_data *audio = data;
0042     struct dw_hdmi *hdmi = audio->hdmi;
0043     u8 conf0 = 0;
0044     u8 conf1 = 0;
0045     u8 inputclkfs = 0;
0046
0047     /* it cares I2S only */
0048     if (fmt->bit_clk_provider | fmt->frame_clk_provider) {
0049         dev_err(dev, "unsupported clock settings\n");
0050         return -EINVAL;
0051     }
0052
0053     /* Reset the FIFOs before applying new params */
0054     hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
0055     hdmi_write(audio, (u8)~HDMI_MC_SWRSTZ_I2SSWRST_REQ, HDMI_MC_SWRSTZ);
0056
0057     inputclkfs  = HDMI_AUD_INPUTCLKFS_64FS;
0058     conf0       = (HDMI_AUD_CONF0_I2S_SELECT | HDMI_AUD_CONF0_I2S_EN0);
0059
0060     /* Enable the required i2s lanes */
0061     switch (hparms->channels) {
0062     case 7 ... 8:
0063         conf0 |= HDMI_AUD_CONF0_I2S_EN3;
0064         fallthrough;
0065     case 5 ... 6:
0066         conf0 |= HDMI_AUD_CONF0_I2S_EN2;
0067         fallthrough;
0068     case 3 ... 4:
0069         conf0 |= HDMI_AUD_CONF0_I2S_EN1;
0070         /* Fall-thru */
0071     }
0072
0073     switch (hparms->sample_width) {
0074     case 16:
0075         conf1 = HDMI_AUD_CONF1_WIDTH_16;
0076         break;
0077     case 24:
0078     case 32:
0079         conf1 = HDMI_AUD_CONF1_WIDTH_24;
0080         break;
0081     }
0082
0083     switch (fmt->fmt) {
0084     case HDMI_I2S:
0085         conf1 |= HDMI_AUD_CONF1_MODE_I2S;
0086         break;
0087     case HDMI_RIGHT_J:
0088         conf1 |= HDMI_AUD_CONF1_MODE_RIGHT_J;
0089         break;
0090     case HDMI_LEFT_J:
0091         conf1 |= HDMI_AUD_CONF1_MODE_LEFT_J;
0092         break;
0093     case HDMI_DSP_A:
0094         conf1 |= HDMI_AUD_CONF1_MODE_BURST_1;
0095         break;
0096     case HDMI_DSP_B:
0097         conf1 |= HDMI_AUD_CONF1_MODE_BURST_2;
0098         break;
0099     default:
0100         dev_err(dev, "unsupported format\n");
0101         return -EINVAL;
0102     }
0103
0104     dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
0105     dw_hdmi_set_channel_status(hdmi, hparms->iec.status);
0106     dw_hdmi_set_channel_count(hdmi, hparms->channels);
0107     dw_hdmi_set_channel_allocation(hdmi, hparms->cea.channel_allocation);
0108
0109     hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);
0110     hdmi_write(audio, conf0, HDMI_AUD_CONF0);
0111     hdmi_write(audio, conf1, HDMI_AUD_CONF1);
0112
0113     return 0;
0114 }
0115
0116 static int dw_hdmi_i2s_audio_startup(struct device *dev, void *data)
0117 {
0118     struct dw_hdmi_i2s_audio_data *audio = data;
0119     struct dw_hdmi *hdmi = audio->hdmi;
0120
0121     dw_hdmi_audio_enable(hdmi);
0122
0123     return 0;
0124 }
0125
0126 static void dw_hdmi_i2s_audio_shutdown(struct device *dev, void *data)
0127 {
0128     struct dw_hdmi_i2s_audio_data *audio = data;
0129     struct dw_hdmi *hdmi = audio->hdmi;
0130
0131     dw_hdmi_audio_disable(hdmi);
0132 }
0133
0134 static int dw_hdmi_i2s_get_eld(struct device *dev, void *data, uint8_t *buf,
0135                    size_t len)
0136 {
0137     struct dw_hdmi_i2s_audio_data *audio = data;
0138     u8 *eld;
0139
0140     eld = audio->get_eld(audio->hdmi);
0141     if (eld)
0142         memcpy(buf, eld, min_t(size_t, MAX_ELD_BYTES, len));
0143     else
0144         /* Pass en empty ELD if connector not available */
0145         memset(buf, 0, len);
0146
0147     return 0;
0148 }
0149
0150 static int dw_hdmi_i2s_get_dai_id(struct snd_soc_component *component,
0151                   struct device_node *endpoint)
0152 {
0153     struct of_endpoint of_ep;
0154     int ret;
0155
0156     ret = of_graph_parse_endpoint(endpoint, &of_ep);
0157     if (ret < 0)
0158         return ret;
0159
0160     /*
0161      * HDMI sound should be located as reg = <2>
0162      * Then, it is sound port 0
0163      */
0164     if (of_ep.port == 2)
0165         return 0;
0166
0167     return -EINVAL;
0168 }
0169
0170 static int dw_hdmi_i2s_hook_plugged_cb(struct device *dev, void *data,
0171                        hdmi_codec_plugged_cb fn,
0172                        struct device *codec_dev)
0173 {
0174     struct dw_hdmi_i2s_audio_data *audio = data;
0175     struct dw_hdmi *hdmi = audio->hdmi;
0176
0177     return dw_hdmi_set_plugged_cb(hdmi, fn, codec_dev);
0178 }
0179
0180 static const struct hdmi_codec_ops dw_hdmi_i2s_ops = {
0181     .hw_params  = dw_hdmi_i2s_hw_params,
0182     .audio_startup  = dw_hdmi_i2s_audio_startup,
0183     .audio_shutdown = dw_hdmi_i2s_audio_shutdown,
0184     .get_eld    = dw_hdmi_i2s_get_eld,
0185     .get_dai_id = dw_hdmi_i2s_get_dai_id,
0186     .hook_plugged_cb = dw_hdmi_i2s_hook_plugged_cb,
0187 };
0188
0189 static int snd_dw_hdmi_probe(struct platform_device *pdev)
0190 {
0191     struct dw_hdmi_i2s_audio_data *audio = pdev->dev.platform_data;
0192     struct platform_device_info pdevinfo;
0193     struct hdmi_codec_pdata pdata;
0194     struct platform_device *platform;
0195
0196     pdata.ops       = &dw_hdmi_i2s_ops;
0197     pdata.i2s       = 1;
0198     pdata.max_i2s_channels  = 8;
0199     pdata.data      = audio;
0200
0201     memset(&pdevinfo, 0, sizeof(pdevinfo));
0202     pdevinfo.parent     = pdev->dev.parent;
0203     pdevinfo.id     = PLATFORM_DEVID_AUTO;
0204     pdevinfo.name       = HDMI_CODEC_DRV_NAME;
0205     pdevinfo.data       = &pdata;
0206     pdevinfo.size_data  = sizeof(pdata);
0207     pdevinfo.dma_mask   = DMA_BIT_MASK(32);
0208
0209     platform = platform_device_register_full(&pdevinfo);
0210     if (IS_ERR(platform))
0211         return PTR_ERR(platform);
0212
0213     dev_set_drvdata(&pdev->dev, platform);
0214
0215     return 0;
0216 }
0217
0218 static int snd_dw_hdmi_remove(struct platform_device *pdev)
0219 {
0220     struct platform_device *platform = dev_get_drvdata(&pdev->dev);
0221
0222     platform_device_unregister(platform);
0223
0224     return 0;
0225 }
0226
0227 static struct platform_driver snd_dw_hdmi_driver = {
0228     .probe  = snd_dw_hdmi_probe,
0229     .remove = snd_dw_hdmi_remove,
0230     .driver = {
0231         .name = DRIVER_NAME,
0232     },
0233 };
0234 module_platform_driver(snd_dw_hdmi_driver);
0235
0236 MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
0237 MODULE_DESCRIPTION("Synopsis Designware HDMI I2S ALSA SoC interface");
0238 MODULE_LICENSE("GPL v2");
0239 MODULE_ALIAS("platform:" DRIVER_NAME);