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OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: GPL-2.0-only
0002 config DRM_CDNS_MHDP8546
0003         tristate "Cadence DPI/DP bridge"
0004         select DRM_DISPLAY_DP_HELPER
0005         select DRM_DISPLAY_HDCP_HELPER
0006         select DRM_DISPLAY_HELPER
0007         select DRM_KMS_HELPER
0008         select DRM_PANEL_BRIDGE
0009         depends on OF
0010         help
0011           Support Cadence DPI to DP bridge. This is an internal
0012           bridge and is meant to be directly embedded in a SoC.
0013           It takes a DPI stream as input and outputs it encoded
0014           in DP format.
0015 
0016 if DRM_CDNS_MHDP8546
0017 
0018 config DRM_CDNS_MHDP8546_J721E
0019         depends on ARCH_K3 || COMPILE_TEST
0020         bool "J721E Cadence DPI/DP wrapper support"
0021         default y
0022         help
0023           Support J721E Cadence DPI/DP wrapper. This is a wrapper
0024           which adds support for J721E related platform ops. It
0025           initializes the J721E Display Port and sets up the
0026           clock and data muxes.
0027 endif