bridge/analogix/analogix_dp_core.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Header file for Analogix DP (Display Port) core interface driver.
0004  *
0005  * Copyright (C) 2012 Samsung Electronics Co., Ltd.
0006  * Author: Jingoo Han <jg1.han@samsung.com>
0007  */
0008
0009 #ifndef _ANALOGIX_DP_CORE_H
0010 #define _ANALOGIX_DP_CORE_H
0011
0012 #include <drm/display/drm_dp_helper.h>
0013 #include <drm/drm_crtc.h>
0014
0015 #define DP_TIMEOUT_LOOP_COUNT 100
0016 #define MAX_CR_LOOP 5
0017 #define MAX_EQ_LOOP 5
0018 #define MAX_PLL_LOCK_LOOP 5
0019
0020 /* Training takes 22ms if AUX channel comm fails. Use this as retry interval */
0021 #define DP_TIMEOUT_TRAINING_US          22000
0022 #define DP_TIMEOUT_PSR_LOOP_MS          300
0023
0024 /* DP_MAX_LANE_COUNT */
0025 #define DPCD_ENHANCED_FRAME_CAP(x)      (((x) >> 7) & 0x1)
0026 #define DPCD_MAX_LANE_COUNT(x)          ((x) & 0x1f)
0027
0028 /* DP_LANE_COUNT_SET */
0029 #define DPCD_LANE_COUNT_SET(x)          ((x) & 0x1f)
0030
0031 /* DP_TRAINING_LANE0_SET */
0032 #define DPCD_PRE_EMPHASIS_SET(x)        (((x) & 0x3) << 3)
0033 #define DPCD_PRE_EMPHASIS_GET(x)        (((x) >> 3) & 0x3)
0034 #define DPCD_VOLTAGE_SWING_SET(x)       (((x) & 0x3) << 0)
0035 #define DPCD_VOLTAGE_SWING_GET(x)       (((x) >> 0) & 0x3)
0036
0037 struct gpio_desc;
0038
0039 enum link_lane_count_type {
0040     LANE_COUNT1 = 1,
0041     LANE_COUNT2 = 2,
0042     LANE_COUNT4 = 4
0043 };
0044
0045 enum link_training_state {
0046     START,
0047     CLOCK_RECOVERY,
0048     EQUALIZER_TRAINING,
0049     FINISHED,
0050     FAILED
0051 };
0052
0053 enum voltage_swing_level {
0054     VOLTAGE_LEVEL_0,
0055     VOLTAGE_LEVEL_1,
0056     VOLTAGE_LEVEL_2,
0057     VOLTAGE_LEVEL_3,
0058 };
0059
0060 enum pre_emphasis_level {
0061     PRE_EMPHASIS_LEVEL_0,
0062     PRE_EMPHASIS_LEVEL_1,
0063     PRE_EMPHASIS_LEVEL_2,
0064     PRE_EMPHASIS_LEVEL_3,
0065 };
0066
0067 enum pattern_set {
0068     PRBS7,
0069     D10_2,
0070     TRAINING_PTN1,
0071     TRAINING_PTN2,
0072     DP_NONE
0073 };
0074
0075 enum color_space {
0076     COLOR_RGB,
0077     COLOR_YCBCR422,
0078     COLOR_YCBCR444
0079 };
0080
0081 enum color_depth {
0082     COLOR_6,
0083     COLOR_8,
0084     COLOR_10,
0085     COLOR_12
0086 };
0087
0088 enum color_coefficient {
0089     COLOR_YCBCR601,
0090     COLOR_YCBCR709
0091 };
0092
0093 enum dynamic_range {
0094     VESA,
0095     CEA
0096 };
0097
0098 enum pll_status {
0099     PLL_UNLOCKED,
0100     PLL_LOCKED
0101 };
0102
0103 enum clock_recovery_m_value_type {
0104     CALCULATED_M,
0105     REGISTER_M
0106 };
0107
0108 enum video_timing_recognition_type {
0109     VIDEO_TIMING_FROM_CAPTURE,
0110     VIDEO_TIMING_FROM_REGISTER
0111 };
0112
0113 enum analog_power_block {
0114     AUX_BLOCK,
0115     CH0_BLOCK,
0116     CH1_BLOCK,
0117     CH2_BLOCK,
0118     CH3_BLOCK,
0119     ANALOG_TOTAL,
0120     POWER_ALL
0121 };
0122
0123 enum dp_irq_type {
0124     DP_IRQ_TYPE_HP_CABLE_IN  = BIT(0),
0125     DP_IRQ_TYPE_HP_CABLE_OUT = BIT(1),
0126     DP_IRQ_TYPE_HP_CHANGE    = BIT(2),
0127     DP_IRQ_TYPE_UNKNOWN      = BIT(3),
0128 };
0129
0130 struct video_info {
0131     char *name;
0132
0133     bool h_sync_polarity;
0134     bool v_sync_polarity;
0135     bool interlaced;
0136
0137     enum color_space color_space;
0138     enum dynamic_range dynamic_range;
0139     enum color_coefficient ycbcr_coeff;
0140     enum color_depth color_depth;
0141
0142     int max_link_rate;
0143     enum link_lane_count_type max_lane_count;
0144 };
0145
0146 struct link_train {
0147     int eq_loop;
0148     int cr_loop[4];
0149
0150     u8 link_rate;
0151     u8 lane_count;
0152     u8 training_lane[4];
0153
0154     enum link_training_state lt_state;
0155 };
0156
0157 struct analogix_dp_device {
0158     struct drm_encoder  *encoder;
0159     struct device       *dev;
0160     struct drm_device   *drm_dev;
0161     struct drm_connector    connector;
0162     struct drm_bridge   *bridge;
0163     struct drm_dp_aux       aux;
0164     struct clk      *clock;
0165     unsigned int        irq;
0166     void __iomem        *reg_base;
0167
0168     struct video_info   video_info;
0169     struct link_train   link_train;
0170     struct phy      *phy;
0171     int         dpms_mode;
0172     struct gpio_desc    *hpd_gpiod;
0173     bool                    force_hpd;
0174     bool            fast_train_enable;
0175     bool            psr_supported;
0176
0177     struct mutex        panel_lock;
0178     bool            panel_is_modeset;
0179
0180     struct analogix_dp_plat_data *plat_data;
0181 };
0182
0183 /* analogix_dp_reg.c */
0184 void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable);
0185 void analogix_dp_stop_video(struct analogix_dp_device *dp);
0186 void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable);
0187 void analogix_dp_init_analog_param(struct analogix_dp_device *dp);
0188 void analogix_dp_init_interrupt(struct analogix_dp_device *dp);
0189 void analogix_dp_reset(struct analogix_dp_device *dp);
0190 void analogix_dp_swreset(struct analogix_dp_device *dp);
0191 void analogix_dp_config_interrupt(struct analogix_dp_device *dp);
0192 void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp);
0193 void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp);
0194 enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp);
0195 void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable);
0196 void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
0197                        enum analog_power_block block,
0198                        bool enable);
0199 int analogix_dp_init_analog_func(struct analogix_dp_device *dp);
0200 void analogix_dp_init_hpd(struct analogix_dp_device *dp);
0201 void analogix_dp_force_hpd(struct analogix_dp_device *dp);
0202 enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp);
0203 void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp);
0204 void analogix_dp_reset_aux(struct analogix_dp_device *dp);
0205 void analogix_dp_init_aux(struct analogix_dp_device *dp);
0206 int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp);
0207 void analogix_dp_enable_sw_function(struct analogix_dp_device *dp);
0208 void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype);
0209 void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype);
0210 void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count);
0211 void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count);
0212 void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
0213                       bool enable);
0214 void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
0215                       enum pattern_set pattern);
0216 void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
0217                     u32 level);
0218 void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
0219                     u32 level);
0220 void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
0221                     u32 level);
0222 void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
0223                     u32 level);
0224 void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
0225                      u32 training_lane);
0226 void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
0227                      u32 training_lane);
0228 void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
0229                      u32 training_lane);
0230 void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
0231                      u32 training_lane);
0232 u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp);
0233 u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp);
0234 u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp);
0235 u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp);
0236 void analogix_dp_reset_macro(struct analogix_dp_device *dp);
0237 void analogix_dp_init_video(struct analogix_dp_device *dp);
0238
0239 void analogix_dp_set_video_color_format(struct analogix_dp_device *dp);
0240 int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp);
0241 void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp,
0242                  enum clock_recovery_m_value_type type,
0243                  u32 m_value,
0244                  u32 n_value);
0245 void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type);
0246 void analogix_dp_enable_video_master(struct analogix_dp_device *dp,
0247                      bool enable);
0248 void analogix_dp_start_video(struct analogix_dp_device *dp);
0249 int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp);
0250 void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp);
0251 void analogix_dp_enable_scrambling(struct analogix_dp_device *dp);
0252 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
0253 void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp);
0254 int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
0255                  struct dp_sdp *vsc, bool blocking);
0256 ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
0257                  struct drm_dp_aux_msg *msg);
0258
0259 #endif /* _ANALOGIX_DP_CORE_H */