drm/atmel-hlcdc/atmel_hlcdc_crtc.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2014 Traphandler
0004  * Copyright (C) 2014 Free Electrons
0005  *
0006  * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
0007  * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
0008  */
0009
0010 #include <linux/clk.h>
0011 #include <linux/media-bus-format.h>
0012 #include <linux/mfd/atmel-hlcdc.h>
0013 #include <linux/pinctrl/consumer.h>
0014 #include <linux/pm.h>
0015 #include <linux/pm_runtime.h>
0016
0017 #include <video/videomode.h>
0018
0019 #include <drm/drm_atomic.h>
0020 #include <drm/drm_atomic_helper.h>
0021 #include <drm/drm_crtc.h>
0022 #include <drm/drm_modeset_helper_vtables.h>
0023 #include <drm/drm_probe_helper.h>
0024 #include <drm/drm_vblank.h>
0025
0026 #include "atmel_hlcdc_dc.h"
0027
0028 /**
0029  * struct atmel_hlcdc_crtc_state - Atmel HLCDC CRTC state structure
0030  *
0031  * @base: base CRTC state
0032  * @output_mode: RGBXXX output mode
0033  */
0034 struct atmel_hlcdc_crtc_state {
0035     struct drm_crtc_state base;
0036     unsigned int output_mode;
0037 };
0038
0039 static inline struct atmel_hlcdc_crtc_state *
0040 drm_crtc_state_to_atmel_hlcdc_crtc_state(struct drm_crtc_state *state)
0041 {
0042     return container_of(state, struct atmel_hlcdc_crtc_state, base);
0043 }
0044
0045 /**
0046  * struct atmel_hlcdc_crtc - Atmel HLCDC CRTC structure
0047  *
0048  * @base: base DRM CRTC structure
0049  * @dc: pointer to the atmel_hlcdc structure provided by the MFD device
0050  * @event: pointer to the current page flip event
0051  * @id: CRTC id (returned by drm_crtc_index)
0052  */
0053 struct atmel_hlcdc_crtc {
0054     struct drm_crtc base;
0055     struct atmel_hlcdc_dc *dc;
0056     struct drm_pending_vblank_event *event;
0057     int id;
0058 };
0059
0060 static inline struct atmel_hlcdc_crtc *
0061 drm_crtc_to_atmel_hlcdc_crtc(struct drm_crtc *crtc)
0062 {
0063     return container_of(crtc, struct atmel_hlcdc_crtc, base);
0064 }
0065
0066 static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
0067 {
0068     struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
0069     struct regmap *regmap = crtc->dc->hlcdc->regmap;
0070     struct drm_display_mode *adj = &c->state->adjusted_mode;
0071     struct atmel_hlcdc_crtc_state *state;
0072     unsigned long mode_rate;
0073     struct videomode vm;
0074     unsigned long prate;
0075     unsigned int mask = ATMEL_HLCDC_CLKDIV_MASK | ATMEL_HLCDC_CLKPOL;
0076     unsigned int cfg = 0;
0077     int div, ret;
0078
0079     ret = clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
0080     if (ret)
0081         return;
0082
0083     vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
0084     vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end;
0085     vm.vsync_len = adj->crtc_vsync_end - adj->crtc_vsync_start;
0086     vm.hfront_porch = adj->crtc_hsync_start - adj->crtc_hdisplay;
0087     vm.hback_porch = adj->crtc_htotal - adj->crtc_hsync_end;
0088     vm.hsync_len = adj->crtc_hsync_end - adj->crtc_hsync_start;
0089
0090     regmap_write(regmap, ATMEL_HLCDC_CFG(1),
0091              (vm.hsync_len - 1) | ((vm.vsync_len - 1) << 16));
0092
0093     regmap_write(regmap, ATMEL_HLCDC_CFG(2),
0094              (vm.vfront_porch - 1) | (vm.vback_porch << 16));
0095
0096     regmap_write(regmap, ATMEL_HLCDC_CFG(3),
0097              (vm.hfront_porch - 1) | ((vm.hback_porch - 1) << 16));
0098
0099     regmap_write(regmap, ATMEL_HLCDC_CFG(4),
0100              (adj->crtc_hdisplay - 1) |
0101              ((adj->crtc_vdisplay - 1) << 16));
0102
0103     prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);
0104     mode_rate = adj->crtc_clock * 1000;
0105     if (!crtc->dc->desc->fixed_clksrc) {
0106         prate *= 2;
0107         cfg |= ATMEL_HLCDC_CLKSEL;
0108         mask |= ATMEL_HLCDC_CLKSEL;
0109     }
0110
0111     div = DIV_ROUND_UP(prate, mode_rate);
0112     if (div < 2) {
0113         div = 2;
0114     } else if (ATMEL_HLCDC_CLKDIV(div) & ~ATMEL_HLCDC_CLKDIV_MASK) {
0115         /* The divider ended up too big, try a lower base rate. */
0116         cfg &= ~ATMEL_HLCDC_CLKSEL;
0117         prate /= 2;
0118         div = DIV_ROUND_UP(prate, mode_rate);
0119         if (ATMEL_HLCDC_CLKDIV(div) & ~ATMEL_HLCDC_CLKDIV_MASK)
0120             div = ATMEL_HLCDC_CLKDIV_MASK;
0121     } else {
0122         int div_low = prate / mode_rate;
0123
0124         if (div_low >= 2 &&
0125             (10 * (prate / div_low - mode_rate) <
0126              (mode_rate - prate / div)))
0127             /*
0128              * At least 10 times better when using a higher
0129              * frequency than requested, instead of a lower.
0130              * So, go with that.
0131              */
0132             div = div_low;
0133     }
0134
0135     cfg |= ATMEL_HLCDC_CLKDIV(div);
0136
0137     regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0), mask, cfg);
0138
0139     state = drm_crtc_state_to_atmel_hlcdc_crtc_state(c->state);
0140     cfg = state->output_mode << 8;
0141
0142     if (adj->flags & DRM_MODE_FLAG_NVSYNC)
0143         cfg |= ATMEL_HLCDC_VSPOL;
0144
0145     if (adj->flags & DRM_MODE_FLAG_NHSYNC)
0146         cfg |= ATMEL_HLCDC_HSPOL;
0147
0148     regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
0149                ATMEL_HLCDC_HSPOL | ATMEL_HLCDC_VSPOL |
0150                ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |
0151                ATMEL_HLCDC_DISPPOL | ATMEL_HLCDC_DISPDLY |
0152                ATMEL_HLCDC_VSPSU | ATMEL_HLCDC_VSPHO |
0153                ATMEL_HLCDC_GUARDTIME_MASK | ATMEL_HLCDC_MODE_MASK,
0154                cfg);
0155
0156     clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
0157 }
0158
0159 static enum drm_mode_status
0160 atmel_hlcdc_crtc_mode_valid(struct drm_crtc *c,
0161                 const struct drm_display_mode *mode)
0162 {
0163     struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
0164
0165     return atmel_hlcdc_dc_mode_valid(crtc->dc, mode);
0166 }
0167
0168 static void atmel_hlcdc_crtc_atomic_disable(struct drm_crtc *c,
0169                         struct drm_atomic_state *state)
0170 {
0171     struct drm_device *dev = c->dev;
0172     struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
0173     struct regmap *regmap = crtc->dc->hlcdc->regmap;
0174     unsigned int status;
0175
0176     drm_crtc_vblank_off(c);
0177
0178     pm_runtime_get_sync(dev->dev);
0179
0180     regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_DISP);
0181     while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
0182            (status & ATMEL_HLCDC_DISP))
0183         cpu_relax();
0184
0185     regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_SYNC);
0186     while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
0187            (status & ATMEL_HLCDC_SYNC))
0188         cpu_relax();
0189
0190     regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_PIXEL_CLK);
0191     while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
0192            (status & ATMEL_HLCDC_PIXEL_CLK))
0193         cpu_relax();
0194
0195     clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
0196     pinctrl_pm_select_sleep_state(dev->dev);
0197
0198     pm_runtime_allow(dev->dev);
0199
0200     pm_runtime_put_sync(dev->dev);
0201 }
0202
0203 static void atmel_hlcdc_crtc_atomic_enable(struct drm_crtc *c,
0204                        struct drm_atomic_state *state)
0205 {
0206     struct drm_device *dev = c->dev;
0207     struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
0208     struct regmap *regmap = crtc->dc->hlcdc->regmap;
0209     unsigned int status;
0210
0211     pm_runtime_get_sync(dev->dev);
0212
0213     pm_runtime_forbid(dev->dev);
0214
0215     pinctrl_pm_select_default_state(dev->dev);
0216     clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
0217
0218     regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_PIXEL_CLK);
0219     while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
0220            !(status & ATMEL_HLCDC_PIXEL_CLK))
0221         cpu_relax();
0222
0223
0224     regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_SYNC);
0225     while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
0226            !(status & ATMEL_HLCDC_SYNC))
0227         cpu_relax();
0228
0229     regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_DISP);
0230     while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
0231            !(status & ATMEL_HLCDC_DISP))
0232         cpu_relax();
0233
0234     pm_runtime_put_sync(dev->dev);
0235
0236 }
0237
0238 #define ATMEL_HLCDC_RGB444_OUTPUT   BIT(0)
0239 #define ATMEL_HLCDC_RGB565_OUTPUT   BIT(1)
0240 #define ATMEL_HLCDC_RGB666_OUTPUT   BIT(2)
0241 #define ATMEL_HLCDC_RGB888_OUTPUT   BIT(3)
0242 #define ATMEL_HLCDC_OUTPUT_MODE_MASK    GENMASK(3, 0)
0243
0244 static int atmel_hlcdc_connector_output_mode(struct drm_connector_state *state)
0245 {
0246     struct drm_connector *connector = state->connector;
0247     struct drm_display_info *info = &connector->display_info;
0248     struct drm_encoder *encoder;
0249     unsigned int supported_fmts = 0;
0250     int j;
0251
0252     encoder = state->best_encoder;
0253     if (!encoder)
0254         encoder = connector->encoder;
0255
0256     switch (atmel_hlcdc_encoder_get_bus_fmt(encoder)) {
0257     case 0:
0258         break;
0259     case MEDIA_BUS_FMT_RGB444_1X12:
0260         return ATMEL_HLCDC_RGB444_OUTPUT;
0261     case MEDIA_BUS_FMT_RGB565_1X16:
0262         return ATMEL_HLCDC_RGB565_OUTPUT;
0263     case MEDIA_BUS_FMT_RGB666_1X18:
0264         return ATMEL_HLCDC_RGB666_OUTPUT;
0265     case MEDIA_BUS_FMT_RGB888_1X24:
0266         return ATMEL_HLCDC_RGB888_OUTPUT;
0267     default:
0268         return -EINVAL;
0269     }
0270
0271     for (j = 0; j < info->num_bus_formats; j++) {
0272         switch (info->bus_formats[j]) {
0273         case MEDIA_BUS_FMT_RGB444_1X12:
0274             supported_fmts |= ATMEL_HLCDC_RGB444_OUTPUT;
0275             break;
0276         case MEDIA_BUS_FMT_RGB565_1X16:
0277             supported_fmts |= ATMEL_HLCDC_RGB565_OUTPUT;
0278             break;
0279         case MEDIA_BUS_FMT_RGB666_1X18:
0280             supported_fmts |= ATMEL_HLCDC_RGB666_OUTPUT;
0281             break;
0282         case MEDIA_BUS_FMT_RGB888_1X24:
0283             supported_fmts |= ATMEL_HLCDC_RGB888_OUTPUT;
0284             break;
0285         default:
0286             break;
0287         }
0288     }
0289
0290     return supported_fmts;
0291 }
0292
0293 static int atmel_hlcdc_crtc_select_output_mode(struct drm_crtc_state *state)
0294 {
0295     unsigned int output_fmts = ATMEL_HLCDC_OUTPUT_MODE_MASK;
0296     struct atmel_hlcdc_crtc_state *hstate;
0297     struct drm_connector_state *cstate;
0298     struct drm_connector *connector;
0299     struct atmel_hlcdc_crtc *crtc;
0300     int i;
0301
0302     crtc = drm_crtc_to_atmel_hlcdc_crtc(state->crtc);
0303
0304     for_each_new_connector_in_state(state->state, connector, cstate, i) {
0305         unsigned int supported_fmts = 0;
0306
0307         if (!cstate->crtc)
0308             continue;
0309
0310         supported_fmts = atmel_hlcdc_connector_output_mode(cstate);
0311
0312         if (crtc->dc->desc->conflicting_output_formats)
0313             output_fmts &= supported_fmts;
0314         else
0315             output_fmts |= supported_fmts;
0316     }
0317
0318     if (!output_fmts)
0319         return -EINVAL;
0320
0321     hstate = drm_crtc_state_to_atmel_hlcdc_crtc_state(state);
0322     hstate->output_mode = fls(output_fmts) - 1;
0323
0324     return 0;
0325 }
0326
0327 static int atmel_hlcdc_crtc_atomic_check(struct drm_crtc *c,
0328                      struct drm_atomic_state *state)
0329 {
0330     struct drm_crtc_state *s = drm_atomic_get_new_crtc_state(state, c);
0331     int ret;
0332
0333     ret = atmel_hlcdc_crtc_select_output_mode(s);
0334     if (ret)
0335         return ret;
0336
0337     ret = atmel_hlcdc_plane_prepare_disc_area(s);
0338     if (ret)
0339         return ret;
0340
0341     return atmel_hlcdc_plane_prepare_ahb_routing(s);
0342 }
0343
0344 static void atmel_hlcdc_crtc_atomic_begin(struct drm_crtc *c,
0345                       struct drm_atomic_state *state)
0346 {
0347     drm_crtc_vblank_on(c);
0348 }
0349
0350 static void atmel_hlcdc_crtc_atomic_flush(struct drm_crtc *c,
0351                       struct drm_atomic_state *state)
0352 {
0353     struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
0354     unsigned long flags;
0355
0356     spin_lock_irqsave(&c->dev->event_lock, flags);
0357
0358     if (c->state->event) {
0359         c->state->event->pipe = drm_crtc_index(c);
0360
0361         WARN_ON(drm_crtc_vblank_get(c) != 0);
0362
0363         crtc->event = c->state->event;
0364         c->state->event = NULL;
0365     }
0366     spin_unlock_irqrestore(&c->dev->event_lock, flags);
0367 }
0368
0369 static const struct drm_crtc_helper_funcs lcdc_crtc_helper_funcs = {
0370     .mode_valid = atmel_hlcdc_crtc_mode_valid,
0371     .mode_set_nofb = atmel_hlcdc_crtc_mode_set_nofb,
0372     .atomic_check = atmel_hlcdc_crtc_atomic_check,
0373     .atomic_begin = atmel_hlcdc_crtc_atomic_begin,
0374     .atomic_flush = atmel_hlcdc_crtc_atomic_flush,
0375     .atomic_enable = atmel_hlcdc_crtc_atomic_enable,
0376     .atomic_disable = atmel_hlcdc_crtc_atomic_disable,
0377 };
0378
0379 static void atmel_hlcdc_crtc_destroy(struct drm_crtc *c)
0380 {
0381     struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
0382
0383     drm_crtc_cleanup(c);
0384     kfree(crtc);
0385 }
0386
0387 static void atmel_hlcdc_crtc_finish_page_flip(struct atmel_hlcdc_crtc *crtc)
0388 {
0389     struct drm_device *dev = crtc->base.dev;
0390     unsigned long flags;
0391
0392     spin_lock_irqsave(&dev->event_lock, flags);
0393     if (crtc->event) {
0394         drm_crtc_send_vblank_event(&crtc->base, crtc->event);
0395         drm_crtc_vblank_put(&crtc->base);
0396         crtc->event = NULL;
0397     }
0398     spin_unlock_irqrestore(&dev->event_lock, flags);
0399 }
0400
0401 void atmel_hlcdc_crtc_irq(struct drm_crtc *c)
0402 {
0403     drm_crtc_handle_vblank(c);
0404     atmel_hlcdc_crtc_finish_page_flip(drm_crtc_to_atmel_hlcdc_crtc(c));
0405 }
0406
0407 static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
0408 {
0409     struct atmel_hlcdc_crtc_state *state;
0410
0411     if (crtc->state) {
0412         __drm_atomic_helper_crtc_destroy_state(crtc->state);
0413         state = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
0414         kfree(state);
0415         crtc->state = NULL;
0416     }
0417
0418     state = kzalloc(sizeof(*state), GFP_KERNEL);
0419     if (state)
0420         __drm_atomic_helper_crtc_reset(crtc, &state->base);
0421 }
0422
0423 static struct drm_crtc_state *
0424 atmel_hlcdc_crtc_duplicate_state(struct drm_crtc *crtc)
0425 {
0426     struct atmel_hlcdc_crtc_state *state, *cur;
0427
0428     if (WARN_ON(!crtc->state))
0429         return NULL;
0430
0431     state = kmalloc(sizeof(*state), GFP_KERNEL);
0432     if (!state)
0433         return NULL;
0434     __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
0435
0436     cur = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
0437     state->output_mode = cur->output_mode;
0438
0439     return &state->base;
0440 }
0441
0442 static void atmel_hlcdc_crtc_destroy_state(struct drm_crtc *crtc,
0443                        struct drm_crtc_state *s)
0444 {
0445     struct atmel_hlcdc_crtc_state *state;
0446
0447     state = drm_crtc_state_to_atmel_hlcdc_crtc_state(s);
0448     __drm_atomic_helper_crtc_destroy_state(s);
0449     kfree(state);
0450 }
0451
0452 static int atmel_hlcdc_crtc_enable_vblank(struct drm_crtc *c)
0453 {
0454     struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
0455     struct regmap *regmap = crtc->dc->hlcdc->regmap;
0456
0457     /* Enable SOF (Start Of Frame) interrupt for vblank counting */
0458     regmap_write(regmap, ATMEL_HLCDC_IER, ATMEL_HLCDC_SOF);
0459
0460     return 0;
0461 }
0462
0463 static void atmel_hlcdc_crtc_disable_vblank(struct drm_crtc *c)
0464 {
0465     struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
0466     struct regmap *regmap = crtc->dc->hlcdc->regmap;
0467
0468     regmap_write(regmap, ATMEL_HLCDC_IDR, ATMEL_HLCDC_SOF);
0469 }
0470
0471 static const struct drm_crtc_funcs atmel_hlcdc_crtc_funcs = {
0472     .page_flip = drm_atomic_helper_page_flip,
0473     .set_config = drm_atomic_helper_set_config,
0474     .destroy = atmel_hlcdc_crtc_destroy,
0475     .reset = atmel_hlcdc_crtc_reset,
0476     .atomic_duplicate_state =  atmel_hlcdc_crtc_duplicate_state,
0477     .atomic_destroy_state = atmel_hlcdc_crtc_destroy_state,
0478     .enable_vblank = atmel_hlcdc_crtc_enable_vblank,
0479     .disable_vblank = atmel_hlcdc_crtc_disable_vblank,
0480 };
0481
0482 int atmel_hlcdc_crtc_create(struct drm_device *dev)
0483 {
0484     struct atmel_hlcdc_plane *primary = NULL, *cursor = NULL;
0485     struct atmel_hlcdc_dc *dc = dev->dev_private;
0486     struct atmel_hlcdc_crtc *crtc;
0487     int ret;
0488     int i;
0489
0490     crtc = kzalloc(sizeof(*crtc), GFP_KERNEL);
0491     if (!crtc)
0492         return -ENOMEM;
0493
0494     crtc->dc = dc;
0495
0496     for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
0497         if (!dc->layers[i])
0498             continue;
0499
0500         switch (dc->layers[i]->desc->type) {
0501         case ATMEL_HLCDC_BASE_LAYER:
0502             primary = atmel_hlcdc_layer_to_plane(dc->layers[i]);
0503             break;
0504
0505         case ATMEL_HLCDC_CURSOR_LAYER:
0506             cursor = atmel_hlcdc_layer_to_plane(dc->layers[i]);
0507             break;
0508
0509         default:
0510             break;
0511         }
0512     }
0513
0514     ret = drm_crtc_init_with_planes(dev, &crtc->base, &primary->base,
0515                     &cursor->base, &atmel_hlcdc_crtc_funcs,
0516                     NULL);
0517     if (ret < 0)
0518         goto fail;
0519
0520     crtc->id = drm_crtc_index(&crtc->base);
0521
0522     for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
0523         struct atmel_hlcdc_plane *overlay;
0524
0525         if (dc->layers[i] &&
0526             dc->layers[i]->desc->type == ATMEL_HLCDC_OVERLAY_LAYER) {
0527             overlay = atmel_hlcdc_layer_to_plane(dc->layers[i]);
0528             overlay->base.possible_crtcs = 1 << crtc->id;
0529         }
0530     }
0531
0532     drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs);
0533
0534     drm_mode_crtc_set_gamma_size(&crtc->base, ATMEL_HLCDC_CLUT_SIZE);
0535     drm_crtc_enable_color_mgmt(&crtc->base, 0, false,
0536                    ATMEL_HLCDC_CLUT_SIZE);
0537
0538     dc->crtc = &crtc->base;
0539
0540     return 0;
0541
0542 fail:
0543     atmel_hlcdc_crtc_destroy(&crtc->base);
0544     return ret;
0545 }