drm/aspeed/aspeed_gfx.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /* Copyright 2018 IBM Corporation */
0003
0004 #include <drm/drm_device.h>
0005 #include <drm/drm_simple_kms_helper.h>
0006
0007 struct aspeed_gfx {
0008     struct drm_device       drm;
0009     void __iomem            *base;
0010     struct clk          *clk;
0011     struct reset_control        *rst;
0012     struct regmap           *scu;
0013
0014     u32             dac_reg;
0015     u32             int_clr_reg;
0016     u32             vga_scratch_reg;
0017     u32             throd_val;
0018     u32             scan_line_max;
0019
0020     struct drm_simple_display_pipe  pipe;
0021     struct drm_connector        connector;
0022 };
0023 #define to_aspeed_gfx(x) container_of(x, struct aspeed_gfx, drm)
0024
0025 int aspeed_gfx_create_pipe(struct drm_device *drm);
0026 int aspeed_gfx_create_output(struct drm_device *drm);
0027
0028 #define CRT_CTRL1       0x60 /* CRT Control I */
0029 #define CRT_CTRL2       0x64 /* CRT Control II */
0030 #define CRT_STATUS      0x68 /* CRT Status */
0031 #define CRT_MISC        0x6c /* CRT Misc Setting */
0032 #define CRT_HORIZ0      0x70 /* CRT Horizontal Total & Display Enable End */
0033 #define CRT_HORIZ1      0x74 /* CRT Horizontal Retrace Start & End */
0034 #define CRT_VERT0       0x78 /* CRT Vertical Total & Display Enable End */
0035 #define CRT_VERT1       0x7C /* CRT Vertical Retrace Start & End */
0036 #define CRT_ADDR        0x80 /* CRT Display Starting Address */
0037 #define CRT_OFFSET      0x84 /* CRT Display Offset & Terminal Count */
0038 #define CRT_THROD       0x88 /* CRT Threshold */
0039 #define CRT_XSCALE      0x8C /* CRT Scaling-Up Factor */
0040 #define CRT_CURSOR0     0x90 /* CRT Hardware Cursor X & Y Offset */
0041 #define CRT_CURSOR1     0x94 /* CRT Hardware Cursor X & Y Position */
0042 #define CRT_CURSOR2     0x98 /* CRT Hardware Cursor Pattern Address */
0043 #define CRT_9C          0x9C
0044 #define CRT_OSD_H       0xA0 /* CRT OSD Horizontal Start/End */
0045 #define CRT_OSD_V       0xA4 /* CRT OSD Vertical Start/End */
0046 #define CRT_OSD_ADDR        0xA8 /* CRT OSD Pattern Address */
0047 #define CRT_OSD_DISP        0xAC /* CRT OSD Offset */
0048 #define CRT_OSD_THRESH      0xB0 /* CRT OSD Threshold & Alpha */
0049 #define CRT_B4          0xB4
0050 #define CRT_STS_V       0xB8 /* CRT Status V */
0051 #define CRT_SCRATCH     0xBC /* Scratchpad */
0052 #define CRT_BB0_ADDR        0xD0 /* CRT Display BB0 Starting Address */
0053 #define CRT_BB1_ADDR        0xD4 /* CRT Display BB1 Starting Address */
0054 #define CRT_BB_COUNT        0xD8 /* CRT Display BB Terminal Count */
0055 #define OSD_COLOR1      0xE0 /* OSD Color Palette Index 1 & 0 */
0056 #define OSD_COLOR2      0xE4 /* OSD Color Palette Index 3 & 2 */
0057 #define OSD_COLOR3      0xE8 /* OSD Color Palette Index 5 & 4 */
0058 #define OSD_COLOR4      0xEC /* OSD Color Palette Index 7 & 6 */
0059 #define OSD_COLOR5      0xF0 /* OSD Color Palette Index 9 & 8 */
0060 #define OSD_COLOR6      0xF4 /* OSD Color Palette Index 11 & 10 */
0061 #define OSD_COLOR7      0xF8 /* OSD Color Palette Index 13 & 12 */
0062 #define OSD_COLOR8      0xFC /* OSD Color Palette Index 15 & 14 */
0063
0064 /* CTRL1 */
0065 #define CRT_CTRL_EN         BIT(0)
0066 #define CRT_CTRL_HW_CURSOR_EN       BIT(1)
0067 #define CRT_CTRL_OSD_EN         BIT(2)
0068 #define CRT_CTRL_INTERLACED     BIT(3)
0069 #define CRT_CTRL_COLOR_RGB565       (0 << 7)
0070 #define CRT_CTRL_COLOR_YUV444       (1 << 7)
0071 #define CRT_CTRL_COLOR_XRGB8888     (2 << 7)
0072 #define CRT_CTRL_COLOR_RGB888       (3 << 7)
0073 #define CRT_CTRL_COLOR_YUV444_2RGB  (5 << 7)
0074 #define CRT_CTRL_COLOR_YUV422       (7 << 7)
0075 #define CRT_CTRL_COLOR_MASK     GENMASK(9, 7)
0076 #define CRT_CTRL_HSYNC_NEGATIVE     BIT(16)
0077 #define CRT_CTRL_VSYNC_NEGATIVE     BIT(17)
0078 #define CRT_CTRL_VERTICAL_INTR_EN   BIT(30)
0079 #define CRT_CTRL_VERTICAL_INTR_STS  BIT(31)
0080
0081 /* CTRL2 */
0082 #define CRT_CTRL_DAC_EN         BIT(0)
0083 #define CRT_CTRL_VBLANK_LINE(x)     (((x) << 20) & CRT_CTRL_VBLANK_LINE_MASK)
0084 #define CRT_CTRL_VBLANK_LINE_MASK   GENMASK(31, 20)
0085
0086 /* CRT_HORIZ0 */
0087 #define CRT_H_TOTAL(x)          (x)
0088 #define CRT_H_DE(x)         ((x) << 16)
0089
0090 /* CRT_HORIZ1 */
0091 #define CRT_H_RS_START(x)       (x)
0092 #define CRT_H_RS_END(x)         ((x) << 16)
0093
0094 /* CRT_VIRT0 */
0095 #define CRT_V_TOTAL(x)          (x)
0096 #define CRT_V_DE(x)         ((x) << 16)
0097
0098 /* CRT_VIRT1 */
0099 #define CRT_V_RS_START(x)       (x)
0100 #define CRT_V_RS_END(x)         ((x) << 16)
0101
0102 /* CRT_OFFSET */
0103 #define CRT_DISP_OFFSET(x)      (x)
0104 #define CRT_TERM_COUNT(x)       ((x) << 16)
0105
0106 /* CRT_THROD */
0107 #define CRT_THROD_LOW(x)        (x)
0108 #define CRT_THROD_HIGH(x)       ((x) << 8)