drm/arm/malidp_drv.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
0004  * Author: Liviu Dudau <Liviu.Dudau@arm.com>
0005  *
0006  * ARM Mali DP500/DP550/DP650 KMS/DRM driver structures
0007  */
0008
0009 #ifndef __MALIDP_DRV_H__
0010 #define __MALIDP_DRV_H__
0011
0012 #include <linux/mutex.h>
0013 #include <linux/wait.h>
0014 #include <linux/spinlock.h>
0015
0016 #include <drm/drm_writeback.h>
0017 #include <drm/drm_encoder.h>
0018
0019 #include "malidp_hw.h"
0020
0021 #define MALIDP_CONFIG_VALID_INIT    0
0022 #define MALIDP_CONFIG_VALID_DONE    1
0023 #define MALIDP_CONFIG_START     0xd0
0024
0025 struct malidp_error_stats {
0026     s32 num_errors;
0027     u32 last_error_status;
0028     s64 last_error_vblank;
0029 };
0030
0031 struct malidp_drm {
0032     struct malidp_hw_device *dev;
0033     struct drm_crtc crtc;
0034     struct drm_writeback_connector mw_connector;
0035     wait_queue_head_t wq;
0036     struct drm_pending_vblank_event *event;
0037     atomic_t config_valid;
0038     u32 core_id;
0039 #ifdef CONFIG_DEBUG_FS
0040     struct malidp_error_stats de_errors;
0041     struct malidp_error_stats se_errors;
0042     /* Protects errors stats */
0043     spinlock_t errors_lock;
0044 #endif
0045 };
0046
0047 #define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc)
0048
0049 struct malidp_plane {
0050     struct drm_plane base;
0051     struct malidp_hw_device *hwdev;
0052     const struct malidp_layer *layer;
0053 };
0054
0055 enum mmu_prefetch_mode {
0056     MALIDP_PREFETCH_MODE_NONE,
0057     MALIDP_PREFETCH_MODE_PARTIAL,
0058     MALIDP_PREFETCH_MODE_FULL,
0059 };
0060
0061 struct malidp_plane_state {
0062     struct drm_plane_state base;
0063
0064     /* size of the required rotation memory if plane is rotated */
0065     u32 rotmem_size;
0066     /* internal format ID */
0067     u8 format;
0068     u8 n_planes;
0069     enum mmu_prefetch_mode mmu_prefetch_mode;
0070     u32 mmu_prefetch_pgsize;
0071 };
0072
0073 #define to_malidp_plane(x) container_of(x, struct malidp_plane, base)
0074 #define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base)
0075
0076 struct malidp_crtc_state {
0077     struct drm_crtc_state base;
0078     u32 gamma_coeffs[MALIDP_COEFFTAB_NUM_COEFFS];
0079     u32 coloradj_coeffs[MALIDP_COLORADJ_NUM_COEFFS];
0080     struct malidp_se_config scaler_config;
0081     /* Bitfield of all the planes that have requested a scaled output. */
0082     u8 scaled_planes_mask;
0083 };
0084
0085 #define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base)
0086
0087 int malidp_de_planes_init(struct drm_device *drm);
0088 int malidp_crtc_init(struct drm_device *drm);
0089
0090 bool malidp_hw_format_is_linear_only(u32 format);
0091 bool malidp_hw_format_is_afbc_only(u32 format);
0092
0093 bool malidp_format_mod_supported(struct drm_device *drm,
0094                  u32 format, u64 modifier);
0095
0096 #ifdef CONFIG_DEBUG_FS
0097 void malidp_error(struct malidp_drm *malidp,
0098           struct malidp_error_stats *error_stats, u32 status,
0099           u64 vblank);
0100 #endif
0101
0102 /* often used combination of rotational bits */
0103 #define MALIDP_ROTATED_MASK (DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270)
0104
0105 #endif  /* __MALIDP_DRV_H__ */