swsmu/smu11/vangogh_ppt.h

0001 /*
0002  * Copyright 2020 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #ifndef __VANGOGH_PPT_H__
0025 #define __VANGOGH_PPT_H__
0026
0027
0028 extern void vangogh_set_ppt_funcs(struct smu_context *smu);
0029
0030 /* UMD PState Vangogh Msg Parameters in MHz */
0031 #define VANGOGH_UMD_PSTATE_STANDARD_GFXCLK       1100
0032 #define VANGOGH_UMD_PSTATE_STANDARD_SOCCLK       600
0033 #define VANGOGH_UMD_PSTATE_STANDARD_FCLK         800
0034 #define VANGOGH_UMD_PSTATE_STANDARD_VCLK         705
0035 #define VANGOGH_UMD_PSTATE_STANDARD_DCLK         600
0036
0037 #define VANGOGH_UMD_PSTATE_PEAK_GFXCLK       1300
0038 #define VANGOGH_UMD_PSTATE_PEAK_SOCCLK       600
0039 #define VANGOGH_UMD_PSTATE_PEAK_FCLK         800
0040 #define VANGOGH_UMD_PSTATE_PEAK_VCLK         705
0041 #define VANGOGH_UMD_PSTATE_PEAK_DCLK         600
0042
0043 #define VANGOGH_UMD_PSTATE_MIN_SCLK_GFXCLK       400
0044 #define VANGOGH_UMD_PSTATE_MIN_SCLK_SOCCLK       1000
0045 #define VANGOGH_UMD_PSTATE_MIN_SCLK_FCLK         800
0046 #define VANGOGH_UMD_PSTATE_MIN_SCLK_VCLK         1000
0047 #define VANGOGH_UMD_PSTATE_MIN_SCLK_DCLK         800
0048
0049 #define VANGOGH_UMD_PSTATE_MIN_MCLK_GFXCLK       1100
0050 #define VANGOGH_UMD_PSTATE_MIN_MCLK_SOCCLK       1000
0051 #define VANGOGH_UMD_PSTATE_MIN_MCLK_FCLK         400
0052 #define VANGOGH_UMD_PSTATE_MIN_MCLK_VCLK         1000
0053 #define VANGOGH_UMD_PSTATE_MIN_MCLK_DCLK         800
0054
0055 /* RLC Power Status */
0056 #define RLC_STATUS_OFF          0
0057 #define RLC_STATUS_NORMAL       1
0058
0059 #endif