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0023 #ifndef _VEGA20_SMUMANAGER_H_
0024 #define _VEGA20_SMUMANAGER_H_
0025
0026 #include "hwmgr.h"
0027 #include "smu11_driver_if.h"
0028
0029 struct smu_table_entry {
0030 uint32_t version;
0031 uint32_t size;
0032 uint64_t mc_addr;
0033 void *table;
0034 struct amdgpu_bo *handle;
0035 };
0036
0037 struct smu_table_array {
0038 struct smu_table_entry entry[TABLE_COUNT];
0039 };
0040
0041 struct vega20_smumgr {
0042 struct smu_table_array smu_tables;
0043 };
0044
0045 #define SMU_FEATURES_LOW_MASK 0x00000000FFFFFFFF
0046 #define SMU_FEATURES_LOW_SHIFT 0
0047 #define SMU_FEATURES_HIGH_MASK 0xFFFFFFFF00000000
0048 #define SMU_FEATURES_HIGH_SHIFT 32
0049
0050 int vega20_enable_smc_features(struct pp_hwmgr *hwmgr,
0051 bool enable, uint64_t feature_mask);
0052 int vega20_get_enabled_smc_features(struct pp_hwmgr *hwmgr,
0053 uint64_t *features_enabled);
0054 int vega20_set_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
0055 uint8_t *table, uint16_t workload_type);
0056 int vega20_get_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
0057 uint8_t *table, uint16_t workload_type);
0058 int vega20_set_pptable_driver_address(struct pp_hwmgr *hwmgr);
0059
0060 bool vega20_is_smc_ram_running(struct pp_hwmgr *hwmgr);
0061
0062 #endif
0063