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0024 #ifndef _TONGA_SMUMGR_H_
0025 #define _TONGA_SMUMGR_H_
0026
0027 #include "smu72_discrete.h"
0028 #include "smu7_smumgr.h"
0029 #include "smu72.h"
0030
0031
0032 #define ASICID_IS_TONGA_P(wDID, bRID) \
0033 (((wDID == 0x6930) && ((bRID == 0xF0) || (bRID == 0xF1) || (bRID == 0xFF))) \
0034 || ((wDID == 0x6920) && ((bRID == 0) || (bRID == 1))))
0035
0036 struct tonga_pt_defaults {
0037 uint8_t svi_load_line_en;
0038 uint8_t svi_load_line_vddC;
0039 uint8_t tdc_vddc_throttle_release_limit_perc;
0040 uint8_t tdc_mawt;
0041 uint8_t tdc_waterfall_ctl;
0042 uint8_t dte_ambient_temp_base;
0043 uint32_t display_cac;
0044 uint32_t bapm_temp_gradient;
0045 uint16_t bapmti_r[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
0046 uint16_t bapmti_rc[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
0047 };
0048
0049 struct tonga_mc_reg_entry {
0050 uint32_t mclk_max;
0051 uint32_t mc_data[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];
0052 };
0053
0054 struct tonga_mc_reg_table {
0055 uint8_t last;
0056 uint8_t num_entries;
0057 uint16_t validflag;
0058 struct tonga_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
0059 SMU72_Discrete_MCRegisterAddress mc_reg_address[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];
0060 };
0061
0062
0063 struct tonga_smumgr {
0064
0065 struct smu7_smumgr smu7_data;
0066 struct SMU72_Discrete_DpmTable smc_state_table;
0067 struct SMU72_Discrete_Ulv ulv_setting;
0068 struct SMU72_Discrete_PmFuses power_tune_table;
0069 const struct tonga_pt_defaults *power_tune_defaults;
0070 SMU72_Discrete_MCRegisters mc_regs;
0071 struct tonga_mc_reg_table mc_reg_table;
0072 };
0073
0074 #endif