powerplay/smumgr/smu8_smumgr.h

0001 /*
0002  * Copyright 2015 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 #ifndef _SMU8_SMUMGR_H_
0024 #define _SMU8_SMUMGR_H_
0025
0026
0027 #define MAX_NUM_FIRMWARE                        8
0028 #define MAX_NUM_SCRATCH                         11
0029 #define SMU8_SCRATCH_SIZE_NONGFX_CLOCKGATING      1024
0030 #define SMU8_SCRATCH_SIZE_NONGFX_GOLDENSETTING    2048
0031 #define SMU8_SCRATCH_SIZE_SDMA_METADATA           1024
0032 #define SMU8_SCRATCH_SIZE_IH                      ((2*256+1)*4)
0033
0034 #define SMU_EnabledFeatureScoreboard_SclkDpmOn    0x00200000
0035
0036 enum smu8_scratch_entry {
0037     SMU8_SCRATCH_ENTRY_UCODE_ID_SDMA0 = 0,
0038     SMU8_SCRATCH_ENTRY_UCODE_ID_SDMA1,
0039     SMU8_SCRATCH_ENTRY_UCODE_ID_CP_CE,
0040     SMU8_SCRATCH_ENTRY_UCODE_ID_CP_PFP,
0041     SMU8_SCRATCH_ENTRY_UCODE_ID_CP_ME,
0042     SMU8_SCRATCH_ENTRY_UCODE_ID_CP_MEC_JT1,
0043     SMU8_SCRATCH_ENTRY_UCODE_ID_CP_MEC_JT2,
0044     SMU8_SCRATCH_ENTRY_UCODE_ID_GMCON_RENG,
0045     SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_G,
0046     SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SCRATCH,
0047     SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_ARAM,
0048     SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_DRAM,
0049     SMU8_SCRATCH_ENTRY_UCODE_ID_DMCU_ERAM,
0050     SMU8_SCRATCH_ENTRY_UCODE_ID_DMCU_IRAM,
0051     SMU8_SCRATCH_ENTRY_UCODE_ID_POWER_PROFILING,
0052     SMU8_SCRATCH_ENTRY_DATA_ID_SDMA_HALT,
0053     SMU8_SCRATCH_ENTRY_DATA_ID_SYS_CLOCKGATING,
0054     SMU8_SCRATCH_ENTRY_DATA_ID_SDMA_RING_REGS,
0055     SMU8_SCRATCH_ENTRY_DATA_ID_NONGFX_REINIT,
0056     SMU8_SCRATCH_ENTRY_DATA_ID_SDMA_START,
0057     SMU8_SCRATCH_ENTRY_DATA_ID_IH_REGISTERS,
0058     SMU8_SCRATCH_ENTRY_SMU8_FUSION_CLKTABLE
0059 };
0060
0061 struct smu8_buffer_entry {
0062     uint32_t data_size;
0063     uint64_t mc_addr;
0064     void *kaddr;
0065     enum smu8_scratch_entry firmware_ID;
0066     struct amdgpu_bo *handle; /* as bo handle used when release bo */
0067 };
0068
0069 struct smu8_register_index_data_pair {
0070     uint32_t offset;
0071     uint32_t value;
0072 };
0073
0074 struct smu8_ih_meta_data {
0075     uint32_t command;
0076     struct smu8_register_index_data_pair register_index_value_pair[1];
0077 };
0078
0079 struct smu8_smumgr {
0080     uint8_t driver_buffer_length;
0081     uint8_t scratch_buffer_length;
0082     uint16_t toc_entry_used_count;
0083     uint16_t toc_entry_initialize_index;
0084     uint16_t toc_entry_power_profiling_index;
0085     uint16_t toc_entry_aram;
0086     uint16_t toc_entry_ih_register_restore_task_index;
0087     uint16_t toc_entry_clock_table;
0088     uint16_t ih_register_restore_task_size;
0089     uint16_t smu_buffer_used_bytes;
0090
0091     struct smu8_buffer_entry toc_buffer;
0092     struct smu8_buffer_entry smu_buffer;
0093     struct smu8_buffer_entry firmware_buffer;
0094     struct smu8_buffer_entry driver_buffer[MAX_NUM_FIRMWARE];
0095     struct smu8_buffer_entry meta_data_buffer[MAX_NUM_FIRMWARE];
0096     struct smu8_buffer_entry scratch_buffer[MAX_NUM_SCRATCH];
0097 };
0098
0099 #endif