powerplay/smumgr/polaris10_smumgr.h

0001 /*
0002  * Copyright 2015 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #ifndef _POLARIS10_SMUMANAGER_H
0025 #define _POLARIS10_SMUMANAGER_H
0026
0027
0028 #include <pp_endian.h>
0029 #include "smu74.h"
0030 #include "smu74_discrete.h"
0031 #include "smu7_smumgr.h"
0032
0033 #define SMC_RAM_END 0x40000
0034
0035 struct polaris10_pt_defaults {
0036     uint8_t   SviLoadLineEn;
0037     uint8_t   SviLoadLineVddC;
0038     uint8_t   TDC_VDDC_ThrottleReleaseLimitPerc;
0039     uint8_t   TDC_MAWt;
0040     uint8_t   TdcWaterfallCtl;
0041     uint8_t   DTEAmbientTempBase;
0042
0043     uint32_t  DisplayCac;
0044     uint32_t  BAPM_TEMP_GRADIENT;
0045     uint16_t  BAPMTI_R[SMU74_DTE_ITERATIONS * SMU74_DTE_SOURCES * SMU74_DTE_SINKS];
0046     uint16_t  BAPMTI_RC[SMU74_DTE_ITERATIONS * SMU74_DTE_SOURCES * SMU74_DTE_SINKS];
0047 };
0048
0049 struct polaris10_range_table {
0050     uint32_t trans_lower_frequency; /* in 10khz */
0051     uint32_t trans_upper_frequency;
0052 };
0053
0054 struct polaris10_smumgr {
0055     struct smu7_smumgr smu7_data;
0056     uint8_t protected_mode;
0057     SMU74_Discrete_DpmTable              smc_state_table;
0058     struct SMU74_Discrete_Ulv            ulv_setting;
0059     struct SMU74_Discrete_PmFuses  power_tune_table;
0060     struct polaris10_range_table                range_table[NUM_SCLK_RANGE];
0061     const struct polaris10_pt_defaults       *power_tune_defaults;
0062     uint32_t               bif_sclk_table[SMU74_MAX_LEVELS_LINK];
0063     pp_atomctrl_mc_reg_table             mc_reg_table;
0064 };
0065
0066
0067 #endif