powerplay/smumgr/iceland_smumgr.h

0001 /*
0002  * Copyright 2016 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Author: Huang Rui <ray.huang@amd.com>
0023  *
0024  */
0025
0026 #ifndef _ICELAND_SMUMGR_H_
0027 #define _ICELAND_SMUMGR_H_
0028
0029
0030 #include "smu7_smumgr.h"
0031 #include "pp_endian.h"
0032 #include "smu71_discrete.h"
0033
0034 struct iceland_pt_defaults {
0035     uint8_t   svi_load_line_en;
0036     uint8_t   svi_load_line_vddc;
0037     uint8_t   tdc_vddc_throttle_release_limit_perc;
0038     uint8_t   tdc_mawt;
0039     uint8_t   tdc_waterfall_ctl;
0040     uint8_t   dte_ambient_temp_base;
0041     uint32_t  display_cac;
0042     uint32_t  bapm_temp_gradient;
0043     uint16_t  bapmti_r[SMU71_DTE_ITERATIONS * SMU71_DTE_SOURCES * SMU71_DTE_SINKS];
0044     uint16_t  bapmti_rc[SMU71_DTE_ITERATIONS * SMU71_DTE_SOURCES * SMU71_DTE_SINKS];
0045 };
0046
0047 struct iceland_mc_reg_entry {
0048     uint32_t mclk_max;
0049     uint32_t mc_data[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE];
0050 };
0051
0052 struct iceland_mc_reg_table {
0053     uint8_t   last;               /* number of registers*/
0054     uint8_t   num_entries;        /* number of entries in mc_reg_table_entry used*/
0055     uint16_t  validflag;          /* indicate the corresponding register is valid or not. 1: valid, 0: invalid. bit0->address[0], bit1->address[1], etc.*/
0056     struct iceland_mc_reg_entry    mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
0057     SMU71_Discrete_MCRegisterAddress mc_reg_address[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE];
0058 };
0059
0060 struct iceland_smumgr {
0061     struct smu7_smumgr smu7_data;
0062     struct SMU71_Discrete_DpmTable       smc_state_table;
0063     struct SMU71_Discrete_PmFuses  power_tune_table;
0064     struct SMU71_Discrete_Ulv            ulv_setting;
0065     const struct iceland_pt_defaults  *power_tune_defaults;
0066     SMU71_Discrete_MCRegisters      mc_regs;
0067     struct iceland_mc_reg_table mc_reg_table;
0068 };
0069
0070 #endif