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0001 /*
0002  * Copyright 2015 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 
0024 #ifndef TONGA_PP_SMC_H
0025 #define TONGA_PP_SMC_H
0026 
0027 #pragma pack(push, 1)
0028 
0029 #define PPSMC_SWSTATE_FLAG_DC               0x01
0030 #define PPSMC_SWSTATE_FLAG_UVD              0x02
0031 #define PPSMC_SWSTATE_FLAG_VCE              0x04
0032 #define PPSMC_SWSTATE_FLAG_PCIE_X1          0x08
0033 
0034 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL             0x00
0035 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL             0x01
0036 #define PPSMC_THERMAL_PROTECT_TYPE_NONE                 0xff
0037 
0038 #define PPSMC_SYSTEMFLAG_GPIO_DC                        0x01
0039 #define PPSMC_SYSTEMFLAG_STEPVDDC                       0x02
0040 #define PPSMC_SYSTEMFLAG_GDDR5                          0x04
0041 
0042 #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP               0x08
0043 
0044 #define PPSMC_SYSTEMFLAG_REGULATOR_HOT                  0x10
0045 #define PPSMC_SYSTEMFLAG_REGULATOR_HOT_ANALOG           0x20
0046 #define PPSMC_SYSTEMFLAG_12CHANNEL                      0x40
0047 
0048 
0049 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_MASK              0x07
0050 #define PPSMC_EXTRAFLAGS_AC2DC_DONT_WAIT_FOR_VBLANK     0x08
0051 
0052 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTODPMLOWSTATE   0x00
0053 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTOINITIALSTATE  0x01
0054 
0055 #define PPSMC_EXTRAFLAGS_AC2DC_GPIO5_POLARITY_HIGH      0x10
0056 #define PPSMC_EXTRAFLAGS_DRIVER_TO_GPIO17               0x20
0057 #define PPSMC_EXTRAFLAGS_PCC_TO_GPIO17                  0x40
0058 
0059 /* Defines for DPM 2.0 */
0060 #define PPSMC_DPM2FLAGS_TDPCLMP                         0x01
0061 #define PPSMC_DPM2FLAGS_PWRSHFT                         0x02
0062 #define PPSMC_DPM2FLAGS_OCP                             0x04
0063 
0064 /* Defines for display watermark level */
0065 
0066 #define PPSMC_DISPLAY_WATERMARK_LOW                     0
0067 #define PPSMC_DISPLAY_WATERMARK_HIGH                    1
0068 
0069 /* In the HW performance level's state flags:*/
0070 #define PPSMC_STATEFLAG_AUTO_PULSE_SKIP    0x01
0071 #define PPSMC_STATEFLAG_POWERBOOST         0x02
0072 #define PPSMC_STATEFLAG_PSKIP_ON_TDP_FAULT 0x04
0073 #define PPSMC_STATEFLAG_POWERSHIFT         0x08
0074 #define PPSMC_STATEFLAG_SLOW_READ_MARGIN   0x10
0075 #define PPSMC_STATEFLAG_DEEPSLEEP_THROTTLE 0x20
0076 #define PPSMC_STATEFLAG_DEEPSLEEP_BYPASS   0x40
0077 
0078 /* Fan control algorithm:*/
0079 #define FDO_MODE_HARDWARE 0
0080 #define FDO_MODE_PIECE_WISE_LINEAR 1
0081 
0082 enum FAN_CONTROL {
0083     FAN_CONTROL_FUZZY,
0084     FAN_CONTROL_TABLE
0085 };
0086 
0087 /* Return codes for driver to SMC communication.*/
0088 
0089 #define PPSMC_Result_OK             ((uint16_t)0x01)
0090 #define PPSMC_Result_NoMore         ((uint16_t)0x02)
0091 #define PPSMC_Result_NotNow         ((uint16_t)0x03)
0092 
0093 #define PPSMC_Result_Failed         ((uint16_t)0xFF)
0094 #define PPSMC_Result_UnknownCmd     ((uint16_t)0xFE)
0095 #define PPSMC_Result_UnknownVT      ((uint16_t)0xFD)
0096 
0097 typedef uint16_t PPSMC_Result;
0098 
0099 #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
0100 
0101 
0102 #define PPSMC_MSG_Halt                      ((uint16_t)0x10)
0103 #define PPSMC_MSG_Resume                    ((uint16_t)0x11)
0104 #define PPSMC_MSG_EnableDPMLevel            ((uint16_t)0x12)
0105 #define PPSMC_MSG_ZeroLevelsDisabled        ((uint16_t)0x13)
0106 #define PPSMC_MSG_OneLevelsDisabled         ((uint16_t)0x14)
0107 #define PPSMC_MSG_TwoLevelsDisabled         ((uint16_t)0x15)
0108 #define PPSMC_MSG_EnableThermalInterrupt    ((uint16_t)0x16)
0109 #define PPSMC_MSG_RunningOnAC               ((uint16_t)0x17)
0110 #define PPSMC_MSG_LevelUp                   ((uint16_t)0x18)
0111 #define PPSMC_MSG_LevelDown                 ((uint16_t)0x19)
0112 #define PPSMC_MSG_ResetDPMCounters          ((uint16_t)0x1a)
0113 #define PPSMC_MSG_SwitchToSwState           ((uint16_t)0x20)
0114 
0115 #define PPSMC_MSG_SwitchToSwStateLast       ((uint16_t)0x3f)
0116 #define PPSMC_MSG_SwitchToInitialState      ((uint16_t)0x40)
0117 #define PPSMC_MSG_NoForcedLevel             ((uint16_t)0x41)
0118 #define PPSMC_MSG_ForceHigh                 ((uint16_t)0x42)
0119 #define PPSMC_MSG_ForceMediumOrHigh         ((uint16_t)0x43)
0120 
0121 #define PPSMC_MSG_SwitchToMinimumPower      ((uint16_t)0x51)
0122 #define PPSMC_MSG_ResumeFromMinimumPower    ((uint16_t)0x52)
0123 #define PPSMC_MSG_EnableCac                 ((uint16_t)0x53)
0124 #define PPSMC_MSG_DisableCac                ((uint16_t)0x54)
0125 #define PPSMC_DPMStateHistoryStart          ((uint16_t)0x55)
0126 #define PPSMC_DPMStateHistoryStop           ((uint16_t)0x56)
0127 #define PPSMC_CACHistoryStart               ((uint16_t)0x57)
0128 #define PPSMC_CACHistoryStop                ((uint16_t)0x58)
0129 #define PPSMC_TDPClampingActive             ((uint16_t)0x59)
0130 #define PPSMC_TDPClampingInactive           ((uint16_t)0x5A)
0131 #define PPSMC_StartFanControl               ((uint16_t)0x5B)
0132 #define PPSMC_StopFanControl                ((uint16_t)0x5C)
0133 #define PPSMC_NoDisplay                     ((uint16_t)0x5D)
0134 #define PPSMC_HasDisplay                    ((uint16_t)0x5E)
0135 #define PPSMC_MSG_UVDPowerOFF               ((uint16_t)0x60)
0136 #define PPSMC_MSG_UVDPowerON                ((uint16_t)0x61)
0137 #define PPSMC_MSG_EnableULV                 ((uint16_t)0x62)
0138 #define PPSMC_MSG_DisableULV                ((uint16_t)0x63)
0139 #define PPSMC_MSG_EnterULV                  ((uint16_t)0x64)
0140 #define PPSMC_MSG_ExitULV                   ((uint16_t)0x65)
0141 #define PPSMC_PowerShiftActive              ((uint16_t)0x6A)
0142 #define PPSMC_PowerShiftInactive            ((uint16_t)0x6B)
0143 #define PPSMC_OCPActive                     ((uint16_t)0x6C)
0144 #define PPSMC_OCPInactive                   ((uint16_t)0x6D)
0145 #define PPSMC_CACLongTermAvgEnable          ((uint16_t)0x6E)
0146 #define PPSMC_CACLongTermAvgDisable         ((uint16_t)0x6F)
0147 #define PPSMC_MSG_InferredStateSweep_Start  ((uint16_t)0x70)
0148 #define PPSMC_MSG_InferredStateSweep_Stop   ((uint16_t)0x71)
0149 #define PPSMC_MSG_SwitchToLowestInfState    ((uint16_t)0x72)
0150 #define PPSMC_MSG_SwitchToNonInfState       ((uint16_t)0x73)
0151 #define PPSMC_MSG_AllStateSweep_Start       ((uint16_t)0x74)
0152 #define PPSMC_MSG_AllStateSweep_Stop        ((uint16_t)0x75)
0153 #define PPSMC_MSG_SwitchNextLowerInfState   ((uint16_t)0x76)
0154 #define PPSMC_MSG_SwitchNextHigherInfState  ((uint16_t)0x77)
0155 #define PPSMC_MSG_MclkRetrainingTest        ((uint16_t)0x78)
0156 #define PPSMC_MSG_ForceTDPClamping          ((uint16_t)0x79)
0157 #define PPSMC_MSG_CollectCAC_PowerCorreln   ((uint16_t)0x7A)
0158 #define PPSMC_MSG_CollectCAC_WeightCalib    ((uint16_t)0x7B)
0159 #define PPSMC_MSG_CollectCAC_SQonly         ((uint16_t)0x7C)
0160 #define PPSMC_MSG_CollectCAC_TemperaturePwr ((uint16_t)0x7D)
0161 
0162 #define PPSMC_MSG_ExtremitiesTest_Start     ((uint16_t)0x7E)
0163 #define PPSMC_MSG_ExtremitiesTest_Stop      ((uint16_t)0x7F)
0164 #define PPSMC_FlushDataCache                ((uint16_t)0x80)
0165 #define PPSMC_FlushInstrCache               ((uint16_t)0x81)
0166 
0167 #define PPSMC_MSG_SetEnabledLevels          ((uint16_t)0x82)
0168 #define PPSMC_MSG_SetForcedLevels           ((uint16_t)0x83)
0169 
0170 #define PPSMC_MSG_ResetToDefaults           ((uint16_t)0x84)
0171 
0172 #define PPSMC_MSG_SetForcedLevelsAndJump    ((uint16_t)0x85)
0173 #define PPSMC_MSG_SetCACHistoryMode         ((uint16_t)0x86)
0174 #define PPSMC_MSG_EnableDTE                 ((uint16_t)0x87)
0175 #define PPSMC_MSG_DisableDTE                ((uint16_t)0x88)
0176 
0177 #define PPSMC_MSG_SmcSpaceSetAddress        ((uint16_t)0x89)
0178 #define PPSMC_MSG_ChangeNearTDPLimit        ((uint16_t)0x90)
0179 #define PPSMC_MSG_ChangeSafePowerLimit      ((uint16_t)0x91)
0180 
0181 #define PPSMC_MSG_DPMStateSweepStart        ((uint16_t)0x92)
0182 #define PPSMC_MSG_DPMStateSweepStop         ((uint16_t)0x93)
0183 
0184 #define PPSMC_MSG_OVRDDisableSCLKDS         ((uint16_t)0x94)
0185 #define PPSMC_MSG_CancelDisableOVRDSCLKDS   ((uint16_t)0x95)
0186 #define PPSMC_MSG_ThrottleOVRDSCLKDS        ((uint16_t)0x96)
0187 #define PPSMC_MSG_CancelThrottleOVRDSCLKDS  ((uint16_t)0x97)
0188 #define PPSMC_MSG_GPIO17                    ((uint16_t)0x98)
0189 
0190 #define PPSMC_MSG_API_SetSvi2Volt_Vddc      ((uint16_t)0x99)
0191 #define PPSMC_MSG_API_SetSvi2Volt_Vddci     ((uint16_t)0x9A)
0192 #define PPSMC_MSG_API_SetSvi2Volt_Mvdd      ((uint16_t)0x9B)
0193 #define PPSMC_MSG_API_GetSvi2Volt_Vddc      ((uint16_t)0x9C)
0194 #define PPSMC_MSG_API_GetSvi2Volt_Vddci     ((uint16_t)0x9D)
0195 #define PPSMC_MSG_API_GetSvi2Volt_Mvdd      ((uint16_t)0x9E)
0196 
0197 #define PPSMC_MSG_BREAK                     ((uint16_t)0xF8)
0198 
0199 /* Trinity Specific Messages*/
0200 #define PPSMC_MSG_Test                      ((uint16_t) 0x100)
0201 #define PPSMC_MSG_DPM_Voltage_Pwrmgt        ((uint16_t) 0x101)
0202 #define PPSMC_MSG_DPM_Config                ((uint16_t) 0x102)
0203 #define PPSMC_MSG_PM_Controller_Start       ((uint16_t) 0x103)
0204 #define PPSMC_MSG_DPM_ForceState            ((uint16_t) 0x104)
0205 #define PPSMC_MSG_PG_PowerDownSIMD          ((uint16_t) 0x105)
0206 #define PPSMC_MSG_PG_PowerUpSIMD            ((uint16_t) 0x106)
0207 #define PPSMC_MSG_PM_Controller_Stop        ((uint16_t) 0x107)
0208 #define PPSMC_MSG_PG_SIMD_Config            ((uint16_t) 0x108)
0209 #define PPSMC_MSG_Voltage_Cntl_Enable       ((uint16_t) 0x109)
0210 #define PPSMC_MSG_Thermal_Cntl_Enable       ((uint16_t) 0x10a)
0211 #define PPSMC_MSG_Reset_Service             ((uint16_t) 0x10b)
0212 #define PPSMC_MSG_VCEPowerOFF               ((uint16_t) 0x10e)
0213 #define PPSMC_MSG_VCEPowerON                ((uint16_t) 0x10f)
0214 #define PPSMC_MSG_DPM_Disable_VCE_HS        ((uint16_t) 0x110)
0215 #define PPSMC_MSG_DPM_Enable_VCE_HS         ((uint16_t) 0x111)
0216 #define PPSMC_MSG_DPM_N_LevelsDisabled      ((uint16_t) 0x112)
0217 #define PPSMC_MSG_DCEPowerOFF               ((uint16_t) 0x113)
0218 #define PPSMC_MSG_DCEPowerON                ((uint16_t) 0x114)
0219 #define PPSMC_MSG_PCIE_DDIPowerDown         ((uint16_t) 0x117)
0220 #define PPSMC_MSG_PCIE_DDIPowerUp           ((uint16_t) 0x118)
0221 #define PPSMC_MSG_PCIE_CascadePLLPowerDown  ((uint16_t) 0x119)
0222 #define PPSMC_MSG_PCIE_CascadePLLPowerUp    ((uint16_t) 0x11a)
0223 #define PPSMC_MSG_SYSPLLPowerOff            ((uint16_t) 0x11b)
0224 #define PPSMC_MSG_SYSPLLPowerOn             ((uint16_t) 0x11c)
0225 #define PPSMC_MSG_DCE_RemoveVoltageAdjustment   ((uint16_t) 0x11d)
0226 #define PPSMC_MSG_DCE_AllowVoltageAdjustment    ((uint16_t) 0x11e)
0227 #define PPSMC_MSG_DISPLAYPHYStatusNotify    ((uint16_t) 0x11f)
0228 #define PPSMC_MSG_EnableBAPM                ((uint16_t) 0x120)
0229 #define PPSMC_MSG_DisableBAPM               ((uint16_t) 0x121)
0230 #define PPSMC_MSG_PCIE_PHYPowerDown         ((uint16_t) 0x122)
0231 #define PPSMC_MSG_PCIE_PHYPowerUp           ((uint16_t) 0x123)
0232 #define PPSMC_MSG_UVD_DPM_Config            ((uint16_t) 0x124)
0233 #define PPSMC_MSG_Spmi_Enable               ((uint16_t) 0x122)
0234 #define PPSMC_MSG_Spmi_Timer                ((uint16_t) 0x123)
0235 #define PPSMC_MSG_LCLK_DPM_Config           ((uint16_t) 0x124)
0236 #define PPSMC_MSG_NBDPM_Config             ((uint16_t) 0x125)
0237 #define PPSMC_MSG_PCIE_DDIPhyPowerDown           ((uint16_t) 0x126)
0238 #define PPSMC_MSG_PCIE_DDIPhyPowerUp             ((uint16_t) 0x127)
0239 #define PPSMC_MSG_MCLKDPM_Config                ((uint16_t) 0x128)
0240 
0241 #define PPSMC_MSG_UVDDPM_Config               ((uint16_t) 0x129)
0242 #define PPSMC_MSG_VCEDPM_Config               ((uint16_t) 0x12A)
0243 #define PPSMC_MSG_ACPDPM_Config               ((uint16_t) 0x12B)
0244 #define PPSMC_MSG_SAMUDPM_Config              ((uint16_t) 0x12C)
0245 #define PPSMC_MSG_UVDDPM_SetEnabledMask       ((uint16_t) 0x12D)
0246 #define PPSMC_MSG_VCEDPM_SetEnabledMask       ((uint16_t) 0x12E)
0247 #define PPSMC_MSG_ACPDPM_SetEnabledMask       ((uint16_t) 0x12F)
0248 #define PPSMC_MSG_SAMUDPM_SetEnabledMask      ((uint16_t) 0x130)
0249 #define PPSMC_MSG_MCLKDPM_ForceState          ((uint16_t) 0x131)
0250 #define PPSMC_MSG_MCLKDPM_NoForcedLevel       ((uint16_t) 0x132)
0251 #define PPSMC_MSG_Thermal_Cntl_Disable        ((uint16_t) 0x133)
0252 #define PPSMC_MSG_SetTDPLimit                 ((uint16_t) 0x134)
0253 #define PPSMC_MSG_Voltage_Cntl_Disable        ((uint16_t) 0x135)
0254 #define PPSMC_MSG_PCIeDPM_Enable              ((uint16_t) 0x136)
0255 #define PPSMC_MSG_ACPPowerOFF                 ((uint16_t) 0x137)
0256 #define PPSMC_MSG_ACPPowerON                  ((uint16_t) 0x138)
0257 #define PPSMC_MSG_SAMPowerOFF                 ((uint16_t) 0x139)
0258 #define PPSMC_MSG_SAMPowerON                  ((uint16_t) 0x13a)
0259 #define PPSMC_MSG_SDMAPowerOFF                ((uint16_t) 0x13b)
0260 #define PPSMC_MSG_SDMAPowerON                 ((uint16_t) 0x13c)
0261 #define PPSMC_MSG_PCIeDPM_Disable             ((uint16_t) 0x13d)
0262 #define PPSMC_MSG_IOMMUPowerOFF               ((uint16_t) 0x13e)
0263 #define PPSMC_MSG_IOMMUPowerON                ((uint16_t) 0x13f)
0264 #define PPSMC_MSG_NBDPM_Enable                ((uint16_t) 0x140)
0265 #define PPSMC_MSG_NBDPM_Disable               ((uint16_t) 0x141)
0266 #define PPSMC_MSG_NBDPM_ForceNominal          ((uint16_t) 0x142)
0267 #define PPSMC_MSG_NBDPM_ForcePerformance      ((uint16_t) 0x143)
0268 #define PPSMC_MSG_NBDPM_UnForce               ((uint16_t) 0x144)
0269 #define PPSMC_MSG_SCLKDPM_SetEnabledMask      ((uint16_t) 0x145)
0270 #define PPSMC_MSG_MCLKDPM_SetEnabledMask      ((uint16_t) 0x146)
0271 #define PPSMC_MSG_PCIeDPM_ForceLevel          ((uint16_t) 0x147)
0272 #define PPSMC_MSG_PCIeDPM_UnForceLevel        ((uint16_t) 0x148)
0273 #define PPSMC_MSG_EnableACDCGPIOInterrupt     ((uint16_t) 0x149)
0274 #define PPSMC_MSG_EnableVRHotGPIOInterrupt    ((uint16_t) 0x14a)
0275 #define PPSMC_MSG_SwitchToAC                  ((uint16_t) 0x14b)
0276 
0277 #define PPSMC_MSG_XDMAPowerOFF                ((uint16_t) 0x14c)
0278 #define PPSMC_MSG_XDMAPowerON                 ((uint16_t) 0x14d)
0279 
0280 #define PPSMC_MSG_DPM_Enable                  ((uint16_t)0x14e)
0281 #define PPSMC_MSG_DPM_Disable                 ((uint16_t)0x14f)
0282 #define PPSMC_MSG_MCLKDPM_Enable              ((uint16_t)0x150)
0283 #define PPSMC_MSG_MCLKDPM_Disable             ((uint16_t)0x151)
0284 #define PPSMC_MSG_LCLKDPM_Enable              ((uint16_t)0x152)
0285 #define PPSMC_MSG_LCLKDPM_Disable             ((uint16_t)0x153)
0286 #define PPSMC_MSG_UVDDPM_Enable               ((uint16_t)0x154)
0287 #define PPSMC_MSG_UVDDPM_Disable              ((uint16_t)0x155)
0288 #define PPSMC_MSG_SAMUDPM_Enable              ((uint16_t)0x156)
0289 #define PPSMC_MSG_SAMUDPM_Disable             ((uint16_t)0x157)
0290 #define PPSMC_MSG_ACPDPM_Enable               ((uint16_t)0x158)
0291 #define PPSMC_MSG_ACPDPM_Disable              ((uint16_t)0x159)
0292 #define PPSMC_MSG_VCEDPM_Enable               ((uint16_t)0x15a)
0293 #define PPSMC_MSG_VCEDPM_Disable              ((uint16_t)0x15b)
0294 #define PPSMC_MSG_LCLKDPM_SetEnabledMask      ((uint16_t)0x15c)
0295 
0296 #define PPSMC_MSG_DPM_FPS_Mode                ((uint16_t) 0x15d)
0297 #define PPSMC_MSG_DPM_Activity_Mode           ((uint16_t) 0x15e)
0298 #define PPSMC_MSG_VddC_Request                ((uint16_t) 0x15f)
0299 #define PPSMC_MSG_MCLKDPM_GetEnabledMask      ((uint16_t) 0x160)
0300 #define PPSMC_MSG_LCLKDPM_GetEnabledMask      ((uint16_t) 0x161)
0301 #define PPSMC_MSG_SCLKDPM_GetEnabledMask      ((uint16_t) 0x162)
0302 #define PPSMC_MSG_UVDDPM_GetEnabledMask       ((uint16_t) 0x163)
0303 #define PPSMC_MSG_SAMUDPM_GetEnabledMask      ((uint16_t) 0x164)
0304 #define PPSMC_MSG_ACPDPM_GetEnabledMask       ((uint16_t) 0x165)
0305 #define PPSMC_MSG_VCEDPM_GetEnabledMask       ((uint16_t) 0x166)
0306 #define PPSMC_MSG_PCIeDPM_SetEnabledMask      ((uint16_t) 0x167)
0307 #define PPSMC_MSG_PCIeDPM_GetEnabledMask      ((uint16_t) 0x168)
0308 #define PPSMC_MSG_TDCLimitEnable              ((uint16_t) 0x169)
0309 #define PPSMC_MSG_TDCLimitDisable             ((uint16_t) 0x16a)
0310 #define PPSMC_MSG_DPM_AutoRotate_Mode         ((uint16_t) 0x16b)
0311 #define PPSMC_MSG_DISPCLK_FROM_FCH            ((uint16_t)0x16c)
0312 #define PPSMC_MSG_DISPCLK_FROM_DFS            ((uint16_t)0x16d)
0313 #define PPSMC_MSG_DPREFCLK_FROM_FCH           ((uint16_t)0x16e)
0314 #define PPSMC_MSG_DPREFCLK_FROM_DFS           ((uint16_t)0x16f)
0315 #define PPSMC_MSG_PmStatusLogStart            ((uint16_t)0x170)
0316 #define PPSMC_MSG_PmStatusLogSample           ((uint16_t)0x171)
0317 #define PPSMC_MSG_SCLK_AutoDPM_ON             ((uint16_t) 0x172)
0318 #define PPSMC_MSG_MCLK_AutoDPM_ON             ((uint16_t) 0x173)
0319 #define PPSMC_MSG_LCLK_AutoDPM_ON             ((uint16_t) 0x174)
0320 #define PPSMC_MSG_UVD_AutoDPM_ON              ((uint16_t) 0x175)
0321 #define PPSMC_MSG_SAMU_AutoDPM_ON             ((uint16_t) 0x176)
0322 #define PPSMC_MSG_ACP_AutoDPM_ON              ((uint16_t) 0x177)
0323 #define PPSMC_MSG_VCE_AutoDPM_ON              ((uint16_t) 0x178)
0324 #define PPSMC_MSG_PCIe_AutoDPM_ON             ((uint16_t) 0x179)
0325 #define PPSMC_MSG_MASTER_AutoDPM_ON           ((uint16_t) 0x17a)
0326 #define PPSMC_MSG_MASTER_AutoDPM_OFF          ((uint16_t) 0x17b)
0327 #define PPSMC_MSG_DYNAMICDISPPHYPOWER         ((uint16_t) 0x17c)
0328 #define PPSMC_MSG_CAC_COLLECTION_ON           ((uint16_t) 0x17d)
0329 #define PPSMC_MSG_CAC_COLLECTION_OFF          ((uint16_t) 0x17e)
0330 #define PPSMC_MSG_CAC_CORRELATION_ON          ((uint16_t) 0x17f)
0331 #define PPSMC_MSG_CAC_CORRELATION_OFF         ((uint16_t) 0x180)
0332 #define PPSMC_MSG_PM_STATUS_TO_DRAM_ON        ((uint16_t) 0x181)
0333 #define PPSMC_MSG_PM_STATUS_TO_DRAM_OFF       ((uint16_t) 0x182)
0334 #define PPSMC_MSG_UVD_HANDSHAKE_OFF           ((uint16_t) 0x183)
0335 #define PPSMC_MSG_ALLOW_LOWSCLK_INTERRUPT     ((uint16_t) 0x184)
0336 #define PPSMC_MSG_PkgPwrLimitEnable           ((uint16_t) 0x185)
0337 #define PPSMC_MSG_PkgPwrLimitDisable          ((uint16_t) 0x186)
0338 #define PPSMC_MSG_PkgPwrSetLimit              ((uint16_t) 0x187)
0339 #define PPSMC_MSG_OverDriveSetTargetTdp       ((uint16_t) 0x188)
0340 #define PPSMC_MSG_SCLKDPM_FreezeLevel         ((uint16_t) 0x189)
0341 #define PPSMC_MSG_SCLKDPM_UnfreezeLevel       ((uint16_t) 0x18A)
0342 #define PPSMC_MSG_MCLKDPM_FreezeLevel         ((uint16_t) 0x18B)
0343 #define PPSMC_MSG_MCLKDPM_UnfreezeLevel       ((uint16_t) 0x18C)
0344 #define PPSMC_MSG_START_DRAM_LOGGING          ((uint16_t) 0x18D)
0345 #define PPSMC_MSG_STOP_DRAM_LOGGING           ((uint16_t) 0x18E)
0346 #define PPSMC_MSG_MASTER_DeepSleep_ON         ((uint16_t) 0x18F)
0347 #define PPSMC_MSG_MASTER_DeepSleep_OFF        ((uint16_t) 0x190)
0348 #define PPSMC_MSG_Remove_DC_Clamp             ((uint16_t) 0x191)
0349 #define PPSMC_MSG_DisableACDCGPIOInterrupt    ((uint16_t) 0x192)
0350 #define PPSMC_MSG_OverrideVoltageControl_SetVddc       ((uint16_t) 0x193)
0351 #define PPSMC_MSG_OverrideVoltageControl_SetVddci      ((uint16_t) 0x194)
0352 #define PPSMC_MSG_SetVidOffset_1              ((uint16_t) 0x195)
0353 #define PPSMC_MSG_SetVidOffset_2              ((uint16_t) 0x207)
0354 #define PPSMC_MSG_GetVidOffset_1              ((uint16_t) 0x196)
0355 #define PPSMC_MSG_GetVidOffset_2              ((uint16_t) 0x208)
0356 #define PPSMC_MSG_THERMAL_OVERDRIVE_Enable    ((uint16_t) 0x197)
0357 #define PPSMC_MSG_THERMAL_OVERDRIVE_Disable   ((uint16_t) 0x198)
0358 #define PPSMC_MSG_SetTjMax                    ((uint16_t) 0x199)
0359 #define PPSMC_MSG_SetFanPwmMax                ((uint16_t) 0x19A)
0360 
0361 #define PPSMC_MSG_WaitForMclkSwitchFinish     ((uint16_t) 0x19B)
0362 #define PPSMC_MSG_ENABLE_THERMAL_DPM          ((uint16_t) 0x19C)
0363 #define PPSMC_MSG_DISABLE_THERMAL_DPM         ((uint16_t) 0x19D)
0364 #define PPSMC_MSG_Enable_PCC                  ((uint16_t) 0x19E)
0365 #define PPSMC_MSG_Disable_PCC                 ((uint16_t) 0x19F)
0366 
0367 #define PPSMC_MSG_API_GetSclkFrequency        ((uint16_t) 0x200)
0368 #define PPSMC_MSG_API_GetMclkFrequency        ((uint16_t) 0x201)
0369 #define PPSMC_MSG_API_GetSclkBusy             ((uint16_t) 0x202)
0370 #define PPSMC_MSG_API_GetMclkBusy             ((uint16_t) 0x203)
0371 #define PPSMC_MSG_API_GetAsicPower            ((uint16_t) 0x204)
0372 #define PPSMC_MSG_SetFanRpmMax                ((uint16_t) 0x205)
0373 #define PPSMC_MSG_SetFanSclkTarget            ((uint16_t) 0x206)
0374 #define PPSMC_MSG_SetFanMinPwm                ((uint16_t) 0x209)
0375 #define PPSMC_MSG_SetFanTemperatureTarget     ((uint16_t) 0x20A)
0376 
0377 #define PPSMC_MSG_BACO_StartMonitor           ((uint16_t) 0x240)
0378 #define PPSMC_MSG_BACO_Cancel                 ((uint16_t) 0x241)
0379 #define PPSMC_MSG_EnableVddGfx                ((uint16_t) 0x242)
0380 #define PPSMC_MSG_DisableVddGfx               ((uint16_t) 0x243)
0381 #define PPSMC_MSG_UcodeAddressLow             ((uint16_t) 0x244)
0382 #define PPSMC_MSG_UcodeAddressHigh            ((uint16_t) 0x245)
0383 #define PPSMC_MSG_UcodeLoadStatus             ((uint16_t) 0x246)
0384 
0385 #define PPSMC_MSG_DRV_DRAM_ADDR_HI            ((uint16_t) 0x250)
0386 #define PPSMC_MSG_DRV_DRAM_ADDR_LO            ((uint16_t) 0x251)
0387 #define PPSMC_MSG_SMU_DRAM_ADDR_HI            ((uint16_t) 0x252)
0388 #define PPSMC_MSG_SMU_DRAM_ADDR_LO            ((uint16_t) 0x253)
0389 #define PPSMC_MSG_LoadUcodes                  ((uint16_t) 0x254)
0390 #define PPSMC_MSG_PowerStateNotify            ((uint16_t) 0x255)
0391 #define PPSMC_MSG_COND_EXEC_DRAM_ADDR_HI      ((uint16_t) 0x256)
0392 #define PPSMC_MSG_COND_EXEC_DRAM_ADDR_LO      ((uint16_t) 0x257)
0393 #define PPSMC_MSG_VBIOS_DRAM_ADDR_HI          ((uint16_t) 0x258)
0394 #define PPSMC_MSG_VBIOS_DRAM_ADDR_LO          ((uint16_t) 0x259)
0395 #define PPSMC_MSG_LoadVBios                   ((uint16_t) 0x25A)
0396 #define PPSMC_MSG_GetUcodeVersion             ((uint16_t) 0x25B)
0397 #define DMCUSMC_MSG_PSREntry                  ((uint16_t) 0x25C)
0398 #define DMCUSMC_MSG_PSRExit                   ((uint16_t) 0x25D)
0399 #define PPSMC_MSG_EnableClockGatingFeature    ((uint16_t) 0x260)
0400 #define PPSMC_MSG_DisableClockGatingFeature   ((uint16_t) 0x261)
0401 #define PPSMC_MSG_IsDeviceRunning             ((uint16_t) 0x262)
0402 #define PPSMC_MSG_LoadMetaData                ((uint16_t) 0x263)
0403 #define PPSMC_MSG_TMON_AutoCaliberate_Enable  ((uint16_t) 0x264)
0404 #define PPSMC_MSG_TMON_AutoCaliberate_Disable ((uint16_t) 0x265)
0405 #define PPSMC_MSG_GetTelemetry1Slope          ((uint16_t) 0x266)
0406 #define PPSMC_MSG_GetTelemetry1Offset         ((uint16_t) 0x267)
0407 #define PPSMC_MSG_GetTelemetry2Slope          ((uint16_t) 0x268)
0408 #define PPSMC_MSG_GetTelemetry2Offset         ((uint16_t) 0x269)
0409 
0410 typedef uint16_t PPSMC_Msg;
0411 
0412 /* If the SMC firmware has an event status soft register this is what the individual bits mean.*/
0413 #define PPSMC_EVENT_STATUS_THERMAL          0x00000001
0414 #define PPSMC_EVENT_STATUS_REGULATORHOT     0x00000002
0415 #define PPSMC_EVENT_STATUS_DC               0x00000004
0416 #define PPSMC_EVENT_STATUS_GPIO17           0x00000008
0417 
0418 
0419 #pragma pack(pop)
0420 #endif