powerplay/inc/smu_ucode_xfer_vi.h

0001 /*
0002  * Copyright 2014 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #ifndef SMU_UCODE_XFER_VI_H
0025 #define SMU_UCODE_XFER_VI_H
0026
0027 #define SMU_DRAMData_TOC_VERSION  1
0028 #define MAX_IH_REGISTER_COUNT     65535
0029 #define SMU_DIGEST_SIZE_BYTES     20
0030 #define SMU_FB_SIZE_BYTES         1048576
0031 #define SMU_MAX_ENTRIES           12
0032
0033 #define UCODE_ID_SMU              0
0034 #define UCODE_ID_SDMA0            1
0035 #define UCODE_ID_SDMA1            2
0036 #define UCODE_ID_CP_CE            3
0037 #define UCODE_ID_CP_PFP           4
0038 #define UCODE_ID_CP_ME            5
0039 #define UCODE_ID_CP_MEC           6
0040 #define UCODE_ID_CP_MEC_JT1       7
0041 #define UCODE_ID_CP_MEC_JT2       8
0042 #define UCODE_ID_GMCON_RENG       9
0043 #define UCODE_ID_RLC_G            10
0044 #define UCODE_ID_IH_REG_RESTORE   11
0045 #define UCODE_ID_VBIOS            12
0046 #define UCODE_ID_MISC_METADATA    13
0047 #define UCODE_ID_SMU_SK           14
0048 #define UCODE_ID_RLC_SCRATCH      32
0049 #define UCODE_ID_RLC_SRM_ARAM     33
0050 #define UCODE_ID_RLC_SRM_DRAM     34
0051 #define UCODE_ID_MEC_STORAGE      35
0052 #define UCODE_ID_VBIOS_PARAMETERS 36
0053 #define UCODE_META_DATA           0xFF
0054
0055 #define UCODE_ID_SMU_MASK             0x00000001
0056 #define UCODE_ID_SDMA0_MASK           0x00000002
0057 #define UCODE_ID_SDMA1_MASK           0x00000004
0058 #define UCODE_ID_CP_CE_MASK           0x00000008
0059 #define UCODE_ID_CP_PFP_MASK          0x00000010
0060 #define UCODE_ID_CP_ME_MASK           0x00000020
0061 #define UCODE_ID_CP_MEC_MASK          0x00000040
0062 #define UCODE_ID_CP_MEC_JT1_MASK      0x00000080
0063 #define UCODE_ID_CP_MEC_JT2_MASK      0x00000100
0064 #define UCODE_ID_GMCON_RENG_MASK      0x00000200
0065 #define UCODE_ID_RLC_G_MASK           0x00000400
0066 #define UCODE_ID_IH_REG_RESTORE_MASK  0x00000800
0067 #define UCODE_ID_VBIOS_MASK           0x00001000
0068
0069 #define UCODE_FLAG_UNHALT_MASK   0x1
0070
0071 struct SMU_Entry {
0072 #ifndef __BIG_ENDIAN
0073     uint16_t id;
0074     uint16_t version;
0075     uint32_t image_addr_high;
0076     uint32_t image_addr_low;
0077     uint32_t meta_data_addr_high;
0078     uint32_t meta_data_addr_low;
0079     uint32_t data_size_byte;
0080     uint16_t flags;
0081     uint16_t num_register_entries;
0082 #else
0083     uint16_t version;
0084     uint16_t id;
0085     uint32_t image_addr_high;
0086     uint32_t image_addr_low;
0087     uint32_t meta_data_addr_high;
0088     uint32_t meta_data_addr_low;
0089     uint32_t data_size_byte;
0090     uint16_t num_register_entries;
0091     uint16_t flags;
0092 #endif
0093 };
0094
0095 struct SMU_DRAMData_TOC {
0096     uint32_t structure_version;
0097     uint32_t num_entries;
0098     struct SMU_Entry entry[SMU_MAX_ENTRIES];
0099 };
0100
0101 #endif