powerplay/inc/smu8_fusion.h

0001 /*
0002  * Copyright 2014 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #ifndef SMU8_FUSION_H
0025 #define SMU8_FUSION_H
0026
0027 #include "smu8.h"
0028
0029 #pragma pack(push, 1)
0030
0031 #define SMU8_MAX_CUS 2
0032 #define SMU8_PSMS_PER_CU 4
0033 #define SMU8_CACS_PER_CU 4
0034
0035 struct SMU8_GfxCuPgScoreboard {
0036     uint8_t Enabled;
0037     uint8_t spare[3];
0038 };
0039
0040 struct SMU8_Port80MonitorTable {
0041     uint32_t MmioAddress;
0042     uint32_t MemoryBaseHi;
0043     uint32_t MemoryBaseLo;
0044     uint16_t MemoryBufferSize;
0045     uint16_t MemoryPosition;
0046     uint16_t PollingInterval;
0047     uint8_t  EnableCsrShadow;
0048     uint8_t  EnableDramShadow;
0049 };
0050
0051 /*  Display specific power management parameters */
0052 #define PWRMGT_SEPARATION_TIME_SHIFT            0
0053 #define PWRMGT_SEPARATION_TIME_MASK             0xFFFF
0054 #define PWRMGT_DISABLE_CPU_CSTATES_SHIFT        16
0055 #define PWRMGT_DISABLE_CPU_CSTATES_MASK         0x1
0056 #define PWRMGT_DISABLE_CPU_PSTATES_SHIFT        24
0057 #define PWRMGT_DISABLE_CPU_PSTATES_MASK         0x1
0058
0059 /* Clock Table Definitions */
0060 #define NUM_SCLK_LEVELS     8
0061 #define NUM_LCLK_LEVELS     8
0062 #define NUM_UVD_LEVELS      8
0063 #define NUM_ECLK_LEVELS     8
0064 #define NUM_ACLK_LEVELS     8
0065
0066 struct SMU8_Fusion_ClkLevel {
0067     uint8_t     GnbVid;
0068     uint8_t     GfxVid;
0069     uint8_t     DfsDid;
0070     uint8_t     DeepSleepDid;
0071     uint32_t    DfsBypass;
0072     uint32_t    Frequency;
0073 };
0074
0075 struct SMU8_Fusion_SclkBreakdownTable {
0076     struct SMU8_Fusion_ClkLevel ClkLevel[NUM_SCLK_LEVELS];
0077     struct SMU8_Fusion_ClkLevel DpmOffLevel;
0078     /* SMU8_Fusion_ClkLevel PwrOffLevel; */
0079     uint32_t    SclkValidMask;
0080     uint32_t    MaxSclkIndex;
0081 };
0082
0083 struct SMU8_Fusion_LclkBreakdownTable {
0084     struct SMU8_Fusion_ClkLevel ClkLevel[NUM_LCLK_LEVELS];
0085     struct SMU8_Fusion_ClkLevel DpmOffLevel;
0086     /* SMU8_Fusion_ClkLevel PwrOffLevel; */
0087     uint32_t    LclkValidMask;
0088     uint32_t    MaxLclkIndex;
0089 };
0090
0091 struct SMU8_Fusion_EclkBreakdownTable {
0092     struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ECLK_LEVELS];
0093     struct SMU8_Fusion_ClkLevel DpmOffLevel;
0094     struct SMU8_Fusion_ClkLevel PwrOffLevel;
0095     uint32_t    EclkValidMask;
0096     uint32_t    MaxEclkIndex;
0097 };
0098
0099 struct SMU8_Fusion_VclkBreakdownTable {
0100     struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
0101     struct SMU8_Fusion_ClkLevel DpmOffLevel;
0102     struct SMU8_Fusion_ClkLevel PwrOffLevel;
0103     uint32_t    VclkValidMask;
0104     uint32_t    MaxVclkIndex;
0105 };
0106
0107 struct SMU8_Fusion_DclkBreakdownTable {
0108     struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
0109     struct SMU8_Fusion_ClkLevel DpmOffLevel;
0110     struct SMU8_Fusion_ClkLevel PwrOffLevel;
0111     uint32_t    DclkValidMask;
0112     uint32_t    MaxDclkIndex;
0113 };
0114
0115 struct SMU8_Fusion_AclkBreakdownTable {
0116     struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ACLK_LEVELS];
0117     struct SMU8_Fusion_ClkLevel DpmOffLevel;
0118     struct SMU8_Fusion_ClkLevel PwrOffLevel;
0119     uint32_t    AclkValidMask;
0120     uint32_t    MaxAclkIndex;
0121 };
0122
0123
0124 struct SMU8_Fusion_ClkTable {
0125     struct SMU8_Fusion_SclkBreakdownTable SclkBreakdownTable;
0126     struct SMU8_Fusion_LclkBreakdownTable LclkBreakdownTable;
0127     struct SMU8_Fusion_EclkBreakdownTable EclkBreakdownTable;
0128     struct SMU8_Fusion_VclkBreakdownTable VclkBreakdownTable;
0129     struct SMU8_Fusion_DclkBreakdownTable DclkBreakdownTable;
0130     struct SMU8_Fusion_AclkBreakdownTable AclkBreakdownTable;
0131 };
0132
0133 #pragma pack(pop)
0134
0135 #endif