powerplay/inc/fiji_ppsmc.h

0001 /*
0002  * Copyright 2015 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024
0025 #ifndef _FIJI_PP_SMC_H_
0026 #define _FIJI_PP_SMC_H_
0027
0028 #pragma pack(push, 1)
0029
0030 #define PPSMC_SWSTATE_FLAG_DC                           0x01
0031 #define PPSMC_SWSTATE_FLAG_UVD                          0x02
0032 #define PPSMC_SWSTATE_FLAG_VCE                          0x04
0033
0034 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL             0x00
0035 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL             0x01
0036 #define PPSMC_THERMAL_PROTECT_TYPE_NONE                 0xff
0037
0038 #define PPSMC_SYSTEMFLAG_GPIO_DC                        0x01
0039 #define PPSMC_SYSTEMFLAG_STEPVDDC                       0x02
0040 #define PPSMC_SYSTEMFLAG_GDDR5                          0x04
0041
0042 #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP               0x08
0043
0044 #define PPSMC_SYSTEMFLAG_REGULATOR_HOT                  0x10
0045 #define PPSMC_SYSTEMFLAG_REGULATOR_HOT_ANALOG           0x20
0046
0047 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_MASK              0x07
0048 #define PPSMC_EXTRAFLAGS_AC2DC_DONT_WAIT_FOR_VBLANK     0x08
0049
0050 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTODPMLOWSTATE   0x00
0051 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTOINITIALSTATE  0x01
0052
0053 /* Defines for DPM 2.0 */
0054 #define PPSMC_DPM2FLAGS_TDPCLMP                         0x01
0055 #define PPSMC_DPM2FLAGS_PWRSHFT                         0x02
0056 #define PPSMC_DPM2FLAGS_OCP                             0x04
0057
0058 /* Defines for display watermark level */
0059 #define PPSMC_DISPLAY_WATERMARK_LOW                     0
0060 #define PPSMC_DISPLAY_WATERMARK_HIGH                    1
0061
0062 /* In the HW performance level's state flags: */
0063 #define PPSMC_STATEFLAG_AUTO_PULSE_SKIP    0x01
0064 #define PPSMC_STATEFLAG_POWERBOOST         0x02
0065 #define PPSMC_STATEFLAG_PSKIP_ON_TDP_FAULT 0x04
0066 #define PPSMC_STATEFLAG_POWERSHIFT         0x08
0067 #define PPSMC_STATEFLAG_SLOW_READ_MARGIN   0x10
0068 #define PPSMC_STATEFLAG_DEEPSLEEP_THROTTLE 0x20
0069 #define PPSMC_STATEFLAG_DEEPSLEEP_BYPASS   0x40
0070
0071 /* Fan control algorithm: */
0072 #define FDO_MODE_HARDWARE 0
0073 #define FDO_MODE_PIECE_WISE_LINEAR 1
0074
0075 enum FAN_CONTROL {
0076   FAN_CONTROL_FUZZY,
0077   FAN_CONTROL_TABLE
0078 };
0079
0080 /* Gemini Modes*/
0081 #define PPSMC_GeminiModeNone   0  /*Single GPU board*/
0082 #define PPSMC_GeminiModeMaster 1  /*Master GPU on a Gemini board*/
0083 #define PPSMC_GeminiModeSlave  2  /*Slave GPU on a Gemini board*/
0084
0085
0086 /* Return codes for driver to SMC communication. */
0087 #define PPSMC_Result_OK             ((uint16_t)0x01)
0088 #define PPSMC_Result_NoMore         ((uint16_t)0x02)
0089
0090 #define PPSMC_Result_NotNow         ((uint16_t)0x03)
0091
0092 #define PPSMC_Result_Failed         ((uint16_t)0xFF)
0093 #define PPSMC_Result_UnknownCmd     ((uint16_t)0xFE)
0094 #define PPSMC_Result_UnknownVT      ((uint16_t)0xFD)
0095
0096 #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
0097
0098
0099 #define PPSMC_MSG_Halt                      ((uint16_t)0x10)
0100 #define PPSMC_MSG_Resume                    ((uint16_t)0x11)
0101 #define PPSMC_MSG_EnableDPMLevel            ((uint16_t)0x12)
0102 #define PPSMC_MSG_ZeroLevelsDisabled        ((uint16_t)0x13)
0103 #define PPSMC_MSG_OneLevelsDisabled         ((uint16_t)0x14)
0104 #define PPSMC_MSG_TwoLevelsDisabled         ((uint16_t)0x15)
0105 #define PPSMC_MSG_EnableThermalInterrupt    ((uint16_t)0x16)
0106 #define PPSMC_MSG_RunningOnAC               ((uint16_t)0x17)
0107 #define PPSMC_MSG_LevelUp                   ((uint16_t)0x18)
0108 #define PPSMC_MSG_LevelDown                 ((uint16_t)0x19)
0109 #define PPSMC_MSG_ResetDPMCounters          ((uint16_t)0x1a)
0110 #define PPSMC_MSG_SwitchToSwState           ((uint16_t)0x20)
0111
0112 #define PPSMC_MSG_SwitchToSwStateLast       ((uint16_t)0x3f)
0113 #define PPSMC_MSG_SwitchToInitialState      ((uint16_t)0x40)
0114 #define PPSMC_MSG_NoForcedLevel             ((uint16_t)0x41)
0115 #define PPSMC_MSG_ForceHigh                 ((uint16_t)0x42)
0116 #define PPSMC_MSG_ForceMediumOrHigh         ((uint16_t)0x43)
0117
0118 #define PPSMC_MSG_SwitchToMinimumPower      ((uint16_t)0x51)
0119 #define PPSMC_MSG_ResumeFromMinimumPower    ((uint16_t)0x52)
0120 #define PPSMC_MSG_EnableCac                 ((uint16_t)0x53)
0121 #define PPSMC_MSG_DisableCac                ((uint16_t)0x54)
0122 #define PPSMC_DPMStateHistoryStart          ((uint16_t)0x55)
0123 #define PPSMC_DPMStateHistoryStop           ((uint16_t)0x56)
0124 #define PPSMC_CACHistoryStart               ((uint16_t)0x57)
0125 #define PPSMC_CACHistoryStop                ((uint16_t)0x58)
0126 #define PPSMC_TDPClampingActive             ((uint16_t)0x59)
0127 #define PPSMC_TDPClampingInactive           ((uint16_t)0x5A)
0128 #define PPSMC_StartFanControl               ((uint16_t)0x5B)
0129 #define PPSMC_StopFanControl                ((uint16_t)0x5C)
0130 #define PPSMC_NoDisplay                     ((uint16_t)0x5D)
0131 #define PPSMC_HasDisplay                    ((uint16_t)0x5E)
0132 #define PPSMC_MSG_UVDPowerOFF               ((uint16_t)0x60)
0133 #define PPSMC_MSG_UVDPowerON                ((uint16_t)0x61)
0134 #define PPSMC_MSG_EnableULV                 ((uint16_t)0x62)
0135 #define PPSMC_MSG_DisableULV                ((uint16_t)0x63)
0136 #define PPSMC_MSG_EnterULV                  ((uint16_t)0x64)
0137 #define PPSMC_MSG_ExitULV                   ((uint16_t)0x65)
0138 #define PPSMC_PowerShiftActive              ((uint16_t)0x6A)
0139 #define PPSMC_PowerShiftInactive            ((uint16_t)0x6B)
0140 #define PPSMC_OCPActive                     ((uint16_t)0x6C)
0141 #define PPSMC_OCPInactive                   ((uint16_t)0x6D)
0142 #define PPSMC_CACLongTermAvgEnable          ((uint16_t)0x6E)
0143 #define PPSMC_CACLongTermAvgDisable         ((uint16_t)0x6F)
0144 #define PPSMC_MSG_InferredStateSweep_Start  ((uint16_t)0x70)
0145 #define PPSMC_MSG_InferredStateSweep_Stop   ((uint16_t)0x71)
0146 #define PPSMC_MSG_SwitchToLowestInfState    ((uint16_t)0x72)
0147 #define PPSMC_MSG_SwitchToNonInfState       ((uint16_t)0x73)
0148 #define PPSMC_MSG_AllStateSweep_Start       ((uint16_t)0x74)
0149 #define PPSMC_MSG_AllStateSweep_Stop        ((uint16_t)0x75)
0150 #define PPSMC_MSG_SwitchNextLowerInfState   ((uint16_t)0x76)
0151 #define PPSMC_MSG_SwitchNextHigherInfState  ((uint16_t)0x77)
0152 #define PPSMC_MSG_MclkRetrainingTest        ((uint16_t)0x78)
0153 #define PPSMC_MSG_ForceTDPClamping          ((uint16_t)0x79)
0154 #define PPSMC_MSG_CollectCAC_PowerCorreln   ((uint16_t)0x7A)
0155 #define PPSMC_MSG_CollectCAC_WeightCalib    ((uint16_t)0x7B)
0156 #define PPSMC_MSG_CollectCAC_SQonly         ((uint16_t)0x7C)
0157 #define PPSMC_MSG_CollectCAC_TemperaturePwr ((uint16_t)0x7D)
0158
0159 #define PPSMC_MSG_ExtremitiesTest_Start     ((uint16_t)0x7E)
0160 #define PPSMC_MSG_ExtremitiesTest_Stop      ((uint16_t)0x7F)
0161 #define PPSMC_FlushDataCache                ((uint16_t)0x80)
0162 #define PPSMC_FlushInstrCache               ((uint16_t)0x81)
0163
0164 #define PPSMC_MSG_SetEnabledLevels          ((uint16_t)0x82)
0165 #define PPSMC_MSG_SetForcedLevels           ((uint16_t)0x83)
0166
0167 #define PPSMC_MSG_ResetToDefaults           ((uint16_t)0x84)
0168
0169 #define PPSMC_MSG_SetForcedLevelsAndJump      ((uint16_t)0x85)
0170 #define PPSMC_MSG_SetCACHistoryMode           ((uint16_t)0x86)
0171 #define PPSMC_MSG_EnableDTE                   ((uint16_t)0x87)
0172 #define PPSMC_MSG_DisableDTE                  ((uint16_t)0x88)
0173
0174 #define PPSMC_MSG_SmcSpaceSetAddress          ((uint16_t)0x89)
0175
0176 #define PPSMC_MSG_BREAK                       ((uint16_t)0xF8)
0177
0178 /* Trinity Specific Messages*/
0179 #define PPSMC_MSG_Test                        ((uint16_t) 0x100)
0180 #define PPSMC_MSG_DPM_Voltage_Pwrmgt          ((uint16_t) 0x101)
0181 #define PPSMC_MSG_DPM_Config                  ((uint16_t) 0x102)
0182 #define PPSMC_MSG_PM_Controller_Start         ((uint16_t) 0x103)
0183 #define PPSMC_MSG_DPM_ForceState              ((uint16_t) 0x104)
0184 #define PPSMC_MSG_PG_PowerDownSIMD            ((uint16_t) 0x105)
0185 #define PPSMC_MSG_PG_PowerUpSIMD              ((uint16_t) 0x106)
0186 #define PPSMC_MSG_PM_Controller_Stop          ((uint16_t) 0x107)
0187 #define PPSMC_MSG_PG_SIMD_Config              ((uint16_t) 0x108)
0188 #define PPSMC_MSG_Voltage_Cntl_Enable         ((uint16_t) 0x109)
0189 #define PPSMC_MSG_Thermal_Cntl_Enable         ((uint16_t) 0x10a)
0190 #define PPSMC_MSG_Reset_Service               ((uint16_t) 0x10b)
0191 #define PPSMC_MSG_VCEPowerOFF                 ((uint16_t) 0x10e)
0192 #define PPSMC_MSG_VCEPowerON                  ((uint16_t) 0x10f)
0193 #define PPSMC_MSG_DPM_Disable_VCE_HS          ((uint16_t) 0x110)
0194 #define PPSMC_MSG_DPM_Enable_VCE_HS           ((uint16_t) 0x111)
0195 #define PPSMC_MSG_DPM_N_LevelsDisabled        ((uint16_t) 0x112)
0196 #define PPSMC_MSG_DCEPowerOFF                 ((uint16_t) 0x113)
0197 #define PPSMC_MSG_DCEPowerON                  ((uint16_t) 0x114)
0198 #define PPSMC_MSG_PCIE_DDIPowerDown           ((uint16_t) 0x117)
0199 #define PPSMC_MSG_PCIE_DDIPowerUp             ((uint16_t) 0x118)
0200 #define PPSMC_MSG_PCIE_CascadePLLPowerDown    ((uint16_t) 0x119)
0201 #define PPSMC_MSG_PCIE_CascadePLLPowerUp      ((uint16_t) 0x11a)
0202 #define PPSMC_MSG_SYSPLLPowerOff              ((uint16_t) 0x11b)
0203 #define PPSMC_MSG_SYSPLLPowerOn               ((uint16_t) 0x11c)
0204 #define PPSMC_MSG_DCE_RemoveVoltageAdjustment ((uint16_t) 0x11d)
0205 #define PPSMC_MSG_DCE_AllowVoltageAdjustment  ((uint16_t) 0x11e)
0206 #define PPSMC_MSG_DISPLAYPHYStatusNotify      ((uint16_t) 0x11f)
0207 #define PPSMC_MSG_EnableBAPM                  ((uint16_t) 0x120)
0208 #define PPSMC_MSG_DisableBAPM                 ((uint16_t) 0x121)
0209 #define PPSMC_MSG_Spmi_Enable                 ((uint16_t) 0x122)
0210 #define PPSMC_MSG_Spmi_Timer                  ((uint16_t) 0x123)
0211 #define PPSMC_MSG_LCLK_DPM_Config             ((uint16_t) 0x124)
0212 #define PPSMC_MSG_VddNB_Request               ((uint16_t) 0x125)
0213 #define PPSMC_MSG_PCIE_DDIPhyPowerDown        ((uint32_t) 0x126)
0214 #define PPSMC_MSG_PCIE_DDIPhyPowerUp          ((uint32_t) 0x127)
0215 #define PPSMC_MSG_MCLKDPM_Config              ((uint16_t) 0x128)
0216
0217 #define PPSMC_MSG_UVDDPM_Config               ((uint16_t) 0x129)
0218 #define PPSMC_MSG_VCEDPM_Config               ((uint16_t) 0x12A)
0219 #define PPSMC_MSG_ACPDPM_Config               ((uint16_t) 0x12B)
0220 #define PPSMC_MSG_SAMUDPM_Config              ((uint16_t) 0x12C)
0221 #define PPSMC_MSG_UVDDPM_SetEnabledMask       ((uint16_t) 0x12D)
0222 #define PPSMC_MSG_VCEDPM_SetEnabledMask       ((uint16_t) 0x12E)
0223 #define PPSMC_MSG_ACPDPM_SetEnabledMask       ((uint16_t) 0x12F)
0224 #define PPSMC_MSG_SAMUDPM_SetEnabledMask      ((uint16_t) 0x130)
0225 #define PPSMC_MSG_MCLKDPM_ForceState          ((uint16_t) 0x131)
0226 #define PPSMC_MSG_MCLKDPM_NoForcedLevel       ((uint16_t) 0x132)
0227 #define PPSMC_MSG_Thermal_Cntl_Disable        ((uint16_t) 0x133)
0228 #define PPSMC_MSG_SetTDPLimit                 ((uint16_t) 0x134)
0229 #define PPSMC_MSG_Voltage_Cntl_Disable        ((uint16_t) 0x135)
0230 #define PPSMC_MSG_PCIeDPM_Enable              ((uint16_t) 0x136)
0231 #define PPSMC_MSG_ACPPowerOFF                 ((uint16_t) 0x137)
0232 #define PPSMC_MSG_ACPPowerON                  ((uint16_t) 0x138)
0233 #define PPSMC_MSG_SAMPowerOFF                 ((uint16_t) 0x139)
0234 #define PPSMC_MSG_SAMPowerON                  ((uint16_t) 0x13a)
0235 #define PPSMC_MSG_SDMAPowerOFF                ((uint16_t) 0x13b)
0236 #define PPSMC_MSG_SDMAPowerON                 ((uint16_t) 0x13c)
0237 #define PPSMC_MSG_PCIeDPM_Disable             ((uint16_t) 0x13d)
0238 #define PPSMC_MSG_IOMMUPowerOFF               ((uint16_t) 0x13e)
0239 #define PPSMC_MSG_IOMMUPowerON                ((uint16_t) 0x13f)
0240 #define PPSMC_MSG_NBDPM_Enable                ((uint16_t) 0x140)
0241 #define PPSMC_MSG_NBDPM_Disable               ((uint16_t) 0x141)
0242 #define PPSMC_MSG_NBDPM_ForceNominal          ((uint16_t) 0x142)
0243 #define PPSMC_MSG_NBDPM_ForcePerformance      ((uint16_t) 0x143)
0244 #define PPSMC_MSG_NBDPM_UnForce               ((uint16_t) 0x144)
0245 #define PPSMC_MSG_SCLKDPM_SetEnabledMask      ((uint16_t) 0x145)
0246 #define PPSMC_MSG_MCLKDPM_SetEnabledMask      ((uint16_t) 0x146)
0247 #define PPSMC_MSG_PCIeDPM_ForceLevel          ((uint16_t) 0x147)
0248 #define PPSMC_MSG_PCIeDPM_UnForceLevel        ((uint16_t) 0x148)
0249 #define PPSMC_MSG_EnableACDCGPIOInterrupt     ((uint16_t) 0x149)
0250 #define PPSMC_MSG_EnableVRHotGPIOInterrupt    ((uint16_t) 0x14a)
0251 #define PPSMC_MSG_SwitchToAC                  ((uint16_t) 0x14b)
0252
0253 #define PPSMC_MSG_XDMAPowerOFF                ((uint16_t) 0x14c)
0254 #define PPSMC_MSG_XDMAPowerON                 ((uint16_t) 0x14d)
0255
0256 #define PPSMC_MSG_DPM_Enable                  ((uint16_t) 0x14e)
0257 #define PPSMC_MSG_DPM_Disable                 ((uint16_t) 0x14f)
0258 #define PPSMC_MSG_MCLKDPM_Enable              ((uint16_t) 0x150)
0259 #define PPSMC_MSG_MCLKDPM_Disable             ((uint16_t) 0x151)
0260 #define PPSMC_MSG_LCLKDPM_Enable              ((uint16_t) 0x152)
0261 #define PPSMC_MSG_LCLKDPM_Disable             ((uint16_t) 0x153)
0262 #define PPSMC_MSG_UVDDPM_Enable               ((uint16_t) 0x154)
0263 #define PPSMC_MSG_UVDDPM_Disable              ((uint16_t) 0x155)
0264 #define PPSMC_MSG_SAMUDPM_Enable              ((uint16_t) 0x156)
0265 #define PPSMC_MSG_SAMUDPM_Disable             ((uint16_t) 0x157)
0266 #define PPSMC_MSG_ACPDPM_Enable               ((uint16_t) 0x158)
0267 #define PPSMC_MSG_ACPDPM_Disable              ((uint16_t) 0x159)
0268 #define PPSMC_MSG_VCEDPM_Enable               ((uint16_t) 0x15a)
0269 #define PPSMC_MSG_VCEDPM_Disable              ((uint16_t) 0x15b)
0270 #define PPSMC_MSG_LCLKDPM_SetEnabledMask      ((uint16_t) 0x15c)
0271 #define PPSMC_MSG_DPM_FPS_Mode                ((uint16_t) 0x15d)
0272 #define PPSMC_MSG_DPM_Activity_Mode           ((uint16_t) 0x15e)
0273 #define PPSMC_MSG_VddC_Request                ((uint16_t) 0x15f)
0274 #define PPSMC_MSG_MCLKDPM_GetEnabledMask      ((uint16_t) 0x160)
0275 #define PPSMC_MSG_LCLKDPM_GetEnabledMask      ((uint16_t) 0x161)
0276 #define PPSMC_MSG_SCLKDPM_GetEnabledMask      ((uint16_t) 0x162)
0277 #define PPSMC_MSG_UVDDPM_GetEnabledMask       ((uint16_t) 0x163)
0278 #define PPSMC_MSG_SAMUDPM_GetEnabledMask      ((uint16_t) 0x164)
0279 #define PPSMC_MSG_ACPDPM_GetEnabledMask       ((uint16_t) 0x165)
0280 #define PPSMC_MSG_VCEDPM_GetEnabledMask       ((uint16_t) 0x166)
0281 #define PPSMC_MSG_PCIeDPM_SetEnabledMask      ((uint16_t) 0x167)
0282 #define PPSMC_MSG_PCIeDPM_GetEnabledMask      ((uint16_t) 0x168)
0283 #define PPSMC_MSG_TDCLimitEnable              ((uint16_t) 0x169)
0284 #define PPSMC_MSG_TDCLimitDisable             ((uint16_t) 0x16a)
0285 #define PPSMC_MSG_DPM_AutoRotate_Mode         ((uint16_t) 0x16b)
0286 #define PPSMC_MSG_DISPCLK_FROM_FCH            ((uint16_t) 0x16c)
0287 #define PPSMC_MSG_DISPCLK_FROM_DFS            ((uint16_t) 0x16d)
0288 #define PPSMC_MSG_DPREFCLK_FROM_FCH           ((uint16_t) 0x16e)
0289 #define PPSMC_MSG_DPREFCLK_FROM_DFS           ((uint16_t) 0x16f)
0290 #define PPSMC_MSG_PmStatusLogStart            ((uint16_t) 0x170)
0291 #define PPSMC_MSG_PmStatusLogSample           ((uint16_t) 0x171)
0292 #define PPSMC_MSG_SCLK_AutoDPM_ON             ((uint16_t) 0x172)
0293 #define PPSMC_MSG_MCLK_AutoDPM_ON             ((uint16_t) 0x173)
0294 #define PPSMC_MSG_LCLK_AutoDPM_ON             ((uint16_t) 0x174)
0295 #define PPSMC_MSG_UVD_AutoDPM_ON              ((uint16_t) 0x175)
0296 #define PPSMC_MSG_SAMU_AutoDPM_ON             ((uint16_t) 0x176)
0297 #define PPSMC_MSG_ACP_AutoDPM_ON              ((uint16_t) 0x177)
0298 #define PPSMC_MSG_VCE_AutoDPM_ON              ((uint16_t) 0x178)
0299 #define PPSMC_MSG_PCIe_AutoDPM_ON             ((uint16_t) 0x179)
0300 #define PPSMC_MSG_MASTER_AutoDPM_ON           ((uint16_t) 0x17a)
0301 #define PPSMC_MSG_MASTER_AutoDPM_OFF          ((uint16_t) 0x17b)
0302 #define PPSMC_MSG_DYNAMICDISPPHYPOWER         ((uint16_t) 0x17c)
0303 #define PPSMC_MSG_CAC_COLLECTION_ON           ((uint16_t) 0x17d)
0304 #define PPSMC_MSG_CAC_COLLECTION_OFF          ((uint16_t) 0x17e)
0305 #define PPSMC_MSG_CAC_CORRELATION_ON          ((uint16_t) 0x17f)
0306 #define PPSMC_MSG_CAC_CORRELATION_OFF         ((uint16_t) 0x180)
0307 #define PPSMC_MSG_PM_STATUS_TO_DRAM_ON        ((uint16_t) 0x181)
0308 #define PPSMC_MSG_PM_STATUS_TO_DRAM_OFF       ((uint16_t) 0x182)
0309 #define PPSMC_MSG_ALLOW_LOWSCLK_INTERRUPT     ((uint16_t) 0x184)
0310 #define PPSMC_MSG_PkgPwrLimitEnable           ((uint16_t) 0x185)
0311 #define PPSMC_MSG_PkgPwrLimitDisable          ((uint16_t) 0x186)
0312 #define PPSMC_MSG_PkgPwrSetLimit              ((uint16_t) 0x187)
0313 #define PPSMC_MSG_OverDriveSetTargetTdp       ((uint16_t) 0x188)
0314 #define PPSMC_MSG_SCLKDPM_FreezeLevel         ((uint16_t) 0x189)
0315 #define PPSMC_MSG_SCLKDPM_UnfreezeLevel       ((uint16_t) 0x18A)
0316 #define PPSMC_MSG_MCLKDPM_FreezeLevel         ((uint16_t) 0x18B)
0317 #define PPSMC_MSG_MCLKDPM_UnfreezeLevel       ((uint16_t) 0x18C)
0318 #define PPSMC_MSG_START_DRAM_LOGGING          ((uint16_t) 0x18D)
0319 #define PPSMC_MSG_STOP_DRAM_LOGGING           ((uint16_t) 0x18E)
0320 #define PPSMC_MSG_MASTER_DeepSleep_ON         ((uint16_t) 0x18F)
0321 #define PPSMC_MSG_MASTER_DeepSleep_OFF        ((uint16_t) 0x190)
0322 #define PPSMC_MSG_Remove_DC_Clamp             ((uint16_t) 0x191)
0323 #define PPSMC_MSG_DisableACDCGPIOInterrupt    ((uint16_t) 0x192)
0324 #define PPSMC_MSG_OverrideVoltageControl_SetVddc       ((uint16_t) 0x193)
0325 #define PPSMC_MSG_OverrideVoltageControl_SetVddci      ((uint16_t) 0x194)
0326 #define PPSMC_MSG_SetVidOffset_1              ((uint16_t) 0x195)
0327 #define PPSMC_MSG_SetVidOffset_2              ((uint16_t) 0x207)
0328 #define PPSMC_MSG_GetVidOffset_1              ((uint16_t) 0x196)
0329 #define PPSMC_MSG_GetVidOffset_2              ((uint16_t) 0x208)
0330 #define PPSMC_MSG_THERMAL_OVERDRIVE_Enable    ((uint16_t) 0x197)
0331 #define PPSMC_MSG_THERMAL_OVERDRIVE_Disable   ((uint16_t) 0x198)
0332 #define PPSMC_MSG_SetTjMax                    ((uint16_t) 0x199)
0333 #define PPSMC_MSG_SetFanPwmMax                ((uint16_t) 0x19A)
0334 #define PPSMC_MSG_WaitForMclkSwitchFinish     ((uint16_t) 0x19B)
0335 #define PPSMC_MSG_ENABLE_THERMAL_DPM          ((uint16_t) 0x19C)
0336 #define PPSMC_MSG_DISABLE_THERMAL_DPM         ((uint16_t) 0x19D)
0337
0338 #define PPSMC_MSG_API_GetSclkFrequency        ((uint16_t) 0x200)
0339 #define PPSMC_MSG_API_GetMclkFrequency        ((uint16_t) 0x201)
0340 #define PPSMC_MSG_API_GetSclkBusy             ((uint16_t) 0x202)
0341 #define PPSMC_MSG_API_GetMclkBusy             ((uint16_t) 0x203)
0342 #define PPSMC_MSG_API_GetAsicPower            ((uint16_t) 0x204)
0343 #define PPSMC_MSG_SetFanRpmMax                ((uint16_t) 0x205)
0344 #define PPSMC_MSG_SetFanSclkTarget            ((uint16_t) 0x206)
0345 #define PPSMC_MSG_SetFanMinPwm                ((uint16_t) 0x209)
0346 #define PPSMC_MSG_SetFanTemperatureTarget     ((uint16_t) 0x20A)
0347
0348 #define PPSMC_MSG_BACO_StartMonitor           ((uint16_t) 0x240)
0349 #define PPSMC_MSG_BACO_Cancel                 ((uint16_t) 0x241)
0350 #define PPSMC_MSG_EnableVddGfx                ((uint16_t) 0x242)
0351 #define PPSMC_MSG_DisableVddGfx               ((uint16_t) 0x243)
0352 #define PPSMC_MSG_UcodeAddressLow             ((uint16_t) 0x244)
0353 #define PPSMC_MSG_UcodeAddressHigh            ((uint16_t) 0x245)
0354 #define PPSMC_MSG_UcodeLoadStatus             ((uint16_t) 0x246)
0355
0356 #define PPSMC_MSG_DRV_DRAM_ADDR_HI            ((uint16_t) 0x250)
0357 #define PPSMC_MSG_DRV_DRAM_ADDR_LO            ((uint16_t) 0x251)
0358 #define PPSMC_MSG_SMU_DRAM_ADDR_HI            ((uint16_t) 0x252)
0359 #define PPSMC_MSG_SMU_DRAM_ADDR_LO            ((uint16_t) 0x253)
0360 #define PPSMC_MSG_LoadUcodes                  ((uint16_t) 0x254)
0361 #define PPSMC_MSG_PowerStateNotify            ((uint16_t) 0x255)
0362 #define PPSMC_MSG_COND_EXEC_DRAM_ADDR_HI      ((uint16_t) 0x256)
0363 #define PPSMC_MSG_COND_EXEC_DRAM_ADDR_LO      ((uint16_t) 0x257)
0364 #define PPSMC_MSG_VBIOS_DRAM_ADDR_HI          ((uint16_t) 0x258)
0365 #define PPSMC_MSG_VBIOS_DRAM_ADDR_LO          ((uint16_t) 0x259)
0366 #define PPSMC_MSG_LoadVBios                   ((uint16_t) 0x25A)
0367 #define PPSMC_MSG_GetUcodeVersion             ((uint16_t) 0x25B)
0368 #define DMCUSMC_MSG_PSREntry                  ((uint16_t) 0x25C)
0369 #define DMCUSMC_MSG_PSRExit                   ((uint16_t) 0x25D)
0370 #define PPSMC_MSG_EnableClockGatingFeature    ((uint16_t) 0x260)
0371 #define PPSMC_MSG_DisableClockGatingFeature   ((uint16_t) 0x261)
0372 #define PPSMC_MSG_IsDeviceRunning             ((uint16_t) 0x262)
0373 #define PPSMC_MSG_LoadMetaData                ((uint16_t) 0x263)
0374 #define PPSMC_MSG_TMON_AutoCaliberate_Enable  ((uint16_t) 0x264)
0375 #define PPSMC_MSG_TMON_AutoCaliberate_Disable ((uint16_t) 0x265)
0376 #define PPSMC_MSG_GetTelemetry1Slope          ((uint16_t) 0x266)
0377 #define PPSMC_MSG_GetTelemetry1Offset         ((uint16_t) 0x267)
0378 #define PPSMC_MSG_GetTelemetry2Slope          ((uint16_t) 0x268)
0379 #define PPSMC_MSG_GetTelemetry2Offset         ((uint16_t) 0x269)
0380 #define PPSMC_MSG_EnableAvfs                  ((uint16_t) 0x26A)
0381 #define PPSMC_MSG_DisableAvfs                 ((uint16_t) 0x26B)
0382 #define PPSMC_MSG_PerformBtc                  ((uint16_t) 0x26C)
0383 #define PPSMC_MSG_GetHbmCode                  ((uint16_t) 0x26D)
0384 #define PPSMC_MSG_GetVrVddcTemperature        ((uint16_t) 0x26E)
0385 #define PPSMC_MSG_GetVrMvddTemperature        ((uint16_t) 0x26F)
0386 #define PPSMC_MSG_GetLiquidTemperature        ((uint16_t) 0x270)
0387 #define PPSMC_MSG_GetPlxTemperature           ((uint16_t) 0x271)
0388 #define PPSMC_MSG_RequestI2CControl           ((uint16_t) 0x272)
0389 #define PPSMC_MSG_ReleaseI2CControl           ((uint16_t) 0x273)
0390 #define PPSMC_MSG_LedConfig                   ((uint16_t) 0x274)
0391 #define PPSMC_MSG_SetHbmFanCode               ((uint16_t) 0x275)
0392 #define PPSMC_MSG_SetHbmThrottleCode          ((uint16_t) 0x276)
0393
0394 #define PPSMC_MSG_GetEnabledPsm               ((uint16_t) 0x400)
0395 #define PPSMC_MSG_AgmStartPsm                 ((uint16_t) 0x401)
0396 #define PPSMC_MSG_AgmReadPsm                  ((uint16_t) 0x402)
0397 #define PPSMC_MSG_AgmResetPsm                 ((uint16_t) 0x403)
0398 #define PPSMC_MSG_ReadVftCell                 ((uint16_t) 0x404)
0399
0400 /* AVFS Only - Remove Later */
0401 #define PPSMC_MSG_VftTableIsValid             ((uint16_t) 0x666)
0402
0403 /* If the SMC firmware has an event status soft register this is what the individual bits mean.*/
0404 #define PPSMC_EVENT_STATUS_THERMAL          0x00000001
0405 #define PPSMC_EVENT_STATUS_REGULATORHOT     0x00000002
0406 #define PPSMC_EVENT_STATUS_DC               0x00000004
0407
0408 typedef uint16_t PPSMC_Msg;
0409
0410 #pragma pack(pop)
0411
0412 #endif