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OSCL-LXR
 
 

     

0001 /*
0002  * Copyright 2018 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 #include <linux/module.h>
0024 #include <linux/slab.h>
0025 #include <linux/fb.h>
0026 
0027 #include "smu11_driver_if.h"
0028 #include "vega20_processpptables.h"
0029 #include "ppatomfwctrl.h"
0030 #include "atomfirmware.h"
0031 #include "pp_debug.h"
0032 #include "cgs_common.h"
0033 #include "vega20_pptable.h"
0034 
0035 #define VEGA20_FAN_TARGET_TEMPERATURE_OVERRIDE 105
0036 
0037 static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable,
0038         enum phm_platform_caps cap)
0039 {
0040     if (enable)
0041         phm_cap_set(hwmgr->platform_descriptor.platformCaps, cap);
0042     else
0043         phm_cap_unset(hwmgr->platform_descriptor.platformCaps, cap);
0044 }
0045 
0046 static const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
0047 {
0048     int index = GetIndexIntoMasterDataTable(powerplayinfo);
0049 
0050     u16 size;
0051     u8 frev, crev;
0052     const void *table_address = hwmgr->soft_pp_table;
0053 
0054     if (!table_address) {
0055         table_address = (ATOM_Vega20_POWERPLAYTABLE *)
0056                 smu_atom_get_data_table(hwmgr->adev, index,
0057                         &size, &frev, &crev);
0058 
0059         hwmgr->soft_pp_table = table_address;
0060         hwmgr->soft_pp_table_size = size;
0061     }
0062 
0063     return table_address;
0064 }
0065 
0066 #if 0
0067 static void dump_pptable(PPTable_t *pptable)
0068 {
0069     int i;
0070 
0071     pr_info("Version = 0x%08x\n", pptable->Version);
0072 
0073     pr_info("FeaturesToRun[0] = 0x%08x\n", pptable->FeaturesToRun[0]);
0074     pr_info("FeaturesToRun[1] = 0x%08x\n", pptable->FeaturesToRun[1]);
0075 
0076     pr_info("SocketPowerLimitAc0 = %d\n", pptable->SocketPowerLimitAc0);
0077     pr_info("SocketPowerLimitAc0Tau = %d\n", pptable->SocketPowerLimitAc0Tau);
0078     pr_info("SocketPowerLimitAc1 = %d\n", pptable->SocketPowerLimitAc1);
0079     pr_info("SocketPowerLimitAc1Tau = %d\n", pptable->SocketPowerLimitAc1Tau);
0080     pr_info("SocketPowerLimitAc2 = %d\n", pptable->SocketPowerLimitAc2);
0081     pr_info("SocketPowerLimitAc2Tau = %d\n", pptable->SocketPowerLimitAc2Tau);
0082     pr_info("SocketPowerLimitAc3 = %d\n", pptable->SocketPowerLimitAc3);
0083     pr_info("SocketPowerLimitAc3Tau = %d\n", pptable->SocketPowerLimitAc3Tau);
0084     pr_info("SocketPowerLimitDc = %d\n", pptable->SocketPowerLimitDc);
0085     pr_info("SocketPowerLimitDcTau = %d\n", pptable->SocketPowerLimitDcTau);
0086     pr_info("TdcLimitSoc = %d\n", pptable->TdcLimitSoc);
0087     pr_info("TdcLimitSocTau = %d\n", pptable->TdcLimitSocTau);
0088     pr_info("TdcLimitGfx = %d\n", pptable->TdcLimitGfx);
0089     pr_info("TdcLimitGfxTau = %d\n", pptable->TdcLimitGfxTau);
0090 
0091     pr_info("TedgeLimit = %d\n", pptable->TedgeLimit);
0092     pr_info("ThotspotLimit = %d\n", pptable->ThotspotLimit);
0093     pr_info("ThbmLimit = %d\n", pptable->ThbmLimit);
0094     pr_info("Tvr_gfxLimit = %d\n", pptable->Tvr_gfxLimit);
0095     pr_info("Tvr_memLimit = %d\n", pptable->Tvr_memLimit);
0096     pr_info("Tliquid1Limit = %d\n", pptable->Tliquid1Limit);
0097     pr_info("Tliquid2Limit = %d\n", pptable->Tliquid2Limit);
0098     pr_info("TplxLimit = %d\n", pptable->TplxLimit);
0099     pr_info("FitLimit = %d\n", pptable->FitLimit);
0100 
0101     pr_info("PpmPowerLimit = %d\n", pptable->PpmPowerLimit);
0102     pr_info("PpmTemperatureThreshold = %d\n", pptable->PpmTemperatureThreshold);
0103 
0104     pr_info("MemoryOnPackage = 0x%02x\n", pptable->MemoryOnPackage);
0105     pr_info("padding8_limits = 0x%02x\n", pptable->padding8_limits);
0106     pr_info("Tvr_SocLimit = %d\n", pptable->Tvr_SocLimit);
0107 
0108     pr_info("UlvVoltageOffsetSoc = %d\n", pptable->UlvVoltageOffsetSoc);
0109     pr_info("UlvVoltageOffsetGfx = %d\n", pptable->UlvVoltageOffsetGfx);
0110 
0111     pr_info("UlvSmnclkDid = %d\n", pptable->UlvSmnclkDid);
0112     pr_info("UlvMp1clkDid = %d\n", pptable->UlvMp1clkDid);
0113     pr_info("UlvGfxclkBypass = %d\n", pptable->UlvGfxclkBypass);
0114     pr_info("Padding234 = 0x%02x\n", pptable->Padding234);
0115 
0116     pr_info("MinVoltageGfx = %d\n", pptable->MinVoltageGfx);
0117     pr_info("MinVoltageSoc = %d\n", pptable->MinVoltageSoc);
0118     pr_info("MaxVoltageGfx = %d\n", pptable->MaxVoltageGfx);
0119     pr_info("MaxVoltageSoc = %d\n", pptable->MaxVoltageSoc);
0120 
0121     pr_info("LoadLineResistanceGfx = %d\n", pptable->LoadLineResistanceGfx);
0122     pr_info("LoadLineResistanceSoc = %d\n", pptable->LoadLineResistanceSoc);
0123 
0124     pr_info("[PPCLK_GFXCLK]\n"
0125             "  .VoltageMode          = 0x%02x\n"
0126             "  .SnapToDiscrete       = 0x%02x\n"
0127             "  .NumDiscreteLevels    = 0x%02x\n"
0128             "  .padding              = 0x%02x\n"
0129             "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
0130             "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
0131             pptable->DpmDescriptor[PPCLK_GFXCLK].VoltageMode,
0132             pptable->DpmDescriptor[PPCLK_GFXCLK].SnapToDiscrete,
0133             pptable->DpmDescriptor[PPCLK_GFXCLK].NumDiscreteLevels,
0134             pptable->DpmDescriptor[PPCLK_GFXCLK].padding,
0135             pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.m,
0136             pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.b,
0137             pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.a,
0138             pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.b,
0139             pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.c);
0140 
0141     pr_info("[PPCLK_VCLK]\n"
0142             "  .VoltageMode          = 0x%02x\n"
0143             "  .SnapToDiscrete       = 0x%02x\n"
0144             "  .NumDiscreteLevels    = 0x%02x\n"
0145             "  .padding              = 0x%02x\n"
0146             "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
0147             "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
0148             pptable->DpmDescriptor[PPCLK_VCLK].VoltageMode,
0149             pptable->DpmDescriptor[PPCLK_VCLK].SnapToDiscrete,
0150             pptable->DpmDescriptor[PPCLK_VCLK].NumDiscreteLevels,
0151             pptable->DpmDescriptor[PPCLK_VCLK].padding,
0152             pptable->DpmDescriptor[PPCLK_VCLK].ConversionToAvfsClk.m,
0153             pptable->DpmDescriptor[PPCLK_VCLK].ConversionToAvfsClk.b,
0154             pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.a,
0155             pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.b,
0156             pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.c);
0157 
0158     pr_info("[PPCLK_DCLK]\n"
0159             "  .VoltageMode          = 0x%02x\n"
0160             "  .SnapToDiscrete       = 0x%02x\n"
0161             "  .NumDiscreteLevels    = 0x%02x\n"
0162             "  .padding              = 0x%02x\n"
0163             "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
0164             "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
0165             pptable->DpmDescriptor[PPCLK_DCLK].VoltageMode,
0166             pptable->DpmDescriptor[PPCLK_DCLK].SnapToDiscrete,
0167             pptable->DpmDescriptor[PPCLK_DCLK].NumDiscreteLevels,
0168             pptable->DpmDescriptor[PPCLK_DCLK].padding,
0169             pptable->DpmDescriptor[PPCLK_DCLK].ConversionToAvfsClk.m,
0170             pptable->DpmDescriptor[PPCLK_DCLK].ConversionToAvfsClk.b,
0171             pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.a,
0172             pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.b,
0173             pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.c);
0174 
0175     pr_info("[PPCLK_ECLK]\n"
0176             "  .VoltageMode          = 0x%02x\n"
0177             "  .SnapToDiscrete       = 0x%02x\n"
0178             "  .NumDiscreteLevels    = 0x%02x\n"
0179             "  .padding              = 0x%02x\n"
0180             "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
0181             "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
0182             pptable->DpmDescriptor[PPCLK_ECLK].VoltageMode,
0183             pptable->DpmDescriptor[PPCLK_ECLK].SnapToDiscrete,
0184             pptable->DpmDescriptor[PPCLK_ECLK].NumDiscreteLevels,
0185             pptable->DpmDescriptor[PPCLK_ECLK].padding,
0186             pptable->DpmDescriptor[PPCLK_ECLK].ConversionToAvfsClk.m,
0187             pptable->DpmDescriptor[PPCLK_ECLK].ConversionToAvfsClk.b,
0188             pptable->DpmDescriptor[PPCLK_ECLK].SsCurve.a,
0189             pptable->DpmDescriptor[PPCLK_ECLK].SsCurve.b,
0190             pptable->DpmDescriptor[PPCLK_ECLK].SsCurve.c);
0191 
0192     pr_info("[PPCLK_SOCCLK]\n"
0193             "  .VoltageMode          = 0x%02x\n"
0194             "  .SnapToDiscrete       = 0x%02x\n"
0195             "  .NumDiscreteLevels    = 0x%02x\n"
0196             "  .padding              = 0x%02x\n"
0197             "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
0198             "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
0199             pptable->DpmDescriptor[PPCLK_SOCCLK].VoltageMode,
0200             pptable->DpmDescriptor[PPCLK_SOCCLK].SnapToDiscrete,
0201             pptable->DpmDescriptor[PPCLK_SOCCLK].NumDiscreteLevels,
0202             pptable->DpmDescriptor[PPCLK_SOCCLK].padding,
0203             pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.m,
0204             pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.b,
0205             pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.a,
0206             pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.b,
0207             pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.c);
0208 
0209     pr_info("[PPCLK_UCLK]\n"
0210             "  .VoltageMode          = 0x%02x\n"
0211             "  .SnapToDiscrete       = 0x%02x\n"
0212             "  .NumDiscreteLevels    = 0x%02x\n"
0213             "  .padding              = 0x%02x\n"
0214             "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
0215             "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
0216             pptable->DpmDescriptor[PPCLK_UCLK].VoltageMode,
0217             pptable->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete,
0218             pptable->DpmDescriptor[PPCLK_UCLK].NumDiscreteLevels,
0219             pptable->DpmDescriptor[PPCLK_UCLK].padding,
0220             pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.m,
0221             pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.b,
0222             pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.a,
0223             pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.b,
0224             pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.c);
0225 
0226     pr_info("[PPCLK_DCEFCLK]\n"
0227             "  .VoltageMode          = 0x%02x\n"
0228             "  .SnapToDiscrete       = 0x%02x\n"
0229             "  .NumDiscreteLevels    = 0x%02x\n"
0230             "  .padding              = 0x%02x\n"
0231             "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
0232             "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
0233             pptable->DpmDescriptor[PPCLK_DCEFCLK].VoltageMode,
0234             pptable->DpmDescriptor[PPCLK_DCEFCLK].SnapToDiscrete,
0235             pptable->DpmDescriptor[PPCLK_DCEFCLK].NumDiscreteLevels,
0236             pptable->DpmDescriptor[PPCLK_DCEFCLK].padding,
0237             pptable->DpmDescriptor[PPCLK_DCEFCLK].ConversionToAvfsClk.m,
0238             pptable->DpmDescriptor[PPCLK_DCEFCLK].ConversionToAvfsClk.b,
0239             pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.a,
0240             pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.b,
0241             pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.c);
0242 
0243     pr_info("[PPCLK_DISPCLK]\n"
0244             "  .VoltageMode          = 0x%02x\n"
0245             "  .SnapToDiscrete       = 0x%02x\n"
0246             "  .NumDiscreteLevels    = 0x%02x\n"
0247             "  .padding              = 0x%02x\n"
0248             "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
0249             "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
0250             pptable->DpmDescriptor[PPCLK_DISPCLK].VoltageMode,
0251             pptable->DpmDescriptor[PPCLK_DISPCLK].SnapToDiscrete,
0252             pptable->DpmDescriptor[PPCLK_DISPCLK].NumDiscreteLevels,
0253             pptable->DpmDescriptor[PPCLK_DISPCLK].padding,
0254             pptable->DpmDescriptor[PPCLK_DISPCLK].ConversionToAvfsClk.m,
0255             pptable->DpmDescriptor[PPCLK_DISPCLK].ConversionToAvfsClk.b,
0256             pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.a,
0257             pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.b,
0258             pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.c);
0259 
0260     pr_info("[PPCLK_PIXCLK]\n"
0261             "  .VoltageMode          = 0x%02x\n"
0262             "  .SnapToDiscrete       = 0x%02x\n"
0263             "  .NumDiscreteLevels    = 0x%02x\n"
0264             "  .padding              = 0x%02x\n"
0265             "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
0266             "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
0267             pptable->DpmDescriptor[PPCLK_PIXCLK].VoltageMode,
0268             pptable->DpmDescriptor[PPCLK_PIXCLK].SnapToDiscrete,
0269             pptable->DpmDescriptor[PPCLK_PIXCLK].NumDiscreteLevels,
0270             pptable->DpmDescriptor[PPCLK_PIXCLK].padding,
0271             pptable->DpmDescriptor[PPCLK_PIXCLK].ConversionToAvfsClk.m,
0272             pptable->DpmDescriptor[PPCLK_PIXCLK].ConversionToAvfsClk.b,
0273             pptable->DpmDescriptor[PPCLK_PIXCLK].SsCurve.a,
0274             pptable->DpmDescriptor[PPCLK_PIXCLK].SsCurve.b,
0275             pptable->DpmDescriptor[PPCLK_PIXCLK].SsCurve.c);
0276 
0277     pr_info("[PPCLK_PHYCLK]\n"
0278             "  .VoltageMode          = 0x%02x\n"
0279             "  .SnapToDiscrete       = 0x%02x\n"
0280             "  .NumDiscreteLevels    = 0x%02x\n"
0281             "  .padding              = 0x%02x\n"
0282             "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
0283             "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
0284             pptable->DpmDescriptor[PPCLK_PHYCLK].VoltageMode,
0285             pptable->DpmDescriptor[PPCLK_PHYCLK].SnapToDiscrete,
0286             pptable->DpmDescriptor[PPCLK_PHYCLK].NumDiscreteLevels,
0287             pptable->DpmDescriptor[PPCLK_PHYCLK].padding,
0288             pptable->DpmDescriptor[PPCLK_PHYCLK].ConversionToAvfsClk.m,
0289             pptable->DpmDescriptor[PPCLK_PHYCLK].ConversionToAvfsClk.b,
0290             pptable->DpmDescriptor[PPCLK_PHYCLK].SsCurve.a,
0291             pptable->DpmDescriptor[PPCLK_PHYCLK].SsCurve.b,
0292             pptable->DpmDescriptor[PPCLK_PHYCLK].SsCurve.c);
0293 
0294     pr_info("[PPCLK_FCLK]\n"
0295             "  .VoltageMode          = 0x%02x\n"
0296             "  .SnapToDiscrete       = 0x%02x\n"
0297             "  .NumDiscreteLevels    = 0x%02x\n"
0298             "  .padding              = 0x%02x\n"
0299             "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
0300             "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
0301             pptable->DpmDescriptor[PPCLK_FCLK].VoltageMode,
0302             pptable->DpmDescriptor[PPCLK_FCLK].SnapToDiscrete,
0303             pptable->DpmDescriptor[PPCLK_FCLK].NumDiscreteLevels,
0304             pptable->DpmDescriptor[PPCLK_FCLK].padding,
0305             pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.m,
0306             pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.b,
0307             pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.a,
0308             pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.b,
0309             pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.c);
0310 
0311 
0312     pr_info("FreqTableGfx\n");
0313     for (i = 0; i < NUM_GFXCLK_DPM_LEVELS; i++)
0314         pr_info("  .[%02d] = %d\n", i, pptable->FreqTableGfx[i]);
0315 
0316     pr_info("FreqTableVclk\n");
0317     for (i = 0; i < NUM_VCLK_DPM_LEVELS; i++)
0318         pr_info("  .[%02d] = %d\n", i, pptable->FreqTableVclk[i]);
0319 
0320     pr_info("FreqTableDclk\n");
0321     for (i = 0; i < NUM_DCLK_DPM_LEVELS; i++)
0322         pr_info("  .[%02d] = %d\n", i, pptable->FreqTableDclk[i]);
0323 
0324     pr_info("FreqTableEclk\n");
0325     for (i = 0; i < NUM_ECLK_DPM_LEVELS; i++)
0326         pr_info("  .[%02d] = %d\n", i, pptable->FreqTableEclk[i]);
0327 
0328     pr_info("FreqTableSocclk\n");
0329     for (i = 0; i < NUM_SOCCLK_DPM_LEVELS; i++)
0330         pr_info("  .[%02d] = %d\n", i, pptable->FreqTableSocclk[i]);
0331 
0332     pr_info("FreqTableUclk\n");
0333     for (i = 0; i < NUM_UCLK_DPM_LEVELS; i++)
0334         pr_info("  .[%02d] = %d\n", i, pptable->FreqTableUclk[i]);
0335 
0336     pr_info("FreqTableFclk\n");
0337     for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++)
0338         pr_info("  .[%02d] = %d\n", i, pptable->FreqTableFclk[i]);
0339 
0340     pr_info("FreqTableDcefclk\n");
0341     for (i = 0; i < NUM_DCEFCLK_DPM_LEVELS; i++)
0342         pr_info("  .[%02d] = %d\n", i, pptable->FreqTableDcefclk[i]);
0343 
0344     pr_info("FreqTableDispclk\n");
0345     for (i = 0; i < NUM_DISPCLK_DPM_LEVELS; i++)
0346         pr_info("  .[%02d] = %d\n", i, pptable->FreqTableDispclk[i]);
0347 
0348     pr_info("FreqTablePixclk\n");
0349     for (i = 0; i < NUM_PIXCLK_DPM_LEVELS; i++)
0350         pr_info("  .[%02d] = %d\n", i, pptable->FreqTablePixclk[i]);
0351 
0352     pr_info("FreqTablePhyclk\n");
0353     for (i = 0; i < NUM_PHYCLK_DPM_LEVELS; i++)
0354         pr_info("  .[%02d] = %d\n", i, pptable->FreqTablePhyclk[i]);
0355 
0356     pr_info("DcModeMaxFreq[PPCLK_GFXCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_GFXCLK]);
0357     pr_info("DcModeMaxFreq[PPCLK_VCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_VCLK]);
0358     pr_info("DcModeMaxFreq[PPCLK_DCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_DCLK]);
0359     pr_info("DcModeMaxFreq[PPCLK_ECLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_ECLK]);
0360     pr_info("DcModeMaxFreq[PPCLK_SOCCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_SOCCLK]);
0361     pr_info("DcModeMaxFreq[PPCLK_UCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_UCLK]);
0362     pr_info("DcModeMaxFreq[PPCLK_DCEFCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_DCEFCLK]);
0363     pr_info("DcModeMaxFreq[PPCLK_DISPCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_DISPCLK]);
0364     pr_info("DcModeMaxFreq[PPCLK_PIXCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_PIXCLK]);
0365     pr_info("DcModeMaxFreq[PPCLK_PHYCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_PHYCLK]);
0366     pr_info("DcModeMaxFreq[PPCLK_FCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_FCLK]);
0367     pr_info("Padding8_Clks = %d\n", pptable->Padding8_Clks);
0368 
0369     pr_info("Mp0clkFreq\n");
0370     for (i = 0; i < NUM_MP0CLK_DPM_LEVELS; i++)
0371         pr_info("  .[%d] = %d\n", i, pptable->Mp0clkFreq[i]);
0372 
0373     pr_info("Mp0DpmVoltage\n");
0374     for (i = 0; i < NUM_MP0CLK_DPM_LEVELS; i++)
0375         pr_info("  .[%d] = %d\n", i, pptable->Mp0DpmVoltage[i]);
0376 
0377     pr_info("GfxclkFidle = 0x%x\n", pptable->GfxclkFidle);
0378     pr_info("GfxclkSlewRate = 0x%x\n", pptable->GfxclkSlewRate);
0379     pr_info("CksEnableFreq = 0x%x\n", pptable->CksEnableFreq);
0380     pr_info("Padding789 = 0x%x\n", pptable->Padding789);
0381     pr_info("CksVoltageOffset[a = 0x%08x b = 0x%08x c = 0x%08x]\n",
0382             pptable->CksVoltageOffset.a,
0383             pptable->CksVoltageOffset.b,
0384             pptable->CksVoltageOffset.c);
0385     pr_info("Padding567[0] = 0x%x\n", pptable->Padding567[0]);
0386     pr_info("Padding567[1] = 0x%x\n", pptable->Padding567[1]);
0387     pr_info("Padding567[2] = 0x%x\n", pptable->Padding567[2]);
0388     pr_info("Padding567[3] = 0x%x\n", pptable->Padding567[3]);
0389     pr_info("GfxclkDsMaxFreq = %d\n", pptable->GfxclkDsMaxFreq);
0390     pr_info("GfxclkSource = 0x%x\n", pptable->GfxclkSource);
0391     pr_info("Padding456 = 0x%x\n", pptable->Padding456);
0392 
0393     pr_info("LowestUclkReservedForUlv = %d\n", pptable->LowestUclkReservedForUlv);
0394     pr_info("Padding8_Uclk[0] = 0x%x\n", pptable->Padding8_Uclk[0]);
0395     pr_info("Padding8_Uclk[1] = 0x%x\n", pptable->Padding8_Uclk[1]);
0396     pr_info("Padding8_Uclk[2] = 0x%x\n", pptable->Padding8_Uclk[2]);
0397 
0398     pr_info("PcieGenSpeed\n");
0399     for (i = 0; i < NUM_LINK_LEVELS; i++)
0400         pr_info("  .[%d] = %d\n", i, pptable->PcieGenSpeed[i]);
0401 
0402     pr_info("PcieLaneCount\n");
0403     for (i = 0; i < NUM_LINK_LEVELS; i++)
0404         pr_info("  .[%d] = %d\n", i, pptable->PcieLaneCount[i]);
0405 
0406     pr_info("LclkFreq\n");
0407     for (i = 0; i < NUM_LINK_LEVELS; i++)
0408         pr_info("  .[%d] = %d\n", i, pptable->LclkFreq[i]);
0409 
0410     pr_info("EnableTdpm = %d\n", pptable->EnableTdpm);
0411     pr_info("TdpmHighHystTemperature = %d\n", pptable->TdpmHighHystTemperature);
0412     pr_info("TdpmLowHystTemperature = %d\n", pptable->TdpmLowHystTemperature);
0413     pr_info("GfxclkFreqHighTempLimit = %d\n", pptable->GfxclkFreqHighTempLimit);
0414 
0415     pr_info("FanStopTemp = %d\n", pptable->FanStopTemp);
0416     pr_info("FanStartTemp = %d\n", pptable->FanStartTemp);
0417 
0418     pr_info("FanGainEdge = %d\n", pptable->FanGainEdge);
0419     pr_info("FanGainHotspot = %d\n", pptable->FanGainHotspot);
0420     pr_info("FanGainLiquid = %d\n", pptable->FanGainLiquid);
0421     pr_info("FanGainVrGfx = %d\n", pptable->FanGainVrGfx);
0422     pr_info("FanGainVrSoc = %d\n", pptable->FanGainVrSoc);
0423     pr_info("FanGainPlx = %d\n", pptable->FanGainPlx);
0424     pr_info("FanGainHbm = %d\n", pptable->FanGainHbm);
0425     pr_info("FanPwmMin = %d\n", pptable->FanPwmMin);
0426     pr_info("FanAcousticLimitRpm = %d\n", pptable->FanAcousticLimitRpm);
0427     pr_info("FanThrottlingRpm = %d\n", pptable->FanThrottlingRpm);
0428     pr_info("FanMaximumRpm = %d\n", pptable->FanMaximumRpm);
0429     pr_info("FanTargetTemperature = %d\n", pptable->FanTargetTemperature);
0430     pr_info("FanTargetGfxclk = %d\n", pptable->FanTargetGfxclk);
0431     pr_info("FanZeroRpmEnable = %d\n", pptable->FanZeroRpmEnable);
0432     pr_info("FanTachEdgePerRev = %d\n", pptable->FanTachEdgePerRev);
0433 
0434     pr_info("FuzzyFan_ErrorSetDelta = %d\n", pptable->FuzzyFan_ErrorSetDelta);
0435     pr_info("FuzzyFan_ErrorRateSetDelta = %d\n", pptable->FuzzyFan_ErrorRateSetDelta);
0436     pr_info("FuzzyFan_PwmSetDelta = %d\n", pptable->FuzzyFan_PwmSetDelta);
0437     pr_info("FuzzyFan_Reserved = %d\n", pptable->FuzzyFan_Reserved);
0438 
0439     pr_info("OverrideAvfsGb[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_GFX]);
0440     pr_info("OverrideAvfsGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_SOC]);
0441     pr_info("Padding8_Avfs[0] = %d\n", pptable->Padding8_Avfs[0]);
0442     pr_info("Padding8_Avfs[1] = %d\n", pptable->Padding8_Avfs[1]);
0443 
0444     pr_info("qAvfsGb[AVFS_VOLTAGE_GFX]{a = 0x%x b = 0x%x c = 0x%x}\n",
0445             pptable->qAvfsGb[AVFS_VOLTAGE_GFX].a,
0446             pptable->qAvfsGb[AVFS_VOLTAGE_GFX].b,
0447             pptable->qAvfsGb[AVFS_VOLTAGE_GFX].c);
0448     pr_info("qAvfsGb[AVFS_VOLTAGE_SOC]{a = 0x%x b = 0x%x c = 0x%x}\n",
0449             pptable->qAvfsGb[AVFS_VOLTAGE_SOC].a,
0450             pptable->qAvfsGb[AVFS_VOLTAGE_SOC].b,
0451             pptable->qAvfsGb[AVFS_VOLTAGE_SOC].c);
0452     pr_info("dBtcGbGfxCksOn{a = 0x%x b = 0x%x c = 0x%x}\n",
0453             pptable->dBtcGbGfxCksOn.a,
0454             pptable->dBtcGbGfxCksOn.b,
0455             pptable->dBtcGbGfxCksOn.c);
0456     pr_info("dBtcGbGfxCksOff{a = 0x%x b = 0x%x c = 0x%x}\n",
0457             pptable->dBtcGbGfxCksOff.a,
0458             pptable->dBtcGbGfxCksOff.b,
0459             pptable->dBtcGbGfxCksOff.c);
0460     pr_info("dBtcGbGfxAfll{a = 0x%x b = 0x%x c = 0x%x}\n",
0461             pptable->dBtcGbGfxAfll.a,
0462             pptable->dBtcGbGfxAfll.b,
0463             pptable->dBtcGbGfxAfll.c);
0464     pr_info("dBtcGbSoc{a = 0x%x b = 0x%x c = 0x%x}\n",
0465             pptable->dBtcGbSoc.a,
0466             pptable->dBtcGbSoc.b,
0467             pptable->dBtcGbSoc.c);
0468     pr_info("qAgingGb[AVFS_VOLTAGE_GFX]{m = 0x%x b = 0x%x}\n",
0469             pptable->qAgingGb[AVFS_VOLTAGE_GFX].m,
0470             pptable->qAgingGb[AVFS_VOLTAGE_GFX].b);
0471     pr_info("qAgingGb[AVFS_VOLTAGE_SOC]{m = 0x%x b = 0x%x}\n",
0472             pptable->qAgingGb[AVFS_VOLTAGE_SOC].m,
0473             pptable->qAgingGb[AVFS_VOLTAGE_SOC].b);
0474 
0475     pr_info("qStaticVoltageOffset[AVFS_VOLTAGE_GFX]{a = 0x%x b = 0x%x c = 0x%x}\n",
0476             pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].a,
0477             pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].b,
0478             pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].c);
0479     pr_info("qStaticVoltageOffset[AVFS_VOLTAGE_SOC]{a = 0x%x b = 0x%x c = 0x%x}\n",
0480             pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].a,
0481             pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].b,
0482             pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].c);
0483 
0484     pr_info("DcTol[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_GFX]);
0485     pr_info("DcTol[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_SOC]);
0486 
0487     pr_info("DcBtcEnabled[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_GFX]);
0488     pr_info("DcBtcEnabled[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_SOC]);
0489     pr_info("Padding8_GfxBtc[0] = 0x%x\n", pptable->Padding8_GfxBtc[0]);
0490     pr_info("Padding8_GfxBtc[1] = 0x%x\n", pptable->Padding8_GfxBtc[1]);
0491 
0492     pr_info("DcBtcMin[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_GFX]);
0493     pr_info("DcBtcMin[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_SOC]);
0494     pr_info("DcBtcMax[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_GFX]);
0495     pr_info("DcBtcMax[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_SOC]);
0496 
0497     pr_info("XgmiLinkSpeed\n");
0498     for (i = 0; i < NUM_XGMI_LEVELS; i++)
0499         pr_info("  .[%d] = %d\n", i, pptable->XgmiLinkSpeed[i]);
0500     pr_info("XgmiLinkWidth\n");
0501     for (i = 0; i < NUM_XGMI_LEVELS; i++)
0502         pr_info("  .[%d] = %d\n", i, pptable->XgmiLinkWidth[i]);
0503     pr_info("XgmiFclkFreq\n");
0504     for (i = 0; i < NUM_XGMI_LEVELS; i++)
0505         pr_info("  .[%d] = %d\n", i, pptable->XgmiFclkFreq[i]);
0506     pr_info("XgmiUclkFreq\n");
0507     for (i = 0; i < NUM_XGMI_LEVELS; i++)
0508         pr_info("  .[%d] = %d\n", i, pptable->XgmiUclkFreq[i]);
0509     pr_info("XgmiSocclkFreq\n");
0510     for (i = 0; i < NUM_XGMI_LEVELS; i++)
0511         pr_info("  .[%d] = %d\n", i, pptable->XgmiSocclkFreq[i]);
0512     pr_info("XgmiSocVoltage\n");
0513     for (i = 0; i < NUM_XGMI_LEVELS; i++)
0514         pr_info("  .[%d] = %d\n", i, pptable->XgmiSocVoltage[i]);
0515 
0516     pr_info("DebugOverrides = 0x%x\n", pptable->DebugOverrides);
0517     pr_info("ReservedEquation0{a = 0x%x b = 0x%x c = 0x%x}\n",
0518             pptable->ReservedEquation0.a,
0519             pptable->ReservedEquation0.b,
0520             pptable->ReservedEquation0.c);
0521     pr_info("ReservedEquation1{a = 0x%x b = 0x%x c = 0x%x}\n",
0522             pptable->ReservedEquation1.a,
0523             pptable->ReservedEquation1.b,
0524             pptable->ReservedEquation1.c);
0525     pr_info("ReservedEquation2{a = 0x%x b = 0x%x c = 0x%x}\n",
0526             pptable->ReservedEquation2.a,
0527             pptable->ReservedEquation2.b,
0528             pptable->ReservedEquation2.c);
0529     pr_info("ReservedEquation3{a = 0x%x b = 0x%x c = 0x%x}\n",
0530             pptable->ReservedEquation3.a,
0531             pptable->ReservedEquation3.b,
0532             pptable->ReservedEquation3.c);
0533 
0534     pr_info("MinVoltageUlvGfx = %d\n", pptable->MinVoltageUlvGfx);
0535     pr_info("MinVoltageUlvSoc = %d\n", pptable->MinVoltageUlvSoc);
0536 
0537     pr_info("MGpuFanBoostLimitRpm = %d\n", pptable->MGpuFanBoostLimitRpm);
0538     pr_info("padding16_Fan = %d\n", pptable->padding16_Fan);
0539 
0540     pr_info("FanGainVrMem0 = %d\n", pptable->FanGainVrMem0);
0541     pr_info("FanGainVrMem0 = %d\n", pptable->FanGainVrMem0);
0542 
0543     pr_info("DcBtcGb[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_GFX]);
0544     pr_info("DcBtcGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_SOC]);
0545 
0546     for (i = 0; i < 11; i++)
0547         pr_info("Reserved[%d] = 0x%x\n", i, pptable->Reserved[i]);
0548 
0549     for (i = 0; i < 3; i++)
0550         pr_info("Padding32[%d] = 0x%x\n", i, pptable->Padding32[i]);
0551 
0552     pr_info("MaxVoltageStepGfx = 0x%x\n", pptable->MaxVoltageStepGfx);
0553     pr_info("MaxVoltageStepSoc = 0x%x\n", pptable->MaxVoltageStepSoc);
0554 
0555     pr_info("VddGfxVrMapping = 0x%x\n", pptable->VddGfxVrMapping);
0556     pr_info("VddSocVrMapping = 0x%x\n", pptable->VddSocVrMapping);
0557     pr_info("VddMem0VrMapping = 0x%x\n", pptable->VddMem0VrMapping);
0558     pr_info("VddMem1VrMapping = 0x%x\n", pptable->VddMem1VrMapping);
0559 
0560     pr_info("GfxUlvPhaseSheddingMask = 0x%x\n", pptable->GfxUlvPhaseSheddingMask);
0561     pr_info("SocUlvPhaseSheddingMask = 0x%x\n", pptable->SocUlvPhaseSheddingMask);
0562     pr_info("ExternalSensorPresent = 0x%x\n", pptable->ExternalSensorPresent);
0563     pr_info("Padding8_V = 0x%x\n", pptable->Padding8_V);
0564 
0565     pr_info("GfxMaxCurrent = 0x%x\n", pptable->GfxMaxCurrent);
0566     pr_info("GfxOffset = 0x%x\n", pptable->GfxOffset);
0567     pr_info("Padding_TelemetryGfx = 0x%x\n", pptable->Padding_TelemetryGfx);
0568 
0569     pr_info("SocMaxCurrent = 0x%x\n", pptable->SocMaxCurrent);
0570     pr_info("SocOffset = 0x%x\n", pptable->SocOffset);
0571     pr_info("Padding_TelemetrySoc = 0x%x\n", pptable->Padding_TelemetrySoc);
0572 
0573     pr_info("Mem0MaxCurrent = 0x%x\n", pptable->Mem0MaxCurrent);
0574     pr_info("Mem0Offset = 0x%x\n", pptable->Mem0Offset);
0575     pr_info("Padding_TelemetryMem0 = 0x%x\n", pptable->Padding_TelemetryMem0);
0576 
0577     pr_info("Mem1MaxCurrent = 0x%x\n", pptable->Mem1MaxCurrent);
0578     pr_info("Mem1Offset = 0x%x\n", pptable->Mem1Offset);
0579     pr_info("Padding_TelemetryMem1 = 0x%x\n", pptable->Padding_TelemetryMem1);
0580 
0581     pr_info("AcDcGpio = %d\n", pptable->AcDcGpio);
0582     pr_info("AcDcPolarity = %d\n", pptable->AcDcPolarity);
0583     pr_info("VR0HotGpio = %d\n", pptable->VR0HotGpio);
0584     pr_info("VR0HotPolarity = %d\n", pptable->VR0HotPolarity);
0585 
0586     pr_info("VR1HotGpio = %d\n", pptable->VR1HotGpio);
0587     pr_info("VR1HotPolarity = %d\n", pptable->VR1HotPolarity);
0588     pr_info("Padding1 = 0x%x\n", pptable->Padding1);
0589     pr_info("Padding2 = 0x%x\n", pptable->Padding2);
0590 
0591     pr_info("LedPin0 = %d\n", pptable->LedPin0);
0592     pr_info("LedPin1 = %d\n", pptable->LedPin1);
0593     pr_info("LedPin2 = %d\n", pptable->LedPin2);
0594     pr_info("padding8_4 = 0x%x\n", pptable->padding8_4);
0595 
0596     pr_info("PllGfxclkSpreadEnabled = %d\n", pptable->PllGfxclkSpreadEnabled);
0597     pr_info("PllGfxclkSpreadPercent = %d\n", pptable->PllGfxclkSpreadPercent);
0598     pr_info("PllGfxclkSpreadFreq = %d\n", pptable->PllGfxclkSpreadFreq);
0599 
0600     pr_info("UclkSpreadEnabled = %d\n", pptable->UclkSpreadEnabled);
0601     pr_info("UclkSpreadPercent = %d\n", pptable->UclkSpreadPercent);
0602     pr_info("UclkSpreadFreq = %d\n", pptable->UclkSpreadFreq);
0603 
0604     pr_info("FclkSpreadEnabled = %d\n", pptable->FclkSpreadEnabled);
0605     pr_info("FclkSpreadPercent = %d\n", pptable->FclkSpreadPercent);
0606     pr_info("FclkSpreadFreq = %d\n", pptable->FclkSpreadFreq);
0607 
0608     pr_info("FllGfxclkSpreadEnabled = %d\n", pptable->FllGfxclkSpreadEnabled);
0609     pr_info("FllGfxclkSpreadPercent = %d\n", pptable->FllGfxclkSpreadPercent);
0610     pr_info("FllGfxclkSpreadFreq = %d\n", pptable->FllGfxclkSpreadFreq);
0611 
0612     for (i = 0; i < I2C_CONTROLLER_NAME_COUNT; i++) {
0613         pr_info("I2cControllers[%d]:\n", i);
0614         pr_info("                   .Enabled = %d\n",
0615                 pptable->I2cControllers[i].Enabled);
0616         pr_info("                   .SlaveAddress = 0x%x\n",
0617                 pptable->I2cControllers[i].SlaveAddress);
0618         pr_info("                   .ControllerPort = %d\n",
0619                 pptable->I2cControllers[i].ControllerPort);
0620         pr_info("                   .ControllerName = %d\n",
0621                 pptable->I2cControllers[i].ControllerName);
0622         pr_info("                   .ThermalThrottler = %d\n",
0623                 pptable->I2cControllers[i].ThermalThrottler);
0624         pr_info("                   .I2cProtocol = %d\n",
0625                 pptable->I2cControllers[i].I2cProtocol);
0626         pr_info("                   .I2cSpeed = %d\n",
0627                 pptable->I2cControllers[i].I2cSpeed);
0628     }
0629 
0630     for (i = 0; i < 10; i++)
0631         pr_info("BoardReserved[%d] = 0x%x\n", i, pptable->BoardReserved[i]);
0632 
0633     for (i = 0; i < 8; i++)
0634         pr_info("MmHubPadding[%d] = 0x%x\n", i, pptable->MmHubPadding[i]);
0635 }
0636 #endif
0637 
0638 static int check_powerplay_tables(
0639         struct pp_hwmgr *hwmgr,
0640         const ATOM_Vega20_POWERPLAYTABLE *powerplay_table)
0641 {
0642     PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >=
0643         ATOM_VEGA20_TABLE_REVISION_VEGA20),
0644         "Unsupported PPTable format!", return -1);
0645     PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0,
0646         "Invalid PowerPlay Table!", return -1);
0647 
0648     if (powerplay_table->smcPPTable.Version != PPTABLE_V20_SMU_VERSION) {
0649         pr_info("Unmatch PPTable version: "
0650             "pptable from VBIOS is V%d while driver supported is V%d!",
0651             powerplay_table->smcPPTable.Version,
0652             PPTABLE_V20_SMU_VERSION);
0653         return -EINVAL;
0654     }
0655 
0656     //dump_pptable(&powerplay_table->smcPPTable);
0657 
0658     return 0;
0659 }
0660 
0661 static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps)
0662 {
0663     set_hw_cap(
0664         hwmgr,
0665         0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_POWERPLAY),
0666         PHM_PlatformCaps_PowerPlaySupport);
0667 
0668     set_hw_cap(
0669         hwmgr,
0670         0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_SBIOSPOWERSOURCE),
0671         PHM_PlatformCaps_BiosPowerSourceControl);
0672 
0673     set_hw_cap(
0674         hwmgr,
0675         0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_BACO),
0676         PHM_PlatformCaps_BACO);
0677 
0678     set_hw_cap(
0679         hwmgr,
0680         0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_BAMACO),
0681          PHM_PlatformCaps_BAMACO);
0682 
0683     return 0;
0684 }
0685 
0686 static int copy_overdrive_feature_capabilities_array(
0687         struct pp_hwmgr *hwmgr,
0688         uint8_t **pptable_info_array,
0689         const uint8_t *pptable_array,
0690         uint8_t od_feature_count)
0691 {
0692     uint32_t array_size, i;
0693     uint8_t *table;
0694     bool od_supported = false;
0695 
0696     array_size = sizeof(uint8_t) * od_feature_count;
0697     table = kzalloc(array_size, GFP_KERNEL);
0698     if (NULL == table)
0699         return -ENOMEM;
0700 
0701     for (i = 0; i < od_feature_count; i++) {
0702         table[i] = le32_to_cpu(pptable_array[i]);
0703         if (table[i])
0704             od_supported = true;
0705     }
0706 
0707     *pptable_info_array = table;
0708 
0709     if (od_supported)
0710         phm_cap_set(hwmgr->platform_descriptor.platformCaps,
0711                 PHM_PlatformCaps_ACOverdriveSupport);
0712 
0713     return 0;
0714 }
0715 
0716 static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable)
0717 {
0718     struct atom_smc_dpm_info_v4_4 *smc_dpm_table;
0719     int index = GetIndexIntoMasterDataTable(smc_dpm_info);
0720     int i;
0721 
0722     PP_ASSERT_WITH_CODE(
0723         smc_dpm_table = smu_atom_get_data_table(hwmgr->adev, index, NULL, NULL, NULL),
0724         "[appendVbiosPPTable] Failed to retrieve Smc Dpm Table from VBIOS!",
0725         return -1);
0726 
0727     ppsmc_pptable->MaxVoltageStepGfx = smc_dpm_table->maxvoltagestepgfx;
0728     ppsmc_pptable->MaxVoltageStepSoc = smc_dpm_table->maxvoltagestepsoc;
0729 
0730     ppsmc_pptable->VddGfxVrMapping = smc_dpm_table->vddgfxvrmapping;
0731     ppsmc_pptable->VddSocVrMapping = smc_dpm_table->vddsocvrmapping;
0732     ppsmc_pptable->VddMem0VrMapping = smc_dpm_table->vddmem0vrmapping;
0733     ppsmc_pptable->VddMem1VrMapping = smc_dpm_table->vddmem1vrmapping;
0734 
0735     ppsmc_pptable->GfxUlvPhaseSheddingMask = smc_dpm_table->gfxulvphasesheddingmask;
0736     ppsmc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table->soculvphasesheddingmask;
0737     ppsmc_pptable->ExternalSensorPresent = smc_dpm_table->externalsensorpresent;
0738 
0739     ppsmc_pptable->GfxMaxCurrent = smc_dpm_table->gfxmaxcurrent;
0740     ppsmc_pptable->GfxOffset = smc_dpm_table->gfxoffset;
0741     ppsmc_pptable->Padding_TelemetryGfx = smc_dpm_table->padding_telemetrygfx;
0742 
0743     ppsmc_pptable->SocMaxCurrent = smc_dpm_table->socmaxcurrent;
0744     ppsmc_pptable->SocOffset = smc_dpm_table->socoffset;
0745     ppsmc_pptable->Padding_TelemetrySoc = smc_dpm_table->padding_telemetrysoc;
0746 
0747     ppsmc_pptable->Mem0MaxCurrent = smc_dpm_table->mem0maxcurrent;
0748     ppsmc_pptable->Mem0Offset = smc_dpm_table->mem0offset;
0749     ppsmc_pptable->Padding_TelemetryMem0 = smc_dpm_table->padding_telemetrymem0;
0750 
0751     ppsmc_pptable->Mem1MaxCurrent = smc_dpm_table->mem1maxcurrent;
0752     ppsmc_pptable->Mem1Offset = smc_dpm_table->mem1offset;
0753     ppsmc_pptable->Padding_TelemetryMem1 = smc_dpm_table->padding_telemetrymem1;
0754 
0755     ppsmc_pptable->AcDcGpio = smc_dpm_table->acdcgpio;
0756     ppsmc_pptable->AcDcPolarity = smc_dpm_table->acdcpolarity;
0757     ppsmc_pptable->VR0HotGpio = smc_dpm_table->vr0hotgpio;
0758     ppsmc_pptable->VR0HotPolarity = smc_dpm_table->vr0hotpolarity;
0759 
0760     ppsmc_pptable->VR1HotGpio = smc_dpm_table->vr1hotgpio;
0761     ppsmc_pptable->VR1HotPolarity = smc_dpm_table->vr1hotpolarity;
0762     ppsmc_pptable->Padding1 = smc_dpm_table->padding1;
0763     ppsmc_pptable->Padding2 = smc_dpm_table->padding2;
0764 
0765     ppsmc_pptable->LedPin0 = smc_dpm_table->ledpin0;
0766     ppsmc_pptable->LedPin1 = smc_dpm_table->ledpin1;
0767     ppsmc_pptable->LedPin2 = smc_dpm_table->ledpin2;
0768 
0769     ppsmc_pptable->PllGfxclkSpreadEnabled = smc_dpm_table->pllgfxclkspreadenabled;
0770     ppsmc_pptable->PllGfxclkSpreadPercent = smc_dpm_table->pllgfxclkspreadpercent;
0771     ppsmc_pptable->PllGfxclkSpreadFreq = smc_dpm_table->pllgfxclkspreadfreq;
0772 
0773     ppsmc_pptable->UclkSpreadEnabled = 0;
0774     ppsmc_pptable->UclkSpreadPercent = smc_dpm_table->uclkspreadpercent;
0775     ppsmc_pptable->UclkSpreadFreq = smc_dpm_table->uclkspreadfreq;
0776 
0777     ppsmc_pptable->FclkSpreadEnabled = smc_dpm_table->fclkspreadenabled;
0778     ppsmc_pptable->FclkSpreadPercent = smc_dpm_table->fclkspreadpercent;
0779     ppsmc_pptable->FclkSpreadFreq = smc_dpm_table->fclkspreadfreq;
0780 
0781     ppsmc_pptable->FllGfxclkSpreadEnabled = smc_dpm_table->fllgfxclkspreadenabled;
0782     ppsmc_pptable->FllGfxclkSpreadPercent = smc_dpm_table->fllgfxclkspreadpercent;
0783     ppsmc_pptable->FllGfxclkSpreadFreq = smc_dpm_table->fllgfxclkspreadfreq;
0784 
0785     for (i = 0; i < I2C_CONTROLLER_NAME_COUNT; i++) {
0786         ppsmc_pptable->I2cControllers[i].Enabled =
0787             smc_dpm_table->i2ccontrollers[i].enabled;
0788         ppsmc_pptable->I2cControllers[i].SlaveAddress =
0789             smc_dpm_table->i2ccontrollers[i].slaveaddress;
0790         ppsmc_pptable->I2cControllers[i].ControllerPort =
0791             smc_dpm_table->i2ccontrollers[i].controllerport;
0792         ppsmc_pptable->I2cControllers[i].ThermalThrottler =
0793             smc_dpm_table->i2ccontrollers[i].thermalthrottler;
0794         ppsmc_pptable->I2cControllers[i].I2cProtocol =
0795             smc_dpm_table->i2ccontrollers[i].i2cprotocol;
0796         ppsmc_pptable->I2cControllers[i].I2cSpeed =
0797             smc_dpm_table->i2ccontrollers[i].i2cspeed;
0798     }
0799 
0800     return 0;
0801 }
0802 
0803 static int override_powerplay_table_fantargettemperature(struct pp_hwmgr *hwmgr)
0804 {
0805     struct phm_ppt_v3_information *pptable_information =
0806         (struct phm_ppt_v3_information *)hwmgr->pptable;
0807     PPTable_t *ppsmc_pptable = (PPTable_t *)(pptable_information->smc_pptable);
0808 
0809     ppsmc_pptable->FanTargetTemperature = VEGA20_FAN_TARGET_TEMPERATURE_OVERRIDE;
0810 
0811     return 0;
0812 }
0813 
0814 #define VEGA20_ENGINECLOCK_HARDMAX 198000
0815 static int init_powerplay_table_information(
0816         struct pp_hwmgr *hwmgr,
0817         const ATOM_Vega20_POWERPLAYTABLE *powerplay_table)
0818 {
0819     struct phm_ppt_v3_information *pptable_information =
0820         (struct phm_ppt_v3_information *)hwmgr->pptable;
0821     uint32_t disable_power_control = 0;
0822     uint32_t od_feature_count, od_setting_count, power_saving_clock_count;
0823     int result;
0824 
0825     hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType;
0826     pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType;
0827     hwmgr->thermal_controller.fanInfo.ulMinRPM = 0;
0828     hwmgr->thermal_controller.fanInfo.ulMaxRPM = powerplay_table->smcPPTable.FanMaximumRpm;
0829 
0830     set_hw_cap(hwmgr,
0831         ATOM_VEGA20_PP_THERMALCONTROLLER_NONE != hwmgr->thermal_controller.ucType,
0832         PHM_PlatformCaps_ThermalController);
0833 
0834     phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl);
0835 
0836     if (powerplay_table->OverDrive8Table.ucODTableRevision == 1) {
0837         od_feature_count =
0838             (le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount) >
0839              ATOM_VEGA20_ODFEATURE_COUNT) ?
0840             ATOM_VEGA20_ODFEATURE_COUNT :
0841             le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount);
0842         od_setting_count =
0843             (le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount) >
0844              ATOM_VEGA20_ODSETTING_COUNT) ?
0845             ATOM_VEGA20_ODSETTING_COUNT :
0846             le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount);
0847 
0848         copy_overdrive_feature_capabilities_array(hwmgr,
0849                 &pptable_information->od_feature_capabilities,
0850                 powerplay_table->OverDrive8Table.ODFeatureCapabilities,
0851                 od_feature_count);
0852         phm_copy_overdrive_settings_limits_array(hwmgr,
0853                 &pptable_information->od_settings_max,
0854                 powerplay_table->OverDrive8Table.ODSettingsMax,
0855                 od_setting_count);
0856         phm_copy_overdrive_settings_limits_array(hwmgr,
0857                 &pptable_information->od_settings_min,
0858                 powerplay_table->OverDrive8Table.ODSettingsMin,
0859                 od_setting_count);
0860     }
0861 
0862     pptable_information->us_small_power_limit1 = le16_to_cpu(powerplay_table->usSmallPowerLimit1);
0863     pptable_information->us_small_power_limit2 = le16_to_cpu(powerplay_table->usSmallPowerLimit2);
0864     pptable_information->us_boost_power_limit = le16_to_cpu(powerplay_table->usBoostPowerLimit);
0865     pptable_information->us_od_turbo_power_limit = le16_to_cpu(powerplay_table->usODTurboPowerLimit);
0866     pptable_information->us_od_powersave_power_limit = le16_to_cpu(powerplay_table->usODPowerSavePowerLimit);
0867 
0868     pptable_information->us_software_shutdown_temp = le16_to_cpu(powerplay_table->usSoftwareShutdownTemp);
0869 
0870     hwmgr->platform_descriptor.TDPODLimit = le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingsMax[ATOM_VEGA20_ODSETTING_POWERPERCENTAGE]);
0871 
0872     disable_power_control = 0;
0873     if (!disable_power_control && hwmgr->platform_descriptor.TDPODLimit)
0874         /* enable TDP overdrive (PowerControl) feature as well if supported */
0875         phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PowerControl);
0876 
0877     if (powerplay_table->PowerSavingClockTable.ucTableRevision == 1) {
0878         power_saving_clock_count =
0879             (le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount) >=
0880              ATOM_VEGA20_PPCLOCK_COUNT) ?
0881             ATOM_VEGA20_PPCLOCK_COUNT :
0882             le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount);
0883         phm_copy_clock_limits_array(hwmgr,
0884                 &pptable_information->power_saving_clock_max,
0885                 powerplay_table->PowerSavingClockTable.PowerSavingClockMax,
0886                 power_saving_clock_count);
0887         phm_copy_clock_limits_array(hwmgr,
0888                 &pptable_information->power_saving_clock_min,
0889                 powerplay_table->PowerSavingClockTable.PowerSavingClockMin,
0890                 power_saving_clock_count);
0891     }
0892 
0893     pptable_information->smc_pptable = kmemdup(&(powerplay_table->smcPPTable),
0894                            sizeof(PPTable_t),
0895                            GFP_KERNEL);
0896     if (pptable_information->smc_pptable == NULL)
0897         return -ENOMEM;
0898 
0899 
0900     result = append_vbios_pptable(hwmgr, (pptable_information->smc_pptable));
0901     if (result)
0902         return result;
0903 
0904     result = override_powerplay_table_fantargettemperature(hwmgr);
0905 
0906     return result;
0907 }
0908 
0909 static int vega20_pp_tables_initialize(struct pp_hwmgr *hwmgr)
0910 {
0911     int result = 0;
0912     const ATOM_Vega20_POWERPLAYTABLE *powerplay_table;
0913 
0914     hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v3_information), GFP_KERNEL);
0915     PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL),
0916         "Failed to allocate hwmgr->pptable!", return -ENOMEM);
0917 
0918     powerplay_table = get_powerplay_table(hwmgr);
0919     PP_ASSERT_WITH_CODE((powerplay_table != NULL),
0920         "Missing PowerPlay Table!", return -1);
0921 
0922     result = check_powerplay_tables(hwmgr, powerplay_table);
0923     PP_ASSERT_WITH_CODE((result == 0),
0924         "check_powerplay_tables failed", return result);
0925 
0926     result = set_platform_caps(hwmgr,
0927             le32_to_cpu(powerplay_table->ulPlatformCaps));
0928     PP_ASSERT_WITH_CODE((result == 0),
0929         "set_platform_caps failed", return result);
0930 
0931     result = init_powerplay_table_information(hwmgr, powerplay_table);
0932     PP_ASSERT_WITH_CODE((result == 0),
0933         "init_powerplay_table_information failed", return result);
0934 
0935     return result;
0936 }
0937 
0938 static int vega20_pp_tables_uninitialize(struct pp_hwmgr *hwmgr)
0939 {
0940     struct phm_ppt_v3_information *pp_table_info =
0941             (struct phm_ppt_v3_information *)(hwmgr->pptable);
0942 
0943     kfree(pp_table_info->power_saving_clock_max);
0944     pp_table_info->power_saving_clock_max = NULL;
0945 
0946     kfree(pp_table_info->power_saving_clock_min);
0947     pp_table_info->power_saving_clock_min = NULL;
0948 
0949     kfree(pp_table_info->od_feature_capabilities);
0950     pp_table_info->od_feature_capabilities = NULL;
0951 
0952     kfree(pp_table_info->od_settings_max);
0953     pp_table_info->od_settings_max = NULL;
0954 
0955     kfree(pp_table_info->od_settings_min);
0956     pp_table_info->od_settings_min = NULL;
0957 
0958     kfree(pp_table_info->smc_pptable);
0959     pp_table_info->smc_pptable = NULL;
0960 
0961     kfree(hwmgr->pptable);
0962     hwmgr->pptable = NULL;
0963 
0964     return 0;
0965 }
0966 
0967 const struct pp_table_func vega20_pptable_funcs = {
0968     .pptable_init = vega20_pp_tables_initialize,
0969     .pptable_fini = vega20_pp_tables_uninitialize,
0970 };
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