powerplay/hwmgr/smu7_powertune.h

0001 /*
0002  * Copyright 2015 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 #ifndef _SMU7_POWERTUNE_H
0024 #define _SMU7_POWERTUNE_H
0025
0026 #define DIDT_SQ_CTRL0__UNUSED_0_MASK    0xfffc0000
0027 #define DIDT_SQ_CTRL0__UNUSED_0__SHIFT  0x12
0028 #define DIDT_TD_CTRL0__UNUSED_0_MASK    0xfffc0000
0029 #define DIDT_TD_CTRL0__UNUSED_0__SHIFT  0x12
0030 #define DIDT_TCP_CTRL0__UNUSED_0_MASK   0xfffc0000
0031 #define DIDT_TCP_CTRL0__UNUSED_0__SHIFT 0x12
0032 #define DIDT_SQ_TUNING_CTRL__UNUSED_0_MASK                 0xc0000000
0033 #define DIDT_SQ_TUNING_CTRL__UNUSED_0__SHIFT               0x0000001e
0034 #define DIDT_TD_TUNING_CTRL__UNUSED_0_MASK                 0xc0000000
0035 #define DIDT_TD_TUNING_CTRL__UNUSED_0__SHIFT               0x0000001e
0036 #define DIDT_TCP_TUNING_CTRL__UNUSED_0_MASK                0xc0000000
0037 #define DIDT_TCP_TUNING_CTRL__UNUSED_0__SHIFT              0x0000001e
0038
0039 /* PowerContainment Features */
0040 #define POWERCONTAINMENT_FEATURE_DTE             0x00000001
0041 #define POWERCONTAINMENT_FEATURE_TDCLimit        0x00000002
0042 #define POWERCONTAINMENT_FEATURE_PkgPwrLimit     0x00000004
0043
0044 #define ixGC_CAC_CNTL 0x0000
0045 #define ixDIDT_SQ_STALL_CTRL 0x0004
0046 #define ixDIDT_SQ_TUNING_CTRL 0x0005
0047 #define ixDIDT_TD_STALL_CTRL 0x0044
0048 #define ixDIDT_TD_TUNING_CTRL 0x0045
0049 #define ixDIDT_TCP_STALL_CTRL 0x0064
0050 #define ixDIDT_TCP_TUNING_CTRL 0x0065
0051
0052
0053 int smu7_enable_smc_cac(struct pp_hwmgr *hwmgr);
0054 int smu7_disable_smc_cac(struct pp_hwmgr *hwmgr);
0055 int smu7_enable_power_containment(struct pp_hwmgr *hwmgr);
0056 int smu7_disable_power_containment(struct pp_hwmgr *hwmgr);
0057 int smu7_set_power_limit(struct pp_hwmgr *hwmgr, uint32_t n);
0058 int smu7_power_control_set_level(struct pp_hwmgr *hwmgr);
0059 int smu7_enable_didt_config(struct pp_hwmgr *hwmgr);
0060 int smu7_disable_didt_config(struct pp_hwmgr *hwmgr);
0061 #endif  /* DGPU_POWERTUNE_H */
0062