powerplay/hwmgr/hwmgr_ppt.h

0001 /*
0002  * Copyright 2015 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #ifndef PP_HWMGR_PPT_H
0025 #define PP_HWMGR_PPT_H
0026
0027 #include "hardwaremanager.h"
0028 #include "smumgr.h"
0029 #include "atom-types.h"
0030
0031 struct phm_ppt_v1_clock_voltage_dependency_record {
0032     uint32_t clk;
0033     uint8_t  vddInd;
0034     uint8_t  vddciInd;
0035     uint8_t  mvddInd;
0036     uint16_t vdd_offset;
0037     uint16_t vddc;
0038     uint16_t vddgfx;
0039     uint16_t vddci;
0040     uint16_t mvdd;
0041     uint8_t  phases;
0042     uint8_t  cks_enable;
0043     uint8_t  cks_voffset;
0044     uint32_t sclk_offset;
0045 };
0046
0047 typedef struct phm_ppt_v1_clock_voltage_dependency_record phm_ppt_v1_clock_voltage_dependency_record;
0048
0049 struct phm_ppt_v1_clock_voltage_dependency_table {
0050     uint32_t count;                                            /* Number of entries. */
0051     phm_ppt_v1_clock_voltage_dependency_record entries[];      /* Dynamically allocate count entries. */
0052 };
0053
0054 typedef struct phm_ppt_v1_clock_voltage_dependency_table phm_ppt_v1_clock_voltage_dependency_table;
0055
0056
0057 /* Multimedia Clock Voltage Dependency records and table */
0058 struct phm_ppt_v1_mm_clock_voltage_dependency_record {
0059     uint32_t  dclk;                                              /* UVD D-clock */
0060     uint32_t  vclk;                                              /* UVD V-clock */
0061     uint32_t  eclk;                                              /* VCE clock */
0062     uint32_t  aclk;                                              /* ACP clock */
0063     uint32_t  samclock;                                          /* SAMU clock */
0064     uint8_t vddcInd;
0065     uint16_t vddgfx_offset;
0066     uint16_t vddc;
0067     uint16_t vddgfx;
0068     uint8_t phases;
0069 };
0070 typedef struct phm_ppt_v1_mm_clock_voltage_dependency_record phm_ppt_v1_mm_clock_voltage_dependency_record;
0071
0072 struct phm_ppt_v1_mm_clock_voltage_dependency_table {
0073     uint32_t count;                                                 /* Number of entries. */
0074     phm_ppt_v1_mm_clock_voltage_dependency_record entries[];        /* Dynamically allocate count entries. */
0075 };
0076 typedef struct phm_ppt_v1_mm_clock_voltage_dependency_table phm_ppt_v1_mm_clock_voltage_dependency_table;
0077
0078 struct phm_ppt_v1_voltage_lookup_record {
0079     uint16_t us_calculated;
0080     uint16_t us_vdd;                                                /* Base voltage */
0081     uint16_t us_cac_low;
0082     uint16_t us_cac_mid;
0083     uint16_t us_cac_high;
0084 };
0085 typedef struct phm_ppt_v1_voltage_lookup_record phm_ppt_v1_voltage_lookup_record;
0086
0087 struct phm_ppt_v1_voltage_lookup_table {
0088     uint32_t count;
0089     phm_ppt_v1_voltage_lookup_record entries[];    /* Dynamically allocate count entries. */
0090 };
0091 typedef struct phm_ppt_v1_voltage_lookup_table phm_ppt_v1_voltage_lookup_table;
0092
0093 /* PCIE records and Table */
0094
0095 struct phm_ppt_v1_pcie_record {
0096     uint8_t gen_speed;
0097     uint8_t lane_width;
0098     uint16_t usreserved;
0099     uint16_t reserved;
0100     uint32_t pcie_sclk;
0101 };
0102 typedef struct phm_ppt_v1_pcie_record phm_ppt_v1_pcie_record;
0103
0104 struct phm_ppt_v1_pcie_table {
0105     uint32_t count;                                            /* Number of entries. */
0106     phm_ppt_v1_pcie_record entries[];              /* Dynamically allocate count entries. */
0107 };
0108 typedef struct phm_ppt_v1_pcie_table phm_ppt_v1_pcie_table;
0109
0110 struct phm_ppt_v1_gpio_table {
0111     uint8_t vrhot_triggered_sclk_dpm_index;           /* SCLK DPM level index to switch to when VRHot is triggered */
0112 };
0113 typedef struct phm_ppt_v1_gpio_table phm_ppt_v1_gpio_table;
0114
0115 #endif
0116