0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015
0016
0017
0018
0019
0020
0021
0022
0023 #ifndef __R600_DPM_H__
0024 #define __R600_DPM_H__
0025
0026 #define R600_ASI_DFLT 10000
0027 #define R600_BSP_DFLT 0x41EB
0028 #define R600_BSU_DFLT 0x2
0029 #define R600_AH_DFLT 5
0030 #define R600_RLP_DFLT 25
0031 #define R600_RMP_DFLT 65
0032 #define R600_LHP_DFLT 40
0033 #define R600_LMP_DFLT 15
0034 #define R600_TD_DFLT 0
0035 #define R600_UTC_DFLT_00 0x24
0036 #define R600_UTC_DFLT_01 0x22
0037 #define R600_UTC_DFLT_02 0x22
0038 #define R600_UTC_DFLT_03 0x22
0039 #define R600_UTC_DFLT_04 0x22
0040 #define R600_UTC_DFLT_05 0x22
0041 #define R600_UTC_DFLT_06 0x22
0042 #define R600_UTC_DFLT_07 0x22
0043 #define R600_UTC_DFLT_08 0x22
0044 #define R600_UTC_DFLT_09 0x22
0045 #define R600_UTC_DFLT_10 0x22
0046 #define R600_UTC_DFLT_11 0x22
0047 #define R600_UTC_DFLT_12 0x22
0048 #define R600_UTC_DFLT_13 0x22
0049 #define R600_UTC_DFLT_14 0x22
0050 #define R600_DTC_DFLT_00 0x24
0051 #define R600_DTC_DFLT_01 0x22
0052 #define R600_DTC_DFLT_02 0x22
0053 #define R600_DTC_DFLT_03 0x22
0054 #define R600_DTC_DFLT_04 0x22
0055 #define R600_DTC_DFLT_05 0x22
0056 #define R600_DTC_DFLT_06 0x22
0057 #define R600_DTC_DFLT_07 0x22
0058 #define R600_DTC_DFLT_08 0x22
0059 #define R600_DTC_DFLT_09 0x22
0060 #define R600_DTC_DFLT_10 0x22
0061 #define R600_DTC_DFLT_11 0x22
0062 #define R600_DTC_DFLT_12 0x22
0063 #define R600_DTC_DFLT_13 0x22
0064 #define R600_DTC_DFLT_14 0x22
0065 #define R600_VRC_DFLT 0x0000C003
0066 #define R600_VOLTAGERESPONSETIME_DFLT 1000
0067 #define R600_BACKBIASRESPONSETIME_DFLT 1000
0068 #define R600_VRU_DFLT 0x3
0069 #define R600_SPLLSTEPTIME_DFLT 0x1000
0070 #define R600_SPLLSTEPUNIT_DFLT 0x3
0071 #define R600_TPU_DFLT 0
0072 #define R600_TPC_DFLT 0x200
0073 #define R600_SSTU_DFLT 0
0074 #define R600_SST_DFLT 0x00C8
0075 #define R600_GICST_DFLT 0x200
0076 #define R600_FCT_DFLT 0x0400
0077 #define R600_FCTU_DFLT 0
0078 #define R600_CTXCGTT3DRPHC_DFLT 0x20
0079 #define R600_CTXCGTT3DRSDC_DFLT 0x40
0080 #define R600_VDDC3DOORPHC_DFLT 0x100
0081 #define R600_VDDC3DOORSDC_DFLT 0x7
0082 #define R600_VDDC3DOORSU_DFLT 0
0083 #define R600_MPLLLOCKTIME_DFLT 100
0084 #define R600_MPLLRESETTIME_DFLT 150
0085 #define R600_VCOSTEPPCT_DFLT 20
0086 #define R600_ENDINGVCOSTEPPCT_DFLT 5
0087 #define R600_REFERENCEDIVIDER_DFLT 4
0088
0089 #define R600_PM_NUMBER_OF_TC 15
0090 #define R600_PM_NUMBER_OF_SCLKS 20
0091 #define R600_PM_NUMBER_OF_MCLKS 4
0092 #define R600_PM_NUMBER_OF_VOLTAGE_LEVELS 4
0093 #define R600_PM_NUMBER_OF_ACTIVITY_LEVELS 3
0094
0095
0096 #define R600_TEMP_RANGE_MIN (90 * 1000)
0097 #define R600_TEMP_RANGE_MAX (120 * 1000)
0098
0099 #define FDO_PWM_MODE_STATIC 1
0100 #define FDO_PWM_MODE_STATIC_RPM 5
0101
0102 enum r600_power_level {
0103 R600_POWER_LEVEL_LOW = 0,
0104 R600_POWER_LEVEL_MEDIUM = 1,
0105 R600_POWER_LEVEL_HIGH = 2,
0106 R600_POWER_LEVEL_CTXSW = 3,
0107 };
0108
0109 enum r600_td {
0110 R600_TD_AUTO,
0111 R600_TD_UP,
0112 R600_TD_DOWN,
0113 };
0114
0115 enum r600_display_watermark {
0116 R600_DISPLAY_WATERMARK_LOW = 0,
0117 R600_DISPLAY_WATERMARK_HIGH = 1,
0118 };
0119
0120 enum r600_display_gap
0121 {
0122 R600_PM_DISPLAY_GAP_VBLANK_OR_WM = 0,
0123 R600_PM_DISPLAY_GAP_VBLANK = 1,
0124 R600_PM_DISPLAY_GAP_WATERMARK = 2,
0125 R600_PM_DISPLAY_GAP_IGNORE = 3,
0126 };
0127 #endif