pm/legacy-dpm/ppsmc.h

0001 /*
0002  * Copyright 2011 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 #ifndef PP_SMC_H
0024 #define PP_SMC_H
0025
0026 #pragma pack(push, 1)
0027
0028 #define PPSMC_SWSTATE_FLAG_DC                           0x01
0029 #define PPSMC_SWSTATE_FLAG_UVD                          0x02
0030 #define PPSMC_SWSTATE_FLAG_VCE                          0x04
0031 #define PPSMC_SWSTATE_FLAG_PCIE_X1                      0x08
0032
0033 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL             0x00
0034 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL             0x01
0035 #define PPSMC_THERMAL_PROTECT_TYPE_NONE                 0xff
0036
0037 #define PPSMC_SYSTEMFLAG_GPIO_DC                        0x01
0038 #define PPSMC_SYSTEMFLAG_STEPVDDC                       0x02
0039 #define PPSMC_SYSTEMFLAG_GDDR5                          0x04
0040 #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP               0x08
0041 #define PPSMC_SYSTEMFLAG_REGULATOR_HOT                  0x10
0042 #define PPSMC_SYSTEMFLAG_REGULATOR_HOT_ANALOG           0x20
0043 #define PPSMC_SYSTEMFLAG_REGULATOR_HOT_PROG_GPIO        0x40
0044
0045 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_MASK              0x07
0046 #define PPSMC_EXTRAFLAGS_AC2DC_DONT_WAIT_FOR_VBLANK     0x08
0047 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTODPMLOWSTATE   0x00
0048 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTOINITIALSTATE  0x01
0049 #define PPSMC_EXTRAFLAGS_AC2DC_GPIO5_POLARITY_HIGH      0x02
0050
0051 #define PPSMC_DISPLAY_WATERMARK_LOW                     0
0052 #define PPSMC_DISPLAY_WATERMARK_HIGH                    1
0053
0054 #define PPSMC_STATEFLAG_AUTO_PULSE_SKIP    0x01
0055 #define PPSMC_STATEFLAG_POWERBOOST         0x02
0056 #define PPSMC_STATEFLAG_DEEPSLEEP_THROTTLE 0x20
0057 #define PPSMC_STATEFLAG_DEEPSLEEP_BYPASS   0x40
0058
0059 #define FDO_MODE_HARDWARE 0
0060 #define FDO_MODE_PIECE_WISE_LINEAR 1
0061
0062 enum FAN_CONTROL {
0063     FAN_CONTROL_FUZZY,
0064     FAN_CONTROL_TABLE
0065 };
0066
0067 #define PPSMC_Result_OK             ((uint8_t)0x01)
0068 #define PPSMC_Result_Failed         ((uint8_t)0xFF)
0069
0070 typedef uint8_t PPSMC_Result;
0071
0072 #define PPSMC_MSG_Halt                      ((uint8_t)0x10)
0073 #define PPSMC_MSG_Resume                    ((uint8_t)0x11)
0074 #define PPSMC_MSG_ZeroLevelsDisabled        ((uint8_t)0x13)
0075 #define PPSMC_MSG_OneLevelsDisabled         ((uint8_t)0x14)
0076 #define PPSMC_MSG_TwoLevelsDisabled         ((uint8_t)0x15)
0077 #define PPSMC_MSG_EnableThermalInterrupt    ((uint8_t)0x16)
0078 #define PPSMC_MSG_RunningOnAC               ((uint8_t)0x17)
0079 #define PPSMC_MSG_SwitchToSwState           ((uint8_t)0x20)
0080 #define PPSMC_MSG_SwitchToInitialState      ((uint8_t)0x40)
0081 #define PPSMC_MSG_NoForcedLevel             ((uint8_t)0x41)
0082 #define PPSMC_MSG_ForceHigh                 ((uint8_t)0x42)
0083 #define PPSMC_MSG_ForceMediumOrHigh         ((uint8_t)0x43)
0084 #define PPSMC_MSG_SwitchToMinimumPower      ((uint8_t)0x51)
0085 #define PPSMC_MSG_ResumeFromMinimumPower    ((uint8_t)0x52)
0086 #define PPSMC_MSG_EnableCac                 ((uint8_t)0x53)
0087 #define PPSMC_MSG_DisableCac                ((uint8_t)0x54)
0088 #define PPSMC_TDPClampingActive             ((uint8_t)0x59)
0089 #define PPSMC_TDPClampingInactive           ((uint8_t)0x5A)
0090 #define PPSMC_StartFanControl               ((uint8_t)0x5B)
0091 #define PPSMC_StopFanControl                ((uint8_t)0x5C)
0092 #define PPSMC_MSG_NoDisplay                 ((uint8_t)0x5D)
0093 #define PPSMC_NoDisplay                     ((uint8_t)0x5D)
0094 #define PPSMC_MSG_HasDisplay                ((uint8_t)0x5E)
0095 #define PPSMC_HasDisplay                    ((uint8_t)0x5E)
0096 #define PPSMC_MSG_UVDPowerOFF               ((uint8_t)0x60)
0097 #define PPSMC_MSG_UVDPowerON                ((uint8_t)0x61)
0098 #define PPSMC_MSG_EnableULV                 ((uint8_t)0x62)
0099 #define PPSMC_MSG_DisableULV                ((uint8_t)0x63)
0100 #define PPSMC_MSG_EnterULV                  ((uint8_t)0x64)
0101 #define PPSMC_MSG_ExitULV                   ((uint8_t)0x65)
0102 #define PPSMC_CACLongTermAvgEnable          ((uint8_t)0x6E)
0103 #define PPSMC_CACLongTermAvgDisable         ((uint8_t)0x6F)
0104 #define PPSMC_MSG_CollectCAC_PowerCorreln   ((uint8_t)0x7A)
0105 #define PPSMC_FlushDataCache                ((uint8_t)0x80)
0106 #define PPSMC_MSG_SetEnabledLevels          ((uint8_t)0x82)
0107 #define PPSMC_MSG_SetForcedLevels           ((uint8_t)0x83)
0108 #define PPSMC_MSG_ResetToDefaults           ((uint8_t)0x84)
0109 #define PPSMC_MSG_EnableDTE                 ((uint8_t)0x87)
0110 #define PPSMC_MSG_DisableDTE                ((uint8_t)0x88)
0111 #define PPSMC_MSG_ThrottleOVRDSCLKDS        ((uint8_t)0x96)
0112 #define PPSMC_MSG_CancelThrottleOVRDSCLKDS  ((uint8_t)0x97)
0113 #define PPSMC_MSG_EnableACDCGPIOInterrupt   ((uint16_t) 0x149)
0114
0115 /* CI/KV/KB */
0116 #define PPSMC_MSG_UVDDPM_SetEnabledMask       ((uint16_t) 0x12D)
0117 #define PPSMC_MSG_VCEDPM_SetEnabledMask       ((uint16_t) 0x12E)
0118 #define PPSMC_MSG_ACPDPM_SetEnabledMask       ((uint16_t) 0x12F)
0119 #define PPSMC_MSG_SAMUDPM_SetEnabledMask      ((uint16_t) 0x130)
0120 #define PPSMC_MSG_MCLKDPM_ForceState          ((uint16_t) 0x131)
0121 #define PPSMC_MSG_MCLKDPM_NoForcedLevel       ((uint16_t) 0x132)
0122 #define PPSMC_MSG_Thermal_Cntl_Disable        ((uint16_t) 0x133)
0123 #define PPSMC_MSG_Voltage_Cntl_Disable        ((uint16_t) 0x135)
0124 #define PPSMC_MSG_PCIeDPM_Enable              ((uint16_t) 0x136)
0125 #define PPSMC_MSG_PCIeDPM_Disable             ((uint16_t) 0x13d)
0126 #define PPSMC_MSG_ACPPowerOFF                 ((uint16_t) 0x137)
0127 #define PPSMC_MSG_ACPPowerON                  ((uint16_t) 0x138)
0128 #define PPSMC_MSG_SAMPowerOFF                 ((uint16_t) 0x139)
0129 #define PPSMC_MSG_SAMPowerON                  ((uint16_t) 0x13a)
0130 #define PPSMC_MSG_PCIeDPM_Disable             ((uint16_t) 0x13d)
0131 #define PPSMC_MSG_NBDPM_Enable                ((uint16_t) 0x140)
0132 #define PPSMC_MSG_NBDPM_Disable               ((uint16_t) 0x141)
0133 #define PPSMC_MSG_SCLKDPM_SetEnabledMask      ((uint16_t) 0x145)
0134 #define PPSMC_MSG_MCLKDPM_SetEnabledMask      ((uint16_t) 0x146)
0135 #define PPSMC_MSG_PCIeDPM_ForceLevel          ((uint16_t) 0x147)
0136 #define PPSMC_MSG_PCIeDPM_UnForceLevel        ((uint16_t) 0x148)
0137 #define PPSMC_MSG_EnableVRHotGPIOInterrupt    ((uint16_t) 0x14a)
0138 #define PPSMC_MSG_DPM_Enable                  ((uint16_t) 0x14e)
0139 #define PPSMC_MSG_DPM_Disable                 ((uint16_t) 0x14f)
0140 #define PPSMC_MSG_MCLKDPM_Enable              ((uint16_t) 0x150)
0141 #define PPSMC_MSG_MCLKDPM_Disable             ((uint16_t) 0x151)
0142 #define PPSMC_MSG_UVDDPM_Enable               ((uint16_t) 0x154)
0143 #define PPSMC_MSG_UVDDPM_Disable              ((uint16_t) 0x155)
0144 #define PPSMC_MSG_SAMUDPM_Enable              ((uint16_t) 0x156)
0145 #define PPSMC_MSG_SAMUDPM_Disable             ((uint16_t) 0x157)
0146 #define PPSMC_MSG_ACPDPM_Enable               ((uint16_t) 0x158)
0147 #define PPSMC_MSG_ACPDPM_Disable              ((uint16_t) 0x159)
0148 #define PPSMC_MSG_VCEDPM_Enable               ((uint16_t) 0x15a)
0149 #define PPSMC_MSG_VCEDPM_Disable              ((uint16_t) 0x15b)
0150 #define PPSMC_MSG_VddC_Request                ((uint16_t) 0x15f)
0151 #define PPSMC_MSG_SCLKDPM_GetEnabledMask      ((uint16_t) 0x162)
0152 #define PPSMC_MSG_PCIeDPM_SetEnabledMask      ((uint16_t) 0x167)
0153 #define PPSMC_MSG_TDCLimitEnable              ((uint16_t) 0x169)
0154 #define PPSMC_MSG_TDCLimitDisable             ((uint16_t) 0x16a)
0155 #define PPSMC_MSG_PkgPwrLimitEnable           ((uint16_t) 0x185)
0156 #define PPSMC_MSG_PkgPwrLimitDisable          ((uint16_t) 0x186)
0157 #define PPSMC_MSG_PkgPwrSetLimit              ((uint16_t) 0x187)
0158 #define PPSMC_MSG_OverDriveSetTargetTdp       ((uint16_t) 0x188)
0159 #define PPSMC_MSG_SCLKDPM_FreezeLevel         ((uint16_t) 0x189)
0160 #define PPSMC_MSG_SCLKDPM_UnfreezeLevel       ((uint16_t) 0x18A)
0161 #define PPSMC_MSG_MCLKDPM_FreezeLevel         ((uint16_t) 0x18B)
0162 #define PPSMC_MSG_MCLKDPM_UnfreezeLevel       ((uint16_t) 0x18C)
0163 #define PPSMC_MSG_MASTER_DeepSleep_ON         ((uint16_t) 0x18F)
0164 #define PPSMC_MSG_MASTER_DeepSleep_OFF        ((uint16_t) 0x190)
0165 #define PPSMC_MSG_Remove_DC_Clamp             ((uint16_t) 0x191)
0166 #define PPSMC_MSG_SetFanPwmMax                ((uint16_t) 0x19A)
0167 #define PPSMC_MSG_SetFanRpmMax                ((uint16_t) 0x205)
0168
0169 #define PPSMC_MSG_ENABLE_THERMAL_DPM          ((uint16_t) 0x19C)
0170 #define PPSMC_MSG_DISABLE_THERMAL_DPM         ((uint16_t) 0x19D)
0171
0172 #define PPSMC_MSG_API_GetSclkFrequency        ((uint16_t) 0x200)
0173 #define PPSMC_MSG_API_GetMclkFrequency        ((uint16_t) 0x201)
0174
0175 /* TN */
0176 #define PPSMC_MSG_DPM_Config                ((uint32_t) 0x102)
0177 #define PPSMC_MSG_DPM_ForceState            ((uint32_t) 0x104)
0178 #define PPSMC_MSG_PG_SIMD_Config            ((uint32_t) 0x108)
0179 #define PPSMC_MSG_Voltage_Cntl_Enable       ((uint32_t) 0x109)
0180 #define PPSMC_MSG_Thermal_Cntl_Enable       ((uint32_t) 0x10a)
0181 #define PPSMC_MSG_VCEPowerOFF               ((uint32_t) 0x10e)
0182 #define PPSMC_MSG_VCEPowerON                ((uint32_t) 0x10f)
0183 #define PPSMC_MSG_DPM_N_LevelsDisabled      ((uint32_t) 0x112)
0184 #define PPSMC_MSG_DCE_RemoveVoltageAdjustment   ((uint32_t) 0x11d)
0185 #define PPSMC_MSG_DCE_AllowVoltageAdjustment    ((uint32_t) 0x11e)
0186 #define PPSMC_MSG_EnableBAPM                ((uint32_t) 0x120)
0187 #define PPSMC_MSG_DisableBAPM               ((uint32_t) 0x121)
0188 #define PPSMC_MSG_UVD_DPM_Config            ((uint32_t) 0x124)
0189
0190 #define PPSMC_MSG_DRV_DRAM_ADDR_HI            ((uint16_t) 0x250)
0191 #define PPSMC_MSG_DRV_DRAM_ADDR_LO            ((uint16_t) 0x251)
0192 #define PPSMC_MSG_SMU_DRAM_ADDR_HI            ((uint16_t) 0x252)
0193 #define PPSMC_MSG_SMU_DRAM_ADDR_LO            ((uint16_t) 0x253)
0194 #define PPSMC_MSG_LoadUcodes                  ((uint16_t) 0x254)
0195
0196 typedef uint16_t PPSMC_Msg;
0197
0198 #pragma pack(pop)
0199
0200 #endif