pm/inc/amdgpu_pm.h

0001 /*
0002  * Copyright 2014 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #ifndef __AMDGPU_PM_H__
0025 #define __AMDGPU_PM_H__
0026
0027 struct cg_flag_name
0028 {
0029     u64 flag;
0030     const char *name;
0031 };
0032
0033 enum amdgpu_device_attr_flags {
0034     ATTR_FLAG_BASIC = (1 << 0),
0035     ATTR_FLAG_ONEVF = (1 << 16),
0036 };
0037
0038 #define ATTR_FLAG_TYPE_MASK (0x0000ffff)
0039 #define ATTR_FLAG_MODE_MASK (0xffff0000)
0040 #define ATTR_FLAG_MASK_ALL  (0xffffffff)
0041
0042 enum amdgpu_device_attr_states {
0043     ATTR_STATE_UNSUPPORTED = 0,
0044     ATTR_STATE_SUPPORTED,
0045 };
0046
0047 struct amdgpu_device_attr {
0048     struct device_attribute dev_attr;
0049     enum amdgpu_device_attr_flags flags;
0050     int (*attr_update)(struct amdgpu_device *adev, struct amdgpu_device_attr *attr,
0051                uint32_t mask, enum amdgpu_device_attr_states *states);
0052
0053 };
0054
0055 struct amdgpu_device_attr_entry {
0056     struct list_head entry;
0057     struct amdgpu_device_attr *attr;
0058 };
0059
0060 #define to_amdgpu_device_attr(_dev_attr) \
0061     container_of(_dev_attr, struct amdgpu_device_attr, dev_attr)
0062
0063 #define __AMDGPU_DEVICE_ATTR(_name, _mode, _show, _store, _flags, ...)  \
0064     { .dev_attr = __ATTR(_name, _mode, _show, _store),      \
0065       .flags = _flags,                      \
0066       ##__VA_ARGS__, }
0067
0068 #define AMDGPU_DEVICE_ATTR(_name, _mode, _flags, ...)           \
0069     __AMDGPU_DEVICE_ATTR(_name, _mode,              \
0070                  amdgpu_get_##_name, amdgpu_set_##_name,    \
0071                  _flags, ##__VA_ARGS__)
0072
0073 #define AMDGPU_DEVICE_ATTR_RW(_name, _flags, ...)           \
0074     AMDGPU_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR,            \
0075                _flags, ##__VA_ARGS__)
0076
0077 #define AMDGPU_DEVICE_ATTR_RO(_name, _flags, ...)           \
0078     __AMDGPU_DEVICE_ATTR(_name, S_IRUGO,                \
0079                  amdgpu_get_##_name, NULL,          \
0080                  _flags, ##__VA_ARGS__)
0081
0082 int amdgpu_pm_sysfs_init(struct amdgpu_device *adev);
0083 int amdgpu_pm_virt_sysfs_init(struct amdgpu_device *adev);
0084 void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev);
0085 void amdgpu_pm_virt_sysfs_fini(struct amdgpu_device *adev);
0086
0087 void amdgpu_debugfs_pm_init(struct amdgpu_device *adev);
0088
0089 #endif