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0001 /*
0002  * Copyright 2019 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 
0024 #ifndef __VANGOGH_IP_OFFSET_H__
0025 #define __VANGOGH_IP_OFFSET_H__
0026 
0027 #define MAX_INSTANCE                                        8
0028 #define MAX_SEGMENT                                         6
0029 
0030 
0031 struct IP_BASE_INSTANCE
0032 {
0033     unsigned int segment[MAX_SEGMENT];
0034 };
0035 
0036 struct IP_BASE
0037 {
0038     struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
0039 } __maybe_unused;
0040 
0041 
0042 static const struct IP_BASE ACP_BASE = { { { { 0x02403800, 0x00480000, 0, 0, 0, 0 } },
0043                                         { { 0, 0, 0, 0, 0, 0 } },
0044                                         { { 0, 0, 0, 0, 0, 0 } },
0045                                         { { 0, 0, 0, 0, 0, 0 } },
0046                                         { { 0, 0, 0, 0, 0, 0 } },
0047                                         { { 0, 0, 0, 0, 0, 0 } },
0048                                         { { 0, 0, 0, 0, 0, 0 } },
0049                                         { { 0, 0, 0, 0, 0, 0 } } } };
0050 static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x00013300, 0x02408C00, 0, 0, 0 } },
0051                                         { { 0, 0, 0, 0, 0, 0 } },
0052                                         { { 0, 0, 0, 0, 0, 0 } },
0053                                         { { 0, 0, 0, 0, 0, 0 } },
0054                                         { { 0, 0, 0, 0, 0, 0 } },
0055                                         { { 0, 0, 0, 0, 0, 0 } },
0056                                         { { 0, 0, 0, 0, 0, 0 } },
0057                                         { { 0, 0, 0, 0, 0, 0 } } } };
0058 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0, 0 } },
0059                                         { { 0x00016E00, 0x02401C00, 0, 0, 0, 0 } },
0060                                         { { 0x00017000, 0x02402000, 0, 0, 0, 0 } },
0061                                         { { 0x00017200, 0x02402400, 0, 0, 0, 0 } },
0062                                         { { 0x0001B000, 0x0242D800, 0, 0, 0, 0 } },
0063                                         { { 0x0001B200, 0x0242DC00, 0, 0, 0, 0 } },
0064                                         { { 0x0001B400, 0x0242E000, 0, 0, 0, 0 } },
0065                                         { { 0x00017E00, 0x0240BC00, 0, 0, 0, 0 } } } };
0066 static const struct IP_BASE DF_BASE = { { { { 0x00007000, 0x0240B800, 0, 0, 0, 0 } },
0067                                         { { 0, 0, 0, 0, 0, 0 } },
0068                                         { { 0, 0, 0, 0, 0, 0 } },
0069                                         { { 0, 0, 0, 0, 0, 0 } },
0070                                         { { 0, 0, 0, 0, 0, 0 } },
0071                                         { { 0, 0, 0, 0, 0, 0 } },
0072                                         { { 0, 0, 0, 0, 0, 0 } },
0073                                         { { 0, 0, 0, 0, 0, 0 } } } };
0074 static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } },
0075                                         { { 0, 0, 0, 0, 0, 0 } },
0076                                         { { 0, 0, 0, 0, 0, 0 } },
0077                                         { { 0, 0, 0, 0, 0, 0 } },
0078                                         { { 0, 0, 0, 0, 0, 0 } },
0079                                         { { 0, 0, 0, 0, 0, 0 } },
0080                                         { { 0, 0, 0, 0, 0, 0 } },
0081                                         { { 0, 0, 0, 0, 0, 0 } } } };
0082 static const struct IP_BASE DPCS_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } },
0083                                         { { 0, 0, 0, 0, 0, 0 } },
0084                                         { { 0, 0, 0, 0, 0, 0 } },
0085                                         { { 0, 0, 0, 0, 0, 0 } },
0086                                         { { 0, 0, 0, 0, 0, 0 } },
0087                                         { { 0, 0, 0, 0, 0, 0 } },
0088                                         { { 0, 0, 0, 0, 0, 0 } },
0089                                         { { 0, 0, 0, 0, 0, 0 } } } };
0090 static const struct IP_BASE FCH_BASE = { { { { 0x0240C000, 0x00B40000, 0x11000000, 0, 0, 0 } },
0091                                         { { 0, 0, 0, 0, 0, 0 } },
0092                                         { { 0, 0, 0, 0, 0, 0 } },
0093                                         { { 0, 0, 0, 0, 0, 0 } },
0094                                         { { 0, 0, 0, 0, 0, 0 } },
0095                                         { { 0, 0, 0, 0, 0, 0 } },
0096                                         { { 0, 0, 0, 0, 0, 0 } },
0097                                         { { 0, 0, 0, 0, 0, 0 } } } };
0098 static const struct IP_BASE FUSE_BASE = { { { { 0x00017400, 0x02401400, 0, 0, 0, 0 } },
0099                                         { { 0, 0, 0, 0, 0, 0 } },
0100                                         { { 0, 0, 0, 0, 0, 0 } },
0101                                         { { 0, 0, 0, 0, 0, 0 } },
0102                                         { { 0, 0, 0, 0, 0, 0 } },
0103                                         { { 0, 0, 0, 0, 0, 0 } },
0104                                         { { 0, 0, 0, 0, 0, 0 } },
0105                                         { { 0, 0, 0, 0, 0, 0 } } } };
0106 static const struct IP_BASE GC_BASE = { { { { 0x00001260, 0x0000A000, 0x02402C00, 0, 0, 0 } },
0107                                         { { 0, 0, 0, 0, 0, 0 } },
0108                                         { { 0, 0, 0, 0, 0, 0 } },
0109                                         { { 0, 0, 0, 0, 0, 0 } },
0110                                         { { 0, 0, 0, 0, 0, 0 } },
0111                                         { { 0, 0, 0, 0, 0, 0 } },
0112                                         { { 0, 0, 0, 0, 0, 0 } },
0113                                         { { 0, 0, 0, 0, 0, 0 } } } };
0114 static const struct IP_BASE HDP_BASE = { { { { 0x00000F20, 0x0240A400, 0, 0, 0, 0 } },
0115                                         { { 0, 0, 0, 0, 0, 0 } },
0116                                         { { 0, 0, 0, 0, 0, 0 } },
0117                                         { { 0, 0, 0, 0, 0, 0 } },
0118                                         { { 0, 0, 0, 0, 0, 0 } },
0119                                         { { 0, 0, 0, 0, 0, 0 } },
0120                                         { { 0, 0, 0, 0, 0, 0 } },
0121                                         { { 0, 0, 0, 0, 0, 0 } } } };
0122 static const struct IP_BASE ISP_BASE = { { { { 0x00018000, 0x0240B000, 0, 0, 0, 0 } },
0123                                         { { 0, 0, 0, 0, 0, 0 } },
0124                                         { { 0, 0, 0, 0, 0, 0 } },
0125                                         { { 0, 0, 0, 0, 0, 0 } },
0126                                         { { 0, 0, 0, 0, 0, 0 } },
0127                                         { { 0, 0, 0, 0, 0, 0 } },
0128                                         { { 0, 0, 0, 0, 0, 0 } },
0129                                         { { 0, 0, 0, 0, 0, 0 } } } };
0130 static const struct IP_BASE MMHUB_BASE = { { { { 0x00013200, 0x0001A000, 0x02408800, 0, 0, 0 } },
0131                                         { { 0, 0, 0, 0, 0, 0 } },
0132                                         { { 0, 0, 0, 0, 0, 0 } },
0133                                         { { 0, 0, 0, 0, 0, 0 } },
0134                                         { { 0, 0, 0, 0, 0, 0 } },
0135                                         { { 0, 0, 0, 0, 0, 0 } },
0136                                         { { 0, 0, 0, 0, 0, 0 } },
0137                                         { { 0, 0, 0, 0, 0, 0 } } } };
0138 static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x0243FC00, 0x00DC0000, 0x00E00000, 0x00E40000, 0 } },
0139                                         { { 0, 0, 0, 0, 0, 0 } },
0140                                         { { 0, 0, 0, 0, 0, 0 } },
0141                                         { { 0, 0, 0, 0, 0, 0 } },
0142                                         { { 0, 0, 0, 0, 0, 0 } },
0143                                         { { 0, 0, 0, 0, 0, 0 } },
0144                                         { { 0, 0, 0, 0, 0, 0 } },
0145                                         { { 0, 0, 0, 0, 0, 0 } } } };
0146 static const struct IP_BASE MP1_BASE = { { { { 0x00016000, 0x0243FC00, 0x00DC0000, 0x00E00000, 0x00E40000, 0 } },
0147                                         { { 0, 0, 0, 0, 0, 0 } },
0148                                         { { 0, 0, 0, 0, 0, 0 } },
0149                                         { { 0, 0, 0, 0, 0, 0 } },
0150                                         { { 0, 0, 0, 0, 0, 0 } },
0151                                         { { 0, 0, 0, 0, 0, 0 } },
0152                                         { { 0, 0, 0, 0, 0, 0 } },
0153                                         { { 0, 0, 0, 0, 0, 0 } } } };
0154 static const struct IP_BASE MP2_BASE = { { { { 0x00016400, 0x02400800, 0x00F40000, 0x00F80000, 0x00FC0000, 0 } },
0155                                         { { 0, 0, 0, 0, 0, 0 } },
0156                                         { { 0, 0, 0, 0, 0, 0 } },
0157                                         { { 0, 0, 0, 0, 0, 0 } },
0158                                         { { 0, 0, 0, 0, 0, 0 } },
0159                                         { { 0, 0, 0, 0, 0, 0 } },
0160                                         { { 0, 0, 0, 0, 0, 0 } },
0161                                         { { 0, 0, 0, 0, 0, 0 } } } };
0162 static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0241B000, 0x04040000 } },
0163                                         { { 0, 0, 0, 0, 0, 0 } },
0164                                         { { 0, 0, 0, 0, 0, 0 } },
0165                                         { { 0, 0, 0, 0, 0, 0 } },
0166                                         { { 0, 0, 0, 0, 0, 0 } },
0167                                         { { 0, 0, 0, 0, 0, 0 } },
0168                                         { { 0, 0, 0, 0, 0, 0 } },
0169                                         { { 0, 0, 0, 0, 0, 0 } } } };
0170 static const struct IP_BASE OSSSYS_BASE = { { { { 0x000010A0, 0x0240A000, 0, 0, 0, 0 } },
0171                                         { { 0, 0, 0, 0, 0, 0 } },
0172                                         { { 0, 0, 0, 0, 0, 0 } },
0173                                         { { 0, 0, 0, 0, 0, 0 } },
0174                                         { { 0, 0, 0, 0, 0, 0 } },
0175                                         { { 0, 0, 0, 0, 0, 0 } },
0176                                         { { 0, 0, 0, 0, 0, 0 } },
0177                                         { { 0, 0, 0, 0, 0, 0 } } } };
0178 static const struct IP_BASE PCIE0_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0241B000, 0x04040000 } },
0179                                         { { 0, 0, 0, 0, 0, 0 } },
0180                                         { { 0, 0, 0, 0, 0, 0 } },
0181                                         { { 0, 0, 0, 0, 0, 0 } },
0182                                         { { 0, 0, 0, 0, 0, 0 } },
0183                                         { { 0, 0, 0, 0, 0, 0 } },
0184                                         { { 0, 0, 0, 0, 0, 0 } },
0185                                         { { 0, 0, 0, 0, 0, 0 } } } };
0186 static const struct IP_BASE SMUIO_BASE = { { { { 0x00016800, 0x00016A00, 0x02401000, 0x00440000, 0, 0 } },
0187                                         { { 0x0001BC00, 0x0242D400, 0, 0, 0, 0 } },
0188                                         { { 0, 0, 0, 0, 0, 0 } },
0189                                         { { 0, 0, 0, 0, 0, 0 } },
0190                                         { { 0, 0, 0, 0, 0, 0 } },
0191                                         { { 0, 0, 0, 0, 0, 0 } },
0192                                         { { 0, 0, 0, 0, 0, 0 } },
0193                                         { { 0, 0, 0, 0, 0, 0 } } } };
0194 static const struct IP_BASE THM_BASE = { { { { 0x00016600, 0x02400C00, 0, 0, 0, 0 } },
0195                                         { { 0, 0, 0, 0, 0, 0 } },
0196                                         { { 0, 0, 0, 0, 0, 0 } },
0197                                         { { 0, 0, 0, 0, 0, 0 } },
0198                                         { { 0, 0, 0, 0, 0, 0 } },
0199                                         { { 0, 0, 0, 0, 0, 0 } },
0200                                         { { 0, 0, 0, 0, 0, 0 } },
0201                                         { { 0, 0, 0, 0, 0, 0 } } } };
0202 static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0x02425800, 0, 0, 0, 0 } },
0203                                         { { 0x00054000, 0x02425C00, 0, 0, 0, 0 } },
0204                                         { { 0x00094000, 0x02426000, 0, 0, 0, 0 } },
0205                                         { { 0x000D4000, 0x02426400, 0, 0, 0, 0 } },
0206                                         { { 0, 0, 0, 0, 0, 0 } },
0207                                         { { 0, 0, 0, 0, 0, 0 } },
0208                                         { { 0, 0, 0, 0, 0, 0 } },
0209                                         { { 0, 0, 0, 0, 0, 0 } } } };
0210 static const struct IP_BASE USB_BASE = { { { { 0x0242A800, 0x05B00000, 0, 0, 0, 0 } },
0211                                         { { 0x0242AC00, 0x05B80000, 0, 0, 0, 0 } },
0212                                         { { 0x0242B000, 0x05C00000, 0, 0, 0, 0 } },
0213                                         { { 0, 0, 0, 0, 0, 0 } },
0214                                         { { 0, 0, 0, 0, 0, 0 } },
0215                                         { { 0, 0, 0, 0, 0, 0 } },
0216                                         { { 0, 0, 0, 0, 0, 0 } },
0217                                         { { 0, 0, 0, 0, 0, 0 } } } };
0218 static const struct IP_BASE VCN_BASE = { { { { 0x00007800, 0x00007E00, 0x02403000, 0, 0, 0 } },
0219                                         { { 0, 0, 0, 0, 0, 0 } },
0220                                         { { 0, 0, 0, 0, 0, 0 } },
0221                                         { { 0, 0, 0, 0, 0, 0 } },
0222                                         { { 0, 0, 0, 0, 0, 0 } },
0223                                         { { 0, 0, 0, 0, 0, 0 } },
0224                                         { { 0, 0, 0, 0, 0, 0 } },
0225                                         { { 0, 0, 0, 0, 0, 0 } } } };
0226 
0227 
0228 #define ACP_BASE__INST0_SEG0                       0x02403800
0229 #define ACP_BASE__INST0_SEG1                       0x00480000
0230 #define ACP_BASE__INST0_SEG2                       0
0231 #define ACP_BASE__INST0_SEG3                       0
0232 #define ACP_BASE__INST0_SEG4                       0
0233 #define ACP_BASE__INST0_SEG5                       0
0234 
0235 #define ACP_BASE__INST1_SEG0                       0
0236 #define ACP_BASE__INST1_SEG1                       0
0237 #define ACP_BASE__INST1_SEG2                       0
0238 #define ACP_BASE__INST1_SEG3                       0
0239 #define ACP_BASE__INST1_SEG4                       0
0240 #define ACP_BASE__INST1_SEG5                       0
0241 
0242 #define ACP_BASE__INST2_SEG0                       0
0243 #define ACP_BASE__INST2_SEG1                       0
0244 #define ACP_BASE__INST2_SEG2                       0
0245 #define ACP_BASE__INST2_SEG3                       0
0246 #define ACP_BASE__INST2_SEG4                       0
0247 #define ACP_BASE__INST2_SEG5                       0
0248 
0249 #define ACP_BASE__INST3_SEG0                       0
0250 #define ACP_BASE__INST3_SEG1                       0
0251 #define ACP_BASE__INST3_SEG2                       0
0252 #define ACP_BASE__INST3_SEG3                       0
0253 #define ACP_BASE__INST3_SEG4                       0
0254 #define ACP_BASE__INST3_SEG5                       0
0255 
0256 #define ACP_BASE__INST4_SEG0                       0
0257 #define ACP_BASE__INST4_SEG1                       0
0258 #define ACP_BASE__INST4_SEG2                       0
0259 #define ACP_BASE__INST4_SEG3                       0
0260 #define ACP_BASE__INST4_SEG4                       0
0261 #define ACP_BASE__INST4_SEG5                       0
0262 
0263 #define ACP_BASE__INST5_SEG0                       0
0264 #define ACP_BASE__INST5_SEG1                       0
0265 #define ACP_BASE__INST5_SEG2                       0
0266 #define ACP_BASE__INST5_SEG3                       0
0267 #define ACP_BASE__INST5_SEG4                       0
0268 #define ACP_BASE__INST5_SEG5                       0
0269 
0270 #define ACP_BASE__INST6_SEG0                       0
0271 #define ACP_BASE__INST6_SEG1                       0
0272 #define ACP_BASE__INST6_SEG2                       0
0273 #define ACP_BASE__INST6_SEG3                       0
0274 #define ACP_BASE__INST6_SEG4                       0
0275 #define ACP_BASE__INST6_SEG5                       0
0276 
0277 #define ACP_BASE__INST7_SEG0                       0
0278 #define ACP_BASE__INST7_SEG1                       0
0279 #define ACP_BASE__INST7_SEG2                       0
0280 #define ACP_BASE__INST7_SEG3                       0
0281 #define ACP_BASE__INST7_SEG4                       0
0282 #define ACP_BASE__INST7_SEG5                       0
0283 
0284 #define ATHUB_BASE__INST0_SEG0                     0x00000C00
0285 #define ATHUB_BASE__INST0_SEG1                     0x00013300
0286 #define ATHUB_BASE__INST0_SEG2                     0x02408C00
0287 #define ATHUB_BASE__INST0_SEG3                     0
0288 #define ATHUB_BASE__INST0_SEG4                     0
0289 #define ATHUB_BASE__INST0_SEG5                     0
0290 
0291 #define ATHUB_BASE__INST1_SEG0                     0
0292 #define ATHUB_BASE__INST1_SEG1                     0
0293 #define ATHUB_BASE__INST1_SEG2                     0
0294 #define ATHUB_BASE__INST1_SEG3                     0
0295 #define ATHUB_BASE__INST1_SEG4                     0
0296 #define ATHUB_BASE__INST1_SEG5                     0
0297 
0298 #define ATHUB_BASE__INST2_SEG0                     0
0299 #define ATHUB_BASE__INST2_SEG1                     0
0300 #define ATHUB_BASE__INST2_SEG2                     0
0301 #define ATHUB_BASE__INST2_SEG3                     0
0302 #define ATHUB_BASE__INST2_SEG4                     0
0303 #define ATHUB_BASE__INST2_SEG5                     0
0304 
0305 #define ATHUB_BASE__INST3_SEG0                     0
0306 #define ATHUB_BASE__INST3_SEG1                     0
0307 #define ATHUB_BASE__INST3_SEG2                     0
0308 #define ATHUB_BASE__INST3_SEG3                     0
0309 #define ATHUB_BASE__INST3_SEG4                     0
0310 #define ATHUB_BASE__INST3_SEG5                     0
0311 
0312 #define ATHUB_BASE__INST4_SEG0                     0
0313 #define ATHUB_BASE__INST4_SEG1                     0
0314 #define ATHUB_BASE__INST4_SEG2                     0
0315 #define ATHUB_BASE__INST4_SEG3                     0
0316 #define ATHUB_BASE__INST4_SEG4                     0
0317 #define ATHUB_BASE__INST4_SEG5                     0
0318 
0319 #define ATHUB_BASE__INST5_SEG0                     0
0320 #define ATHUB_BASE__INST5_SEG1                     0
0321 #define ATHUB_BASE__INST5_SEG2                     0
0322 #define ATHUB_BASE__INST5_SEG3                     0
0323 #define ATHUB_BASE__INST5_SEG4                     0
0324 #define ATHUB_BASE__INST5_SEG5                     0
0325 
0326 #define ATHUB_BASE__INST6_SEG0                     0
0327 #define ATHUB_BASE__INST6_SEG1                     0
0328 #define ATHUB_BASE__INST6_SEG2                     0
0329 #define ATHUB_BASE__INST6_SEG3                     0
0330 #define ATHUB_BASE__INST6_SEG4                     0
0331 #define ATHUB_BASE__INST6_SEG5                     0
0332 
0333 #define ATHUB_BASE__INST7_SEG0                     0
0334 #define ATHUB_BASE__INST7_SEG1                     0
0335 #define ATHUB_BASE__INST7_SEG2                     0
0336 #define ATHUB_BASE__INST7_SEG3                     0
0337 #define ATHUB_BASE__INST7_SEG4                     0
0338 #define ATHUB_BASE__INST7_SEG5                     0
0339 
0340 #define CLK_BASE__INST0_SEG0                       0x00016C00
0341 #define CLK_BASE__INST0_SEG1                       0x02401800
0342 #define CLK_BASE__INST0_SEG2                       0
0343 #define CLK_BASE__INST0_SEG3                       0
0344 #define CLK_BASE__INST0_SEG4                       0
0345 #define CLK_BASE__INST0_SEG5                       0
0346 
0347 #define CLK_BASE__INST1_SEG0                       0x00016E00
0348 #define CLK_BASE__INST1_SEG1                       0x02401C00
0349 #define CLK_BASE__INST1_SEG2                       0
0350 #define CLK_BASE__INST1_SEG3                       0
0351 #define CLK_BASE__INST1_SEG4                       0
0352 #define CLK_BASE__INST1_SEG5                       0
0353 
0354 #define CLK_BASE__INST2_SEG0                       0x00017000
0355 #define CLK_BASE__INST2_SEG1                       0x02402000
0356 #define CLK_BASE__INST2_SEG2                       0
0357 #define CLK_BASE__INST2_SEG3                       0
0358 #define CLK_BASE__INST2_SEG4                       0
0359 #define CLK_BASE__INST2_SEG5                       0
0360 
0361 #define CLK_BASE__INST3_SEG0                       0x00017200
0362 #define CLK_BASE__INST3_SEG1                       0x02402400
0363 #define CLK_BASE__INST3_SEG2                       0
0364 #define CLK_BASE__INST3_SEG3                       0
0365 #define CLK_BASE__INST3_SEG4                       0
0366 #define CLK_BASE__INST3_SEG5                       0
0367 
0368 #define CLK_BASE__INST4_SEG0                       0x0001B000
0369 #define CLK_BASE__INST4_SEG1                       0x0242D800
0370 #define CLK_BASE__INST4_SEG2                       0
0371 #define CLK_BASE__INST4_SEG3                       0
0372 #define CLK_BASE__INST4_SEG4                       0
0373 #define CLK_BASE__INST4_SEG5                       0
0374 
0375 #define CLK_BASE__INST5_SEG0                       0x0001B200
0376 #define CLK_BASE__INST5_SEG1                       0x0242DC00
0377 #define CLK_BASE__INST5_SEG2                       0
0378 #define CLK_BASE__INST5_SEG3                       0
0379 #define CLK_BASE__INST5_SEG4                       0
0380 #define CLK_BASE__INST5_SEG5                       0
0381 
0382 #define CLK_BASE__INST6_SEG0                       0x0001B400
0383 #define CLK_BASE__INST6_SEG1                       0x0242E000
0384 #define CLK_BASE__INST6_SEG2                       0
0385 #define CLK_BASE__INST6_SEG3                       0
0386 #define CLK_BASE__INST6_SEG4                       0
0387 #define CLK_BASE__INST6_SEG5                       0
0388 
0389 #define CLK_BASE__INST7_SEG0                       0x00017E00
0390 #define CLK_BASE__INST7_SEG1                       0x0240BC00
0391 #define CLK_BASE__INST7_SEG2                       0
0392 #define CLK_BASE__INST7_SEG3                       0
0393 #define CLK_BASE__INST7_SEG4                       0
0394 #define CLK_BASE__INST7_SEG5                       0
0395 
0396 #define DF_BASE__INST0_SEG0                        0x00007000
0397 #define DF_BASE__INST0_SEG1                        0x0240B800
0398 #define DF_BASE__INST0_SEG2                        0
0399 #define DF_BASE__INST0_SEG3                        0
0400 #define DF_BASE__INST0_SEG4                        0
0401 #define DF_BASE__INST0_SEG5                        0
0402 
0403 #define DF_BASE__INST1_SEG0                        0
0404 #define DF_BASE__INST1_SEG1                        0
0405 #define DF_BASE__INST1_SEG2                        0
0406 #define DF_BASE__INST1_SEG3                        0
0407 #define DF_BASE__INST1_SEG4                        0
0408 #define DF_BASE__INST1_SEG5                        0
0409 
0410 #define DF_BASE__INST2_SEG0                        0
0411 #define DF_BASE__INST2_SEG1                        0
0412 #define DF_BASE__INST2_SEG2                        0
0413 #define DF_BASE__INST2_SEG3                        0
0414 #define DF_BASE__INST2_SEG4                        0
0415 #define DF_BASE__INST2_SEG5                        0
0416 
0417 #define DF_BASE__INST3_SEG0                        0
0418 #define DF_BASE__INST3_SEG1                        0
0419 #define DF_BASE__INST3_SEG2                        0
0420 #define DF_BASE__INST3_SEG3                        0
0421 #define DF_BASE__INST3_SEG4                        0
0422 #define DF_BASE__INST3_SEG5                        0
0423 
0424 #define DF_BASE__INST4_SEG0                        0
0425 #define DF_BASE__INST4_SEG1                        0
0426 #define DF_BASE__INST4_SEG2                        0
0427 #define DF_BASE__INST4_SEG3                        0
0428 #define DF_BASE__INST4_SEG4                        0
0429 #define DF_BASE__INST4_SEG5                        0
0430 
0431 #define DF_BASE__INST5_SEG0                        0
0432 #define DF_BASE__INST5_SEG1                        0
0433 #define DF_BASE__INST5_SEG2                        0
0434 #define DF_BASE__INST5_SEG3                        0
0435 #define DF_BASE__INST5_SEG4                        0
0436 #define DF_BASE__INST5_SEG5                        0
0437 
0438 #define DF_BASE__INST6_SEG0                        0
0439 #define DF_BASE__INST6_SEG1                        0
0440 #define DF_BASE__INST6_SEG2                        0
0441 #define DF_BASE__INST6_SEG3                        0
0442 #define DF_BASE__INST6_SEG4                        0
0443 #define DF_BASE__INST6_SEG5                        0
0444 
0445 #define DF_BASE__INST7_SEG0                        0
0446 #define DF_BASE__INST7_SEG1                        0
0447 #define DF_BASE__INST7_SEG2                        0
0448 #define DF_BASE__INST7_SEG3                        0
0449 #define DF_BASE__INST7_SEG4                        0
0450 #define DF_BASE__INST7_SEG5                        0
0451 
0452 #define DCN_BASE__INST0_SEG0                       0x00000012
0453 #define DCN_BASE__INST0_SEG1                       0x000000C0
0454 #define DCN_BASE__INST0_SEG2                       0x000034C0
0455 #define DCN_BASE__INST0_SEG3                       0x00009000
0456 #define DCN_BASE__INST0_SEG4                       0x02403C00
0457 #define DCN_BASE__INST0_SEG5                       0
0458 
0459 #define DCN_BASE__INST1_SEG0                       0
0460 #define DCN_BASE__INST1_SEG1                       0
0461 #define DCN_BASE__INST1_SEG2                       0
0462 #define DCN_BASE__INST1_SEG3                       0
0463 #define DCN_BASE__INST1_SEG4                       0
0464 #define DCN_BASE__INST1_SEG5                       0
0465 
0466 #define DCN_BASE__INST2_SEG0                       0
0467 #define DCN_BASE__INST2_SEG1                       0
0468 #define DCN_BASE__INST2_SEG2                       0
0469 #define DCN_BASE__INST2_SEG3                       0
0470 #define DCN_BASE__INST2_SEG4                       0
0471 #define DCN_BASE__INST2_SEG5                       0
0472 
0473 #define DCN_BASE__INST3_SEG0                       0
0474 #define DCN_BASE__INST3_SEG1                       0
0475 #define DCN_BASE__INST3_SEG2                       0
0476 #define DCN_BASE__INST3_SEG3                       0
0477 #define DCN_BASE__INST3_SEG4                       0
0478 #define DCN_BASE__INST3_SEG5                       0
0479 
0480 #define DCN_BASE__INST4_SEG0                       0
0481 #define DCN_BASE__INST4_SEG1                       0
0482 #define DCN_BASE__INST4_SEG2                       0
0483 #define DCN_BASE__INST4_SEG3                       0
0484 #define DCN_BASE__INST4_SEG4                       0
0485 #define DCN_BASE__INST4_SEG5                       0
0486 
0487 #define DCN_BASE__INST5_SEG0                       0
0488 #define DCN_BASE__INST5_SEG1                       0
0489 #define DCN_BASE__INST5_SEG2                       0
0490 #define DCN_BASE__INST5_SEG3                       0
0491 #define DCN_BASE__INST5_SEG4                       0
0492 #define DCN_BASE__INST5_SEG5                       0
0493 
0494 #define DCN_BASE__INST6_SEG0                       0
0495 #define DCN_BASE__INST6_SEG1                       0
0496 #define DCN_BASE__INST6_SEG2                       0
0497 #define DCN_BASE__INST6_SEG3                       0
0498 #define DCN_BASE__INST6_SEG4                       0
0499 #define DCN_BASE__INST6_SEG5                       0
0500 
0501 #define DCN_BASE__INST7_SEG0                       0
0502 #define DCN_BASE__INST7_SEG1                       0
0503 #define DCN_BASE__INST7_SEG2                       0
0504 #define DCN_BASE__INST7_SEG3                       0
0505 #define DCN_BASE__INST7_SEG4                       0
0506 #define DCN_BASE__INST7_SEG5                       0
0507 
0508 #define DPCS_BASE__INST0_SEG0                      0x00000012
0509 #define DPCS_BASE__INST0_SEG1                      0x000000C0
0510 #define DPCS_BASE__INST0_SEG2                      0x000034C0
0511 #define DPCS_BASE__INST0_SEG3                      0x00009000
0512 #define DPCS_BASE__INST0_SEG4                      0x02403C00
0513 #define DPCS_BASE__INST0_SEG5                      0
0514 
0515 #define DPCS_BASE__INST1_SEG0                      0
0516 #define DPCS_BASE__INST1_SEG1                      0
0517 #define DPCS_BASE__INST1_SEG2                      0
0518 #define DPCS_BASE__INST1_SEG3                      0
0519 #define DPCS_BASE__INST1_SEG4                      0
0520 #define DPCS_BASE__INST1_SEG5                      0
0521 
0522 #define DPCS_BASE__INST2_SEG0                      0
0523 #define DPCS_BASE__INST2_SEG1                      0
0524 #define DPCS_BASE__INST2_SEG2                      0
0525 #define DPCS_BASE__INST2_SEG3                      0
0526 #define DPCS_BASE__INST2_SEG4                      0
0527 #define DPCS_BASE__INST2_SEG5                      0
0528 
0529 #define DPCS_BASE__INST3_SEG0                      0
0530 #define DPCS_BASE__INST3_SEG1                      0
0531 #define DPCS_BASE__INST3_SEG2                      0
0532 #define DPCS_BASE__INST3_SEG3                      0
0533 #define DPCS_BASE__INST3_SEG4                      0
0534 #define DPCS_BASE__INST3_SEG5                      0
0535 
0536 #define DPCS_BASE__INST4_SEG0                      0
0537 #define DPCS_BASE__INST4_SEG1                      0
0538 #define DPCS_BASE__INST4_SEG2                      0
0539 #define DPCS_BASE__INST4_SEG3                      0
0540 #define DPCS_BASE__INST4_SEG4                      0
0541 #define DPCS_BASE__INST4_SEG5                      0
0542 
0543 #define DPCS_BASE__INST5_SEG0                      0
0544 #define DPCS_BASE__INST5_SEG1                      0
0545 #define DPCS_BASE__INST5_SEG2                      0
0546 #define DPCS_BASE__INST5_SEG3                      0
0547 #define DPCS_BASE__INST5_SEG4                      0
0548 #define DPCS_BASE__INST5_SEG5                      0
0549 
0550 #define DPCS_BASE__INST6_SEG0                      0
0551 #define DPCS_BASE__INST6_SEG1                      0
0552 #define DPCS_BASE__INST6_SEG2                      0
0553 #define DPCS_BASE__INST6_SEG3                      0
0554 #define DPCS_BASE__INST6_SEG4                      0
0555 #define DPCS_BASE__INST6_SEG5                      0
0556 
0557 #define DPCS_BASE__INST7_SEG0                      0
0558 #define DPCS_BASE__INST7_SEG1                      0
0559 #define DPCS_BASE__INST7_SEG2                      0
0560 #define DPCS_BASE__INST7_SEG3                      0
0561 #define DPCS_BASE__INST7_SEG4                      0
0562 #define DPCS_BASE__INST7_SEG5                      0
0563 
0564 #define FCH_BASE__INST0_SEG0                       0x0240C000
0565 #define FCH_BASE__INST0_SEG1                       0x00B40000
0566 #define FCH_BASE__INST0_SEG2                       0x11000000
0567 #define FCH_BASE__INST0_SEG3                       0
0568 #define FCH_BASE__INST0_SEG4                       0
0569 #define FCH_BASE__INST0_SEG5                       0
0570 
0571 #define FCH_BASE__INST1_SEG0                       0
0572 #define FCH_BASE__INST1_SEG1                       0
0573 #define FCH_BASE__INST1_SEG2                       0
0574 #define FCH_BASE__INST1_SEG3                       0
0575 #define FCH_BASE__INST1_SEG4                       0
0576 #define FCH_BASE__INST1_SEG5                       0
0577 
0578 #define FCH_BASE__INST2_SEG0                       0
0579 #define FCH_BASE__INST2_SEG1                       0
0580 #define FCH_BASE__INST2_SEG2                       0
0581 #define FCH_BASE__INST2_SEG3                       0
0582 #define FCH_BASE__INST2_SEG4                       0
0583 #define FCH_BASE__INST2_SEG5                       0
0584 
0585 #define FCH_BASE__INST3_SEG0                       0
0586 #define FCH_BASE__INST3_SEG1                       0
0587 #define FCH_BASE__INST3_SEG2                       0
0588 #define FCH_BASE__INST3_SEG3                       0
0589 #define FCH_BASE__INST3_SEG4                       0
0590 #define FCH_BASE__INST3_SEG5                       0
0591 
0592 #define FCH_BASE__INST4_SEG0                       0
0593 #define FCH_BASE__INST4_SEG1                       0
0594 #define FCH_BASE__INST4_SEG2                       0
0595 #define FCH_BASE__INST4_SEG3                       0
0596 #define FCH_BASE__INST4_SEG4                       0
0597 #define FCH_BASE__INST4_SEG5                       0
0598 
0599 #define FCH_BASE__INST5_SEG0                       0
0600 #define FCH_BASE__INST5_SEG1                       0
0601 #define FCH_BASE__INST5_SEG2                       0
0602 #define FCH_BASE__INST5_SEG3                       0
0603 #define FCH_BASE__INST5_SEG4                       0
0604 #define FCH_BASE__INST5_SEG5                       0
0605 
0606 #define FCH_BASE__INST6_SEG0                       0
0607 #define FCH_BASE__INST6_SEG1                       0
0608 #define FCH_BASE__INST6_SEG2                       0
0609 #define FCH_BASE__INST6_SEG3                       0
0610 #define FCH_BASE__INST6_SEG4                       0
0611 #define FCH_BASE__INST6_SEG5                       0
0612 
0613 #define FCH_BASE__INST7_SEG0                       0
0614 #define FCH_BASE__INST7_SEG1                       0
0615 #define FCH_BASE__INST7_SEG2                       0
0616 #define FCH_BASE__INST7_SEG3                       0
0617 #define FCH_BASE__INST7_SEG4                       0
0618 #define FCH_BASE__INST7_SEG5                       0
0619 
0620 #define FUSE_BASE__INST0_SEG0                      0x00017400
0621 #define FUSE_BASE__INST0_SEG1                      0x02401400
0622 #define FUSE_BASE__INST0_SEG2                      0
0623 #define FUSE_BASE__INST0_SEG3                      0
0624 #define FUSE_BASE__INST0_SEG4                      0
0625 #define FUSE_BASE__INST0_SEG5                      0
0626 
0627 #define FUSE_BASE__INST1_SEG0                      0
0628 #define FUSE_BASE__INST1_SEG1                      0
0629 #define FUSE_BASE__INST1_SEG2                      0
0630 #define FUSE_BASE__INST1_SEG3                      0
0631 #define FUSE_BASE__INST1_SEG4                      0
0632 #define FUSE_BASE__INST1_SEG5                      0
0633 
0634 #define FUSE_BASE__INST2_SEG0                      0
0635 #define FUSE_BASE__INST2_SEG1                      0
0636 #define FUSE_BASE__INST2_SEG2                      0
0637 #define FUSE_BASE__INST2_SEG3                      0
0638 #define FUSE_BASE__INST2_SEG4                      0
0639 #define FUSE_BASE__INST2_SEG5                      0
0640 
0641 #define FUSE_BASE__INST3_SEG0                      0
0642 #define FUSE_BASE__INST3_SEG1                      0
0643 #define FUSE_BASE__INST3_SEG2                      0
0644 #define FUSE_BASE__INST3_SEG3                      0
0645 #define FUSE_BASE__INST3_SEG4                      0
0646 #define FUSE_BASE__INST3_SEG5                      0
0647 
0648 #define FUSE_BASE__INST4_SEG0                      0
0649 #define FUSE_BASE__INST4_SEG1                      0
0650 #define FUSE_BASE__INST4_SEG2                      0
0651 #define FUSE_BASE__INST4_SEG3                      0
0652 #define FUSE_BASE__INST4_SEG4                      0
0653 #define FUSE_BASE__INST4_SEG5                      0
0654 
0655 #define FUSE_BASE__INST5_SEG0                      0
0656 #define FUSE_BASE__INST5_SEG1                      0
0657 #define FUSE_BASE__INST5_SEG2                      0
0658 #define FUSE_BASE__INST5_SEG3                      0
0659 #define FUSE_BASE__INST5_SEG4                      0
0660 #define FUSE_BASE__INST5_SEG5                      0
0661 
0662 #define FUSE_BASE__INST6_SEG0                      0
0663 #define FUSE_BASE__INST6_SEG1                      0
0664 #define FUSE_BASE__INST6_SEG2                      0
0665 #define FUSE_BASE__INST6_SEG3                      0
0666 #define FUSE_BASE__INST6_SEG4                      0
0667 #define FUSE_BASE__INST6_SEG5                      0
0668 
0669 #define FUSE_BASE__INST7_SEG0                      0
0670 #define FUSE_BASE__INST7_SEG1                      0
0671 #define FUSE_BASE__INST7_SEG2                      0
0672 #define FUSE_BASE__INST7_SEG3                      0
0673 #define FUSE_BASE__INST7_SEG4                      0
0674 #define FUSE_BASE__INST7_SEG5                      0
0675 
0676 #define GC_BASE__INST0_SEG0                        0x00001260
0677 #define GC_BASE__INST0_SEG1                        0x0000A000
0678 #define GC_BASE__INST0_SEG2                        0x02402C00
0679 #define GC_BASE__INST0_SEG3                        0
0680 #define GC_BASE__INST0_SEG4                        0
0681 #define GC_BASE__INST0_SEG5                        0
0682 
0683 #define GC_BASE__INST1_SEG0                        0
0684 #define GC_BASE__INST1_SEG1                        0
0685 #define GC_BASE__INST1_SEG2                        0
0686 #define GC_BASE__INST1_SEG3                        0
0687 #define GC_BASE__INST1_SEG4                        0
0688 #define GC_BASE__INST1_SEG5                        0
0689 
0690 #define GC_BASE__INST2_SEG0                        0
0691 #define GC_BASE__INST2_SEG1                        0
0692 #define GC_BASE__INST2_SEG2                        0
0693 #define GC_BASE__INST2_SEG3                        0
0694 #define GC_BASE__INST2_SEG4                        0
0695 #define GC_BASE__INST2_SEG5                        0
0696 
0697 #define GC_BASE__INST3_SEG0                        0
0698 #define GC_BASE__INST3_SEG1                        0
0699 #define GC_BASE__INST3_SEG2                        0
0700 #define GC_BASE__INST3_SEG3                        0
0701 #define GC_BASE__INST3_SEG4                        0
0702 #define GC_BASE__INST3_SEG5                        0
0703 
0704 #define GC_BASE__INST4_SEG0                        0
0705 #define GC_BASE__INST4_SEG1                        0
0706 #define GC_BASE__INST4_SEG2                        0
0707 #define GC_BASE__INST4_SEG3                        0
0708 #define GC_BASE__INST4_SEG4                        0
0709 #define GC_BASE__INST4_SEG5                        0
0710 
0711 #define GC_BASE__INST5_SEG0                        0
0712 #define GC_BASE__INST5_SEG1                        0
0713 #define GC_BASE__INST5_SEG2                        0
0714 #define GC_BASE__INST5_SEG3                        0
0715 #define GC_BASE__INST5_SEG4                        0
0716 #define GC_BASE__INST5_SEG5                        0
0717 
0718 #define GC_BASE__INST6_SEG0                        0
0719 #define GC_BASE__INST6_SEG1                        0
0720 #define GC_BASE__INST6_SEG2                        0
0721 #define GC_BASE__INST6_SEG3                        0
0722 #define GC_BASE__INST6_SEG4                        0
0723 #define GC_BASE__INST6_SEG5                        0
0724 
0725 #define GC_BASE__INST7_SEG0                        0
0726 #define GC_BASE__INST7_SEG1                        0
0727 #define GC_BASE__INST7_SEG2                        0
0728 #define GC_BASE__INST7_SEG3                        0
0729 #define GC_BASE__INST7_SEG4                        0
0730 #define GC_BASE__INST7_SEG5                        0
0731 
0732 #define HDP_BASE__INST0_SEG0                       0x00000F20
0733 #define HDP_BASE__INST0_SEG1                       0x0240A400
0734 #define HDP_BASE__INST0_SEG2                       0
0735 #define HDP_BASE__INST0_SEG3                       0
0736 #define HDP_BASE__INST0_SEG4                       0
0737 #define HDP_BASE__INST0_SEG5                       0
0738 
0739 #define HDP_BASE__INST1_SEG0                       0
0740 #define HDP_BASE__INST1_SEG1                       0
0741 #define HDP_BASE__INST1_SEG2                       0
0742 #define HDP_BASE__INST1_SEG3                       0
0743 #define HDP_BASE__INST1_SEG4                       0
0744 #define HDP_BASE__INST1_SEG5                       0
0745 
0746 #define HDP_BASE__INST2_SEG0                       0
0747 #define HDP_BASE__INST2_SEG1                       0
0748 #define HDP_BASE__INST2_SEG2                       0
0749 #define HDP_BASE__INST2_SEG3                       0
0750 #define HDP_BASE__INST2_SEG4                       0
0751 #define HDP_BASE__INST2_SEG5                       0
0752 
0753 #define HDP_BASE__INST3_SEG0                       0
0754 #define HDP_BASE__INST3_SEG1                       0
0755 #define HDP_BASE__INST3_SEG2                       0
0756 #define HDP_BASE__INST3_SEG3                       0
0757 #define HDP_BASE__INST3_SEG4                       0
0758 #define HDP_BASE__INST3_SEG5                       0
0759 
0760 #define HDP_BASE__INST4_SEG0                       0
0761 #define HDP_BASE__INST4_SEG1                       0
0762 #define HDP_BASE__INST4_SEG2                       0
0763 #define HDP_BASE__INST4_SEG3                       0
0764 #define HDP_BASE__INST4_SEG4                       0
0765 #define HDP_BASE__INST4_SEG5                       0
0766 
0767 #define HDP_BASE__INST5_SEG0                       0
0768 #define HDP_BASE__INST5_SEG1                       0
0769 #define HDP_BASE__INST5_SEG2                       0
0770 #define HDP_BASE__INST5_SEG3                       0
0771 #define HDP_BASE__INST5_SEG4                       0
0772 #define HDP_BASE__INST5_SEG5                       0
0773 
0774 #define HDP_BASE__INST6_SEG0                       0
0775 #define HDP_BASE__INST6_SEG1                       0
0776 #define HDP_BASE__INST6_SEG2                       0
0777 #define HDP_BASE__INST6_SEG3                       0
0778 #define HDP_BASE__INST6_SEG4                       0
0779 #define HDP_BASE__INST6_SEG5                       0
0780 
0781 #define HDP_BASE__INST7_SEG0                       0
0782 #define HDP_BASE__INST7_SEG1                       0
0783 #define HDP_BASE__INST7_SEG2                       0
0784 #define HDP_BASE__INST7_SEG3                       0
0785 #define HDP_BASE__INST7_SEG4                       0
0786 #define HDP_BASE__INST7_SEG5                       0
0787 
0788 #define ISP_BASE__INST0_SEG0                       0x00018000
0789 #define ISP_BASE__INST0_SEG1                       0x0240B000
0790 #define ISP_BASE__INST0_SEG2                       0
0791 #define ISP_BASE__INST0_SEG3                       0
0792 #define ISP_BASE__INST0_SEG4                       0
0793 #define ISP_BASE__INST0_SEG5                       0
0794 
0795 #define ISP_BASE__INST1_SEG0                       0
0796 #define ISP_BASE__INST1_SEG1                       0
0797 #define ISP_BASE__INST1_SEG2                       0
0798 #define ISP_BASE__INST1_SEG3                       0
0799 #define ISP_BASE__INST1_SEG4                       0
0800 #define ISP_BASE__INST1_SEG5                       0
0801 
0802 #define ISP_BASE__INST2_SEG0                       0
0803 #define ISP_BASE__INST2_SEG1                       0
0804 #define ISP_BASE__INST2_SEG2                       0
0805 #define ISP_BASE__INST2_SEG3                       0
0806 #define ISP_BASE__INST2_SEG4                       0
0807 #define ISP_BASE__INST2_SEG5                       0
0808 
0809 #define ISP_BASE__INST3_SEG0                       0
0810 #define ISP_BASE__INST3_SEG1                       0
0811 #define ISP_BASE__INST3_SEG2                       0
0812 #define ISP_BASE__INST3_SEG3                       0
0813 #define ISP_BASE__INST3_SEG4                       0
0814 #define ISP_BASE__INST3_SEG5                       0
0815 
0816 #define ISP_BASE__INST4_SEG0                       0
0817 #define ISP_BASE__INST4_SEG1                       0
0818 #define ISP_BASE__INST4_SEG2                       0
0819 #define ISP_BASE__INST4_SEG3                       0
0820 #define ISP_BASE__INST4_SEG4                       0
0821 #define ISP_BASE__INST4_SEG5                       0
0822 
0823 #define ISP_BASE__INST5_SEG0                       0
0824 #define ISP_BASE__INST5_SEG1                       0
0825 #define ISP_BASE__INST5_SEG2                       0
0826 #define ISP_BASE__INST5_SEG3                       0
0827 #define ISP_BASE__INST5_SEG4                       0
0828 #define ISP_BASE__INST5_SEG5                       0
0829 
0830 #define ISP_BASE__INST6_SEG0                       0
0831 #define ISP_BASE__INST6_SEG1                       0
0832 #define ISP_BASE__INST6_SEG2                       0
0833 #define ISP_BASE__INST6_SEG3                       0
0834 #define ISP_BASE__INST6_SEG4                       0
0835 #define ISP_BASE__INST6_SEG5                       0
0836 
0837 #define ISP_BASE__INST7_SEG0                       0
0838 #define ISP_BASE__INST7_SEG1                       0
0839 #define ISP_BASE__INST7_SEG2                       0
0840 #define ISP_BASE__INST7_SEG3                       0
0841 #define ISP_BASE__INST7_SEG4                       0
0842 #define ISP_BASE__INST7_SEG5                       0
0843 
0844 #define MMHUB_BASE__INST0_SEG0                     0x00013200
0845 #define MMHUB_BASE__INST0_SEG1                     0x0001A000
0846 #define MMHUB_BASE__INST0_SEG2                     0x02408800
0847 #define MMHUB_BASE__INST0_SEG3                     0
0848 #define MMHUB_BASE__INST0_SEG4                     0
0849 #define MMHUB_BASE__INST0_SEG5                     0
0850 
0851 #define MMHUB_BASE__INST1_SEG0                     0
0852 #define MMHUB_BASE__INST1_SEG1                     0
0853 #define MMHUB_BASE__INST1_SEG2                     0
0854 #define MMHUB_BASE__INST1_SEG3                     0
0855 #define MMHUB_BASE__INST1_SEG4                     0
0856 #define MMHUB_BASE__INST1_SEG5                     0
0857 
0858 #define MMHUB_BASE__INST2_SEG0                     0
0859 #define MMHUB_BASE__INST2_SEG1                     0
0860 #define MMHUB_BASE__INST2_SEG2                     0
0861 #define MMHUB_BASE__INST2_SEG3                     0
0862 #define MMHUB_BASE__INST2_SEG4                     0
0863 #define MMHUB_BASE__INST2_SEG5                     0
0864 
0865 #define MMHUB_BASE__INST3_SEG0                     0
0866 #define MMHUB_BASE__INST3_SEG1                     0
0867 #define MMHUB_BASE__INST3_SEG2                     0
0868 #define MMHUB_BASE__INST3_SEG3                     0
0869 #define MMHUB_BASE__INST3_SEG4                     0
0870 #define MMHUB_BASE__INST3_SEG5                     0
0871 
0872 #define MMHUB_BASE__INST4_SEG0                     0
0873 #define MMHUB_BASE__INST4_SEG1                     0
0874 #define MMHUB_BASE__INST4_SEG2                     0
0875 #define MMHUB_BASE__INST4_SEG3                     0
0876 #define MMHUB_BASE__INST4_SEG4                     0
0877 #define MMHUB_BASE__INST4_SEG5                     0
0878 
0879 #define MMHUB_BASE__INST5_SEG0                     0
0880 #define MMHUB_BASE__INST5_SEG1                     0
0881 #define MMHUB_BASE__INST5_SEG2                     0
0882 #define MMHUB_BASE__INST5_SEG3                     0
0883 #define MMHUB_BASE__INST5_SEG4                     0
0884 #define MMHUB_BASE__INST5_SEG5                     0
0885 
0886 #define MMHUB_BASE__INST6_SEG0                     0
0887 #define MMHUB_BASE__INST6_SEG1                     0
0888 #define MMHUB_BASE__INST6_SEG2                     0
0889 #define MMHUB_BASE__INST6_SEG3                     0
0890 #define MMHUB_BASE__INST6_SEG4                     0
0891 #define MMHUB_BASE__INST6_SEG5                     0
0892 
0893 #define MMHUB_BASE__INST7_SEG0                     0
0894 #define MMHUB_BASE__INST7_SEG1                     0
0895 #define MMHUB_BASE__INST7_SEG2                     0
0896 #define MMHUB_BASE__INST7_SEG3                     0
0897 #define MMHUB_BASE__INST7_SEG4                     0
0898 #define MMHUB_BASE__INST7_SEG5                     0
0899 
0900 #define MP0_BASE__INST0_SEG0                       0x00016000
0901 #define MP0_BASE__INST0_SEG1                       0x0243FC00
0902 #define MP0_BASE__INST0_SEG2                       0x00DC0000
0903 #define MP0_BASE__INST0_SEG3                       0x00E00000
0904 #define MP0_BASE__INST0_SEG4                       0x00E40000
0905 #define MP0_BASE__INST0_SEG5                       0
0906 
0907 #define MP0_BASE__INST1_SEG0                       0
0908 #define MP0_BASE__INST1_SEG1                       0
0909 #define MP0_BASE__INST1_SEG2                       0
0910 #define MP0_BASE__INST1_SEG3                       0
0911 #define MP0_BASE__INST1_SEG4                       0
0912 #define MP0_BASE__INST1_SEG5                       0
0913 
0914 #define MP0_BASE__INST2_SEG0                       0
0915 #define MP0_BASE__INST2_SEG1                       0
0916 #define MP0_BASE__INST2_SEG2                       0
0917 #define MP0_BASE__INST2_SEG3                       0
0918 #define MP0_BASE__INST2_SEG4                       0
0919 #define MP0_BASE__INST2_SEG5                       0
0920 
0921 #define MP0_BASE__INST3_SEG0                       0
0922 #define MP0_BASE__INST3_SEG1                       0
0923 #define MP0_BASE__INST3_SEG2                       0
0924 #define MP0_BASE__INST3_SEG3                       0
0925 #define MP0_BASE__INST3_SEG4                       0
0926 #define MP0_BASE__INST3_SEG5                       0
0927 
0928 #define MP0_BASE__INST4_SEG0                       0
0929 #define MP0_BASE__INST4_SEG1                       0
0930 #define MP0_BASE__INST4_SEG2                       0
0931 #define MP0_BASE__INST4_SEG3                       0
0932 #define MP0_BASE__INST4_SEG4                       0
0933 #define MP0_BASE__INST4_SEG5                       0
0934 
0935 #define MP0_BASE__INST5_SEG0                       0
0936 #define MP0_BASE__INST5_SEG1                       0
0937 #define MP0_BASE__INST5_SEG2                       0
0938 #define MP0_BASE__INST5_SEG3                       0
0939 #define MP0_BASE__INST5_SEG4                       0
0940 #define MP0_BASE__INST5_SEG5                       0
0941 
0942 #define MP0_BASE__INST6_SEG0                       0
0943 #define MP0_BASE__INST6_SEG1                       0
0944 #define MP0_BASE__INST6_SEG2                       0
0945 #define MP0_BASE__INST6_SEG3                       0
0946 #define MP0_BASE__INST6_SEG4                       0
0947 #define MP0_BASE__INST6_SEG5                       0
0948 
0949 #define MP0_BASE__INST7_SEG0                       0
0950 #define MP0_BASE__INST7_SEG1                       0
0951 #define MP0_BASE__INST7_SEG2                       0
0952 #define MP0_BASE__INST7_SEG3                       0
0953 #define MP0_BASE__INST7_SEG4                       0
0954 #define MP0_BASE__INST7_SEG5                       0
0955 
0956 #define MP1_BASE__INST0_SEG0                       0x00016000
0957 #define MP1_BASE__INST0_SEG1                       0x0243FC00
0958 #define MP1_BASE__INST0_SEG2                       0x00DC0000
0959 #define MP1_BASE__INST0_SEG3                       0x00E00000
0960 #define MP1_BASE__INST0_SEG4                       0x00E40000
0961 #define MP1_BASE__INST0_SEG5                       0
0962 
0963 #define MP1_BASE__INST1_SEG0                       0
0964 #define MP1_BASE__INST1_SEG1                       0
0965 #define MP1_BASE__INST1_SEG2                       0
0966 #define MP1_BASE__INST1_SEG3                       0
0967 #define MP1_BASE__INST1_SEG4                       0
0968 #define MP1_BASE__INST1_SEG5                       0
0969 
0970 #define MP1_BASE__INST2_SEG0                       0
0971 #define MP1_BASE__INST2_SEG1                       0
0972 #define MP1_BASE__INST2_SEG2                       0
0973 #define MP1_BASE__INST2_SEG3                       0
0974 #define MP1_BASE__INST2_SEG4                       0
0975 #define MP1_BASE__INST2_SEG5                       0
0976 
0977 #define MP1_BASE__INST3_SEG0                       0
0978 #define MP1_BASE__INST3_SEG1                       0
0979 #define MP1_BASE__INST3_SEG2                       0
0980 #define MP1_BASE__INST3_SEG3                       0
0981 #define MP1_BASE__INST3_SEG4                       0
0982 #define MP1_BASE__INST3_SEG5                       0
0983 
0984 #define MP1_BASE__INST4_SEG0                       0
0985 #define MP1_BASE__INST4_SEG1                       0
0986 #define MP1_BASE__INST4_SEG2                       0
0987 #define MP1_BASE__INST4_SEG3                       0
0988 #define MP1_BASE__INST4_SEG4                       0
0989 #define MP1_BASE__INST4_SEG5                       0
0990 
0991 #define MP1_BASE__INST5_SEG0                       0
0992 #define MP1_BASE__INST5_SEG1                       0
0993 #define MP1_BASE__INST5_SEG2                       0
0994 #define MP1_BASE__INST5_SEG3                       0
0995 #define MP1_BASE__INST5_SEG4                       0
0996 #define MP1_BASE__INST5_SEG5                       0
0997 
0998 #define MP1_BASE__INST6_SEG0                       0
0999 #define MP1_BASE__INST6_SEG1                       0
1000 #define MP1_BASE__INST6_SEG2                       0
1001 #define MP1_BASE__INST6_SEG3                       0
1002 #define MP1_BASE__INST6_SEG4                       0
1003 #define MP1_BASE__INST6_SEG5                       0
1004 
1005 #define MP1_BASE__INST7_SEG0                       0
1006 #define MP1_BASE__INST7_SEG1                       0
1007 #define MP1_BASE__INST7_SEG2                       0
1008 #define MP1_BASE__INST7_SEG3                       0
1009 #define MP1_BASE__INST7_SEG4                       0
1010 #define MP1_BASE__INST7_SEG5                       0
1011 
1012 #define MP2_BASE__INST0_SEG0                       0x00016400
1013 #define MP2_BASE__INST0_SEG1                       0x02400800
1014 #define MP2_BASE__INST0_SEG2                       0x00F40000
1015 #define MP2_BASE__INST0_SEG3                       0x00F80000
1016 #define MP2_BASE__INST0_SEG4                       0x00FC0000
1017 #define MP2_BASE__INST0_SEG5                       0
1018 
1019 #define MP2_BASE__INST1_SEG0                       0
1020 #define MP2_BASE__INST1_SEG1                       0
1021 #define MP2_BASE__INST1_SEG2                       0
1022 #define MP2_BASE__INST1_SEG3                       0
1023 #define MP2_BASE__INST1_SEG4                       0
1024 #define MP2_BASE__INST1_SEG5                       0
1025 
1026 #define MP2_BASE__INST2_SEG0                       0
1027 #define MP2_BASE__INST2_SEG1                       0
1028 #define MP2_BASE__INST2_SEG2                       0
1029 #define MP2_BASE__INST2_SEG3                       0
1030 #define MP2_BASE__INST2_SEG4                       0
1031 #define MP2_BASE__INST2_SEG5                       0
1032 
1033 #define MP2_BASE__INST3_SEG0                       0
1034 #define MP2_BASE__INST3_SEG1                       0
1035 #define MP2_BASE__INST3_SEG2                       0
1036 #define MP2_BASE__INST3_SEG3                       0
1037 #define MP2_BASE__INST3_SEG4                       0
1038 #define MP2_BASE__INST3_SEG5                       0
1039 
1040 #define MP2_BASE__INST4_SEG0                       0
1041 #define MP2_BASE__INST4_SEG1                       0
1042 #define MP2_BASE__INST4_SEG2                       0
1043 #define MP2_BASE__INST4_SEG3                       0
1044 #define MP2_BASE__INST4_SEG4                       0
1045 #define MP2_BASE__INST4_SEG5                       0
1046 
1047 #define MP2_BASE__INST5_SEG0                       0
1048 #define MP2_BASE__INST5_SEG1                       0
1049 #define MP2_BASE__INST5_SEG2                       0
1050 #define MP2_BASE__INST5_SEG3                       0
1051 #define MP2_BASE__INST5_SEG4                       0
1052 #define MP2_BASE__INST5_SEG5                       0
1053 
1054 #define MP2_BASE__INST6_SEG0                       0
1055 #define MP2_BASE__INST6_SEG1                       0
1056 #define MP2_BASE__INST6_SEG2                       0
1057 #define MP2_BASE__INST6_SEG3                       0
1058 #define MP2_BASE__INST6_SEG4                       0
1059 #define MP2_BASE__INST6_SEG5                       0
1060 
1061 #define MP2_BASE__INST7_SEG0                       0
1062 #define MP2_BASE__INST7_SEG1                       0
1063 #define MP2_BASE__INST7_SEG2                       0
1064 #define MP2_BASE__INST7_SEG3                       0
1065 #define MP2_BASE__INST7_SEG4                       0
1066 #define MP2_BASE__INST7_SEG5                       0
1067 
1068 #define NBIO_BASE__INST0_SEG0                      0x00000000
1069 #define NBIO_BASE__INST0_SEG1                      0x00000014
1070 #define NBIO_BASE__INST0_SEG2                      0x00000D20
1071 #define NBIO_BASE__INST0_SEG3                      0x00010400
1072 #define NBIO_BASE__INST0_SEG4                      0x0241B000
1073 #define NBIO_BASE__INST0_SEG5                      0x04040000
1074 
1075 #define NBIO_BASE__INST1_SEG0                      0
1076 #define NBIO_BASE__INST1_SEG1                      0
1077 #define NBIO_BASE__INST1_SEG2                      0
1078 #define NBIO_BASE__INST1_SEG3                      0
1079 #define NBIO_BASE__INST1_SEG4                      0
1080 #define NBIO_BASE__INST1_SEG5                      0
1081 
1082 #define NBIO_BASE__INST2_SEG0                      0
1083 #define NBIO_BASE__INST2_SEG1                      0
1084 #define NBIO_BASE__INST2_SEG2                      0
1085 #define NBIO_BASE__INST2_SEG3                      0
1086 #define NBIO_BASE__INST2_SEG4                      0
1087 #define NBIO_BASE__INST2_SEG5                      0
1088 
1089 #define NBIO_BASE__INST3_SEG0                      0
1090 #define NBIO_BASE__INST3_SEG1                      0
1091 #define NBIO_BASE__INST3_SEG2                      0
1092 #define NBIO_BASE__INST3_SEG3                      0
1093 #define NBIO_BASE__INST3_SEG4                      0
1094 #define NBIO_BASE__INST3_SEG5                      0
1095 
1096 #define NBIO_BASE__INST4_SEG0                      0
1097 #define NBIO_BASE__INST4_SEG1                      0
1098 #define NBIO_BASE__INST4_SEG2                      0
1099 #define NBIO_BASE__INST4_SEG3                      0
1100 #define NBIO_BASE__INST4_SEG4                      0
1101 #define NBIO_BASE__INST4_SEG5                      0
1102 
1103 #define NBIO_BASE__INST5_SEG0                      0
1104 #define NBIO_BASE__INST5_SEG1                      0
1105 #define NBIO_BASE__INST5_SEG2                      0
1106 #define NBIO_BASE__INST5_SEG3                      0
1107 #define NBIO_BASE__INST5_SEG4                      0
1108 #define NBIO_BASE__INST5_SEG5                      0
1109 
1110 #define NBIO_BASE__INST6_SEG0                      0
1111 #define NBIO_BASE__INST6_SEG1                      0
1112 #define NBIO_BASE__INST6_SEG2                      0
1113 #define NBIO_BASE__INST6_SEG3                      0
1114 #define NBIO_BASE__INST6_SEG4                      0
1115 #define NBIO_BASE__INST6_SEG5                      0
1116 
1117 #define NBIO_BASE__INST7_SEG0                      0
1118 #define NBIO_BASE__INST7_SEG1                      0
1119 #define NBIO_BASE__INST7_SEG2                      0
1120 #define NBIO_BASE__INST7_SEG3                      0
1121 #define NBIO_BASE__INST7_SEG4                      0
1122 #define NBIO_BASE__INST7_SEG5                      0
1123 
1124 #define OSSSYS_BASE__INST0_SEG0                    0x000010A0
1125 #define OSSSYS_BASE__INST0_SEG1                    0x0240A000
1126 #define OSSSYS_BASE__INST0_SEG2                    0
1127 #define OSSSYS_BASE__INST0_SEG3                    0
1128 #define OSSSYS_BASE__INST0_SEG4                    0
1129 #define OSSSYS_BASE__INST0_SEG5                    0
1130 
1131 #define OSSSYS_BASE__INST1_SEG0                    0
1132 #define OSSSYS_BASE__INST1_SEG1                    0
1133 #define OSSSYS_BASE__INST1_SEG2                    0
1134 #define OSSSYS_BASE__INST1_SEG3                    0
1135 #define OSSSYS_BASE__INST1_SEG4                    0
1136 #define OSSSYS_BASE__INST1_SEG5                    0
1137 
1138 #define OSSSYS_BASE__INST2_SEG0                    0
1139 #define OSSSYS_BASE__INST2_SEG1                    0
1140 #define OSSSYS_BASE__INST2_SEG2                    0
1141 #define OSSSYS_BASE__INST2_SEG3                    0
1142 #define OSSSYS_BASE__INST2_SEG4                    0
1143 #define OSSSYS_BASE__INST2_SEG5                    0
1144 
1145 #define OSSSYS_BASE__INST3_SEG0                    0
1146 #define OSSSYS_BASE__INST3_SEG1                    0
1147 #define OSSSYS_BASE__INST3_SEG2                    0
1148 #define OSSSYS_BASE__INST3_SEG3                    0
1149 #define OSSSYS_BASE__INST3_SEG4                    0
1150 #define OSSSYS_BASE__INST3_SEG5                    0
1151 
1152 #define OSSSYS_BASE__INST4_SEG0                    0
1153 #define OSSSYS_BASE__INST4_SEG1                    0
1154 #define OSSSYS_BASE__INST4_SEG2                    0
1155 #define OSSSYS_BASE__INST4_SEG3                    0
1156 #define OSSSYS_BASE__INST4_SEG4                    0
1157 #define OSSSYS_BASE__INST4_SEG5                    0
1158 
1159 #define OSSSYS_BASE__INST5_SEG0                    0
1160 #define OSSSYS_BASE__INST5_SEG1                    0
1161 #define OSSSYS_BASE__INST5_SEG2                    0
1162 #define OSSSYS_BASE__INST5_SEG3                    0
1163 #define OSSSYS_BASE__INST5_SEG4                    0
1164 #define OSSSYS_BASE__INST5_SEG5                    0
1165 
1166 #define OSSSYS_BASE__INST6_SEG0                    0
1167 #define OSSSYS_BASE__INST6_SEG1                    0
1168 #define OSSSYS_BASE__INST6_SEG2                    0
1169 #define OSSSYS_BASE__INST6_SEG3                    0
1170 #define OSSSYS_BASE__INST6_SEG4                    0
1171 #define OSSSYS_BASE__INST6_SEG5                    0
1172 
1173 #define OSSSYS_BASE__INST7_SEG0                    0
1174 #define OSSSYS_BASE__INST7_SEG1                    0
1175 #define OSSSYS_BASE__INST7_SEG2                    0
1176 #define OSSSYS_BASE__INST7_SEG3                    0
1177 #define OSSSYS_BASE__INST7_SEG4                    0
1178 #define OSSSYS_BASE__INST7_SEG5                    0
1179 
1180 #define PCIE0_BASE__INST0_SEG0                     0x00000000
1181 #define PCIE0_BASE__INST0_SEG1                     0x00000014
1182 #define PCIE0_BASE__INST0_SEG2                     0x00000D20
1183 #define PCIE0_BASE__INST0_SEG3                     0x00010400
1184 #define PCIE0_BASE__INST0_SEG4                     0x0241B000
1185 #define PCIE0_BASE__INST0_SEG5                     0x04040000
1186 
1187 #define PCIE0_BASE__INST1_SEG0                     0
1188 #define PCIE0_BASE__INST1_SEG1                     0
1189 #define PCIE0_BASE__INST1_SEG2                     0
1190 #define PCIE0_BASE__INST1_SEG3                     0
1191 #define PCIE0_BASE__INST1_SEG4                     0
1192 #define PCIE0_BASE__INST1_SEG5                     0
1193 
1194 #define PCIE0_BASE__INST2_SEG0                     0
1195 #define PCIE0_BASE__INST2_SEG1                     0
1196 #define PCIE0_BASE__INST2_SEG2                     0
1197 #define PCIE0_BASE__INST2_SEG3                     0
1198 #define PCIE0_BASE__INST2_SEG4                     0
1199 #define PCIE0_BASE__INST2_SEG5                     0
1200 
1201 #define PCIE0_BASE__INST3_SEG0                     0
1202 #define PCIE0_BASE__INST3_SEG1                     0
1203 #define PCIE0_BASE__INST3_SEG2                     0
1204 #define PCIE0_BASE__INST3_SEG3                     0
1205 #define PCIE0_BASE__INST3_SEG4                     0
1206 #define PCIE0_BASE__INST3_SEG5                     0
1207 
1208 #define PCIE0_BASE__INST4_SEG0                     0
1209 #define PCIE0_BASE__INST4_SEG1                     0
1210 #define PCIE0_BASE__INST4_SEG2                     0
1211 #define PCIE0_BASE__INST4_SEG3                     0
1212 #define PCIE0_BASE__INST4_SEG4                     0
1213 #define PCIE0_BASE__INST4_SEG5                     0
1214 
1215 #define PCIE0_BASE__INST5_SEG0                     0
1216 #define PCIE0_BASE__INST5_SEG1                     0
1217 #define PCIE0_BASE__INST5_SEG2                     0
1218 #define PCIE0_BASE__INST5_SEG3                     0
1219 #define PCIE0_BASE__INST5_SEG4                     0
1220 #define PCIE0_BASE__INST5_SEG5                     0
1221 
1222 #define PCIE0_BASE__INST6_SEG0                     0
1223 #define PCIE0_BASE__INST6_SEG1                     0
1224 #define PCIE0_BASE__INST6_SEG2                     0
1225 #define PCIE0_BASE__INST6_SEG3                     0
1226 #define PCIE0_BASE__INST6_SEG4                     0
1227 #define PCIE0_BASE__INST6_SEG5                     0
1228 
1229 #define PCIE0_BASE__INST7_SEG0                     0
1230 #define PCIE0_BASE__INST7_SEG1                     0
1231 #define PCIE0_BASE__INST7_SEG2                     0
1232 #define PCIE0_BASE__INST7_SEG3                     0
1233 #define PCIE0_BASE__INST7_SEG4                     0
1234 #define PCIE0_BASE__INST7_SEG5                     0
1235 
1236 #define SMUIO_BASE__INST0_SEG0                      0x00016800
1237 #define SMUIO_BASE__INST0_SEG1                      0x00016A00
1238 #define SMUIO_BASE__INST0_SEG2                      0x02401000
1239 #define SMUIO_BASE__INST0_SEG3                      0x00440000
1240 #define SMUIO_BASE__INST0_SEG4                      0
1241 #define SMUIO_BASE__INST0_SEG5                      0
1242 
1243 #define SMUIO_BASE__INST1_SEG0                      0x0001BC00
1244 #define SMUIO_BASE__INST1_SEG1                      0x0242D400
1245 #define SMUIO_BASE__INST1_SEG2                      0
1246 #define SMUIO_BASE__INST1_SEG3                      0
1247 #define SMUIO_BASE__INST1_SEG4                      0
1248 #define SMUIO_BASE__INST1_SEG5                      0
1249 
1250 #define SMUIO_BASE__INST2_SEG0                      0
1251 #define SMUIO_BASE__INST2_SEG1                      0
1252 #define SMUIO_BASE__INST2_SEG2                      0
1253 #define SMUIO_BASE__INST2_SEG3                      0
1254 #define SMUIO_BASE__INST2_SEG4                      0
1255 #define SMUIO_BASE__INST2_SEG5                      0
1256 
1257 #define SMUIO_BASE__INST3_SEG0                      0
1258 #define SMUIO_BASE__INST3_SEG1                      0
1259 #define SMUIO_BASE__INST3_SEG2                      0
1260 #define SMUIO_BASE__INST3_SEG3                      0
1261 #define SMUIO_BASE__INST3_SEG4                      0
1262 #define SMUIO_BASE__INST3_SEG5                      0
1263 
1264 #define SMUIO_BASE__INST4_SEG0                      0
1265 #define SMUIO_BASE__INST4_SEG1                      0
1266 #define SMUIO_BASE__INST4_SEG2                      0
1267 #define SMUIO_BASE__INST4_SEG3                      0
1268 #define SMUIO_BASE__INST4_SEG4                      0
1269 #define SMUIO_BASE__INST4_SEG5                      0
1270 
1271 #define SMUIO_BASE__INST5_SEG0                      0
1272 #define SMUIO_BASE__INST5_SEG1                      0
1273 #define SMUIO_BASE__INST5_SEG2                      0
1274 #define SMUIO_BASE__INST5_SEG3                      0
1275 #define SMUIO_BASE__INST5_SEG4                      0
1276 #define SMUIO_BASE__INST5_SEG5                      0
1277 
1278 #define SMUIO_BASE__INST6_SEG0                      0
1279 #define SMUIO_BASE__INST6_SEG1                      0
1280 #define SMUIO_BASE__INST6_SEG2                      0
1281 #define SMUIO_BASE__INST6_SEG3                      0
1282 #define SMUIO_BASE__INST6_SEG4                      0
1283 #define SMUIO_BASE__INST6_SEG5                      0
1284 
1285 #define SMUIO_BASE__INST7_SEG0                      0
1286 #define SMUIO_BASE__INST7_SEG1                      0
1287 #define SMUIO_BASE__INST7_SEG2                      0
1288 #define SMUIO_BASE__INST7_SEG3                      0
1289 #define SMUIO_BASE__INST7_SEG4                      0
1290 #define SMUIO_BASE__INST7_SEG5                      0
1291 
1292 #define THM_BASE__INST0_SEG0                       0x00016600
1293 #define THM_BASE__INST0_SEG1                       0x02400C00
1294 #define THM_BASE__INST0_SEG2                       0
1295 #define THM_BASE__INST0_SEG3                       0
1296 #define THM_BASE__INST0_SEG4                       0
1297 #define THM_BASE__INST0_SEG5                       0
1298 
1299 #define THM_BASE__INST1_SEG0                       0
1300 #define THM_BASE__INST1_SEG1                       0
1301 #define THM_BASE__INST1_SEG2                       0
1302 #define THM_BASE__INST1_SEG3                       0
1303 #define THM_BASE__INST1_SEG4                       0
1304 #define THM_BASE__INST1_SEG5                       0
1305 
1306 #define THM_BASE__INST2_SEG0                       0
1307 #define THM_BASE__INST2_SEG1                       0
1308 #define THM_BASE__INST2_SEG2                       0
1309 #define THM_BASE__INST2_SEG3                       0
1310 #define THM_BASE__INST2_SEG4                       0
1311 #define THM_BASE__INST2_SEG5                       0
1312 
1313 #define THM_BASE__INST3_SEG0                       0
1314 #define THM_BASE__INST3_SEG1                       0
1315 #define THM_BASE__INST3_SEG2                       0
1316 #define THM_BASE__INST3_SEG3                       0
1317 #define THM_BASE__INST3_SEG4                       0
1318 #define THM_BASE__INST3_SEG5                       0
1319 
1320 #define THM_BASE__INST4_SEG0                       0
1321 #define THM_BASE__INST4_SEG1                       0
1322 #define THM_BASE__INST4_SEG2                       0
1323 #define THM_BASE__INST4_SEG3                       0
1324 #define THM_BASE__INST4_SEG4                       0
1325 #define THM_BASE__INST4_SEG5                       0
1326 
1327 #define THM_BASE__INST5_SEG0                       0
1328 #define THM_BASE__INST5_SEG1                       0
1329 #define THM_BASE__INST5_SEG2                       0
1330 #define THM_BASE__INST5_SEG3                       0
1331 #define THM_BASE__INST5_SEG4                       0
1332 #define THM_BASE__INST5_SEG5                       0
1333 
1334 #define THM_BASE__INST6_SEG0                       0
1335 #define THM_BASE__INST6_SEG1                       0
1336 #define THM_BASE__INST6_SEG2                       0
1337 #define THM_BASE__INST6_SEG3                       0
1338 #define THM_BASE__INST6_SEG4                       0
1339 #define THM_BASE__INST6_SEG5                       0
1340 
1341 #define THM_BASE__INST7_SEG0                       0
1342 #define THM_BASE__INST7_SEG1                       0
1343 #define THM_BASE__INST7_SEG2                       0
1344 #define THM_BASE__INST7_SEG3                       0
1345 #define THM_BASE__INST7_SEG4                       0
1346 #define THM_BASE__INST7_SEG5                       0
1347 
1348 #define UMC_BASE__INST0_SEG0                       0x00014000
1349 #define UMC_BASE__INST0_SEG1                       0x02425800
1350 #define UMC_BASE__INST0_SEG2                       0
1351 #define UMC_BASE__INST0_SEG3                       0
1352 #define UMC_BASE__INST0_SEG4                       0
1353 #define UMC_BASE__INST0_SEG5                       0
1354 
1355 #define UMC_BASE__INST1_SEG0                       0x00054000
1356 #define UMC_BASE__INST1_SEG1                       0x02425C00
1357 #define UMC_BASE__INST1_SEG2                       0
1358 #define UMC_BASE__INST1_SEG3                       0
1359 #define UMC_BASE__INST1_SEG4                       0
1360 #define UMC_BASE__INST1_SEG5                       0
1361 
1362 #define UMC_BASE__INST2_SEG0                       0x00094000
1363 #define UMC_BASE__INST2_SEG1                       0x02426000
1364 #define UMC_BASE__INST2_SEG2                       0
1365 #define UMC_BASE__INST2_SEG3                       0
1366 #define UMC_BASE__INST2_SEG4                       0
1367 #define UMC_BASE__INST2_SEG5                       0
1368 
1369 #define UMC_BASE__INST3_SEG0                       0x000D4000
1370 #define UMC_BASE__INST3_SEG1                       0x02426400
1371 #define UMC_BASE__INST3_SEG2                       0
1372 #define UMC_BASE__INST3_SEG3                       0
1373 #define UMC_BASE__INST3_SEG4                       0
1374 #define UMC_BASE__INST3_SEG5                       0
1375 
1376 #define UMC_BASE__INST4_SEG0                       0
1377 #define UMC_BASE__INST4_SEG1                       0
1378 #define UMC_BASE__INST4_SEG2                       0
1379 #define UMC_BASE__INST4_SEG3                       0
1380 #define UMC_BASE__INST4_SEG4                       0
1381 #define UMC_BASE__INST4_SEG5                       0
1382 
1383 #define UMC_BASE__INST5_SEG0                       0
1384 #define UMC_BASE__INST5_SEG1                       0
1385 #define UMC_BASE__INST5_SEG2                       0
1386 #define UMC_BASE__INST5_SEG3                       0
1387 #define UMC_BASE__INST5_SEG4                       0
1388 #define UMC_BASE__INST5_SEG5                       0
1389 
1390 #define UMC_BASE__INST6_SEG0                       0
1391 #define UMC_BASE__INST6_SEG1                       0
1392 #define UMC_BASE__INST6_SEG2                       0
1393 #define UMC_BASE__INST6_SEG3                       0
1394 #define UMC_BASE__INST6_SEG4                       0
1395 #define UMC_BASE__INST6_SEG5                       0
1396 
1397 #define UMC_BASE__INST7_SEG0                       0
1398 #define UMC_BASE__INST7_SEG1                       0
1399 #define UMC_BASE__INST7_SEG2                       0
1400 #define UMC_BASE__INST7_SEG3                       0
1401 #define UMC_BASE__INST7_SEG4                       0
1402 #define UMC_BASE__INST7_SEG5                       0
1403 
1404 #define USB_BASE__INST0_SEG0                       0x0242A800
1405 #define USB_BASE__INST0_SEG1                       0x05B00000
1406 #define USB_BASE__INST0_SEG2                       0
1407 #define USB_BASE__INST0_SEG3                       0
1408 #define USB_BASE__INST0_SEG4                       0
1409 #define USB_BASE__INST0_SEG5                       0
1410 
1411 #define USB_BASE__INST1_SEG0                       0x0242AC00
1412 #define USB_BASE__INST1_SEG1                       0x05B80000
1413 #define USB_BASE__INST1_SEG2                       0
1414 #define USB_BASE__INST1_SEG3                       0
1415 #define USB_BASE__INST1_SEG4                       0
1416 #define USB_BASE__INST1_SEG5                       0
1417 
1418 #define USB_BASE__INST2_SEG0                       0x0242B000
1419 #define USB_BASE__INST2_SEG1                       0x05C00000
1420 #define USB_BASE__INST2_SEG2                       0
1421 #define USB_BASE__INST2_SEG3                       0
1422 #define USB_BASE__INST2_SEG4                       0
1423 #define USB_BASE__INST2_SEG5                       0
1424 
1425 #define USB_BASE__INST3_SEG0                       0
1426 #define USB_BASE__INST3_SEG1                       0
1427 #define USB_BASE__INST3_SEG2                       0
1428 #define USB_BASE__INST3_SEG3                       0
1429 #define USB_BASE__INST3_SEG4                       0
1430 #define USB_BASE__INST3_SEG5                       0
1431 
1432 #define USB_BASE__INST4_SEG0                       0
1433 #define USB_BASE__INST4_SEG1                       0
1434 #define USB_BASE__INST4_SEG2                       0
1435 #define USB_BASE__INST4_SEG3                       0
1436 #define USB_BASE__INST4_SEG4                       0
1437 #define USB_BASE__INST4_SEG5                       0
1438 
1439 #define USB_BASE__INST5_SEG0                       0
1440 #define USB_BASE__INST5_SEG1                       0
1441 #define USB_BASE__INST5_SEG2                       0
1442 #define USB_BASE__INST5_SEG3                       0
1443 #define USB_BASE__INST5_SEG4                       0
1444 #define USB_BASE__INST5_SEG5                       0
1445 
1446 #define USB_BASE__INST6_SEG0                       0
1447 #define USB_BASE__INST6_SEG1                       0
1448 #define USB_BASE__INST6_SEG2                       0
1449 #define USB_BASE__INST6_SEG3                       0
1450 #define USB_BASE__INST6_SEG4                       0
1451 #define USB_BASE__INST6_SEG5                       0
1452 
1453 #define USB_BASE__INST7_SEG0                       0
1454 #define USB_BASE__INST7_SEG1                       0
1455 #define USB_BASE__INST7_SEG2                       0
1456 #define USB_BASE__INST7_SEG3                       0
1457 #define USB_BASE__INST7_SEG4                       0
1458 #define USB_BASE__INST7_SEG5                       0
1459 
1460 #define VCN_BASE__INST0_SEG0                      0x00007800
1461 #define VCN_BASE__INST0_SEG1                      0x00007E00
1462 #define VCN_BASE__INST0_SEG2                      0x02403000
1463 #define VCN_BASE__INST0_SEG3                      0
1464 #define VCN_BASE__INST0_SEG4                      0
1465 #define VCN_BASE__INST0_SEG5                      0
1466 
1467 #define VCN_BASE__INST1_SEG0                      0
1468 #define VCN_BASE__INST1_SEG1                      0
1469 #define VCN_BASE__INST1_SEG2                      0
1470 #define VCN_BASE__INST1_SEG3                      0
1471 #define VCN_BASE__INST1_SEG4                      0
1472 #define VCN_BASE__INST1_SEG5                      0
1473 
1474 #define VCN_BASE__INST2_SEG0                      0
1475 #define VCN_BASE__INST2_SEG1                      0
1476 #define VCN_BASE__INST2_SEG2                      0
1477 #define VCN_BASE__INST2_SEG3                      0
1478 #define VCN_BASE__INST2_SEG4                      0
1479 #define VCN_BASE__INST2_SEG5                      0
1480 
1481 #define VCN_BASE__INST3_SEG0                      0
1482 #define VCN_BASE__INST3_SEG1                      0
1483 #define VCN_BASE__INST3_SEG2                      0
1484 #define VCN_BASE__INST3_SEG3                      0
1485 #define VCN_BASE__INST3_SEG4                      0
1486 #define VCN_BASE__INST3_SEG5                      0
1487 
1488 #define VCN_BASE__INST4_SEG0                      0
1489 #define VCN_BASE__INST4_SEG1                      0
1490 #define VCN_BASE__INST4_SEG2                      0
1491 #define VCN_BASE__INST4_SEG3                      0
1492 #define VCN_BASE__INST4_SEG4                      0
1493 #define VCN_BASE__INST4_SEG5                      0
1494 
1495 #define VCN_BASE__INST5_SEG0                      0
1496 #define VCN_BASE__INST5_SEG1                      0
1497 #define VCN_BASE__INST5_SEG2                      0
1498 #define VCN_BASE__INST5_SEG3                      0
1499 #define VCN_BASE__INST5_SEG4                      0
1500 #define VCN_BASE__INST5_SEG5                      0
1501 
1502 #define VCN_BASE__INST6_SEG0                      0
1503 #define VCN_BASE__INST6_SEG1                      0
1504 #define VCN_BASE__INST6_SEG2                      0
1505 #define VCN_BASE__INST6_SEG3                      0
1506 #define VCN_BASE__INST6_SEG4                      0
1507 #define VCN_BASE__INST6_SEG5                      0
1508 
1509 #define VCN_BASE__INST7_SEG0                      0
1510 #define VCN_BASE__INST7_SEG1                      0
1511 #define VCN_BASE__INST7_SEG2                      0
1512 #define VCN_BASE__INST7_SEG3                      0
1513 #define VCN_BASE__INST7_SEG4                      0
1514 #define VCN_BASE__INST7_SEG5                      0
1515 
1516 #endif
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