amd/include/v9_structs.h

0001 /*
0002  * Copyright 2012-2016 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #ifndef V9_STRUCTS_H_
0025 #define V9_STRUCTS_H_
0026
0027 struct v9_sdma_mqd {
0028     uint32_t sdmax_rlcx_rb_cntl;
0029     uint32_t sdmax_rlcx_rb_base;
0030     uint32_t sdmax_rlcx_rb_base_hi;
0031     uint32_t sdmax_rlcx_rb_rptr;
0032     uint32_t sdmax_rlcx_rb_rptr_hi;
0033     uint32_t sdmax_rlcx_rb_wptr;
0034     uint32_t sdmax_rlcx_rb_wptr_hi;
0035     uint32_t sdmax_rlcx_rb_wptr_poll_cntl;
0036     uint32_t sdmax_rlcx_rb_rptr_addr_hi;
0037     uint32_t sdmax_rlcx_rb_rptr_addr_lo;
0038     uint32_t sdmax_rlcx_ib_cntl;
0039     uint32_t sdmax_rlcx_ib_rptr;
0040     uint32_t sdmax_rlcx_ib_offset;
0041     uint32_t sdmax_rlcx_ib_base_lo;
0042     uint32_t sdmax_rlcx_ib_base_hi;
0043     uint32_t sdmax_rlcx_ib_size;
0044     uint32_t sdmax_rlcx_skip_cntl;
0045     uint32_t sdmax_rlcx_context_status;
0046     uint32_t sdmax_rlcx_doorbell;
0047     uint32_t sdmax_rlcx_status;
0048     uint32_t sdmax_rlcx_doorbell_log;
0049     uint32_t sdmax_rlcx_watermark;
0050     uint32_t sdmax_rlcx_doorbell_offset;
0051     uint32_t sdmax_rlcx_csa_addr_lo;
0052     uint32_t sdmax_rlcx_csa_addr_hi;
0053     uint32_t sdmax_rlcx_ib_sub_remain;
0054     uint32_t sdmax_rlcx_preempt;
0055     uint32_t sdmax_rlcx_dummy_reg;
0056     uint32_t sdmax_rlcx_rb_wptr_poll_addr_hi;
0057     uint32_t sdmax_rlcx_rb_wptr_poll_addr_lo;
0058     uint32_t sdmax_rlcx_rb_aql_cntl;
0059     uint32_t sdmax_rlcx_minor_ptr_update;
0060     uint32_t sdmax_rlcx_midcmd_data0;
0061     uint32_t sdmax_rlcx_midcmd_data1;
0062     uint32_t sdmax_rlcx_midcmd_data2;
0063     uint32_t sdmax_rlcx_midcmd_data3;
0064     uint32_t sdmax_rlcx_midcmd_data4;
0065     uint32_t sdmax_rlcx_midcmd_data5;
0066     uint32_t sdmax_rlcx_midcmd_data6;
0067     uint32_t sdmax_rlcx_midcmd_data7;
0068     uint32_t sdmax_rlcx_midcmd_data8;
0069     uint32_t sdmax_rlcx_midcmd_cntl;
0070     uint32_t reserved_42;
0071     uint32_t reserved_43;
0072     uint32_t reserved_44;
0073     uint32_t reserved_45;
0074     uint32_t reserved_46;
0075     uint32_t reserved_47;
0076     uint32_t reserved_48;
0077     uint32_t reserved_49;
0078     uint32_t reserved_50;
0079     uint32_t reserved_51;
0080     uint32_t reserved_52;
0081     uint32_t reserved_53;
0082     uint32_t reserved_54;
0083     uint32_t reserved_55;
0084     uint32_t reserved_56;
0085     uint32_t reserved_57;
0086     uint32_t reserved_58;
0087     uint32_t reserved_59;
0088     uint32_t reserved_60;
0089     uint32_t reserved_61;
0090     uint32_t reserved_62;
0091     uint32_t reserved_63;
0092     uint32_t reserved_64;
0093     uint32_t reserved_65;
0094     uint32_t reserved_66;
0095     uint32_t reserved_67;
0096     uint32_t reserved_68;
0097     uint32_t reserved_69;
0098     uint32_t reserved_70;
0099     uint32_t reserved_71;
0100     uint32_t reserved_72;
0101     uint32_t reserved_73;
0102     uint32_t reserved_74;
0103     uint32_t reserved_75;
0104     uint32_t reserved_76;
0105     uint32_t reserved_77;
0106     uint32_t reserved_78;
0107     uint32_t reserved_79;
0108     uint32_t reserved_80;
0109     uint32_t reserved_81;
0110     uint32_t reserved_82;
0111     uint32_t reserved_83;
0112     uint32_t reserved_84;
0113     uint32_t reserved_85;
0114     uint32_t reserved_86;
0115     uint32_t reserved_87;
0116     uint32_t reserved_88;
0117     uint32_t reserved_89;
0118     uint32_t reserved_90;
0119     uint32_t reserved_91;
0120     uint32_t reserved_92;
0121     uint32_t reserved_93;
0122     uint32_t reserved_94;
0123     uint32_t reserved_95;
0124     uint32_t reserved_96;
0125     uint32_t reserved_97;
0126     uint32_t reserved_98;
0127     uint32_t reserved_99;
0128     uint32_t reserved_100;
0129     uint32_t reserved_101;
0130     uint32_t reserved_102;
0131     uint32_t reserved_103;
0132     uint32_t reserved_104;
0133     uint32_t reserved_105;
0134     uint32_t reserved_106;
0135     uint32_t reserved_107;
0136     uint32_t reserved_108;
0137     uint32_t reserved_109;
0138     uint32_t reserved_110;
0139     uint32_t reserved_111;
0140     uint32_t reserved_112;
0141     uint32_t reserved_113;
0142     uint32_t reserved_114;
0143     uint32_t reserved_115;
0144     uint32_t reserved_116;
0145     uint32_t reserved_117;
0146     uint32_t reserved_118;
0147     uint32_t reserved_119;
0148     uint32_t reserved_120;
0149     uint32_t reserved_121;
0150     uint32_t reserved_122;
0151     uint32_t reserved_123;
0152     uint32_t reserved_124;
0153     uint32_t reserved_125;
0154     /* reserved_126,127: repurposed for driver-internal use */
0155     uint32_t sdma_engine_id;
0156     uint32_t sdma_queue_id;
0157 };
0158
0159 struct v9_mqd {
0160     uint32_t header;
0161     uint32_t compute_dispatch_initiator;
0162     uint32_t compute_dim_x;
0163     uint32_t compute_dim_y;
0164     uint32_t compute_dim_z;
0165     uint32_t compute_start_x;
0166     uint32_t compute_start_y;
0167     uint32_t compute_start_z;
0168     uint32_t compute_num_thread_x;
0169     uint32_t compute_num_thread_y;
0170     uint32_t compute_num_thread_z;
0171     uint32_t compute_pipelinestat_enable;
0172     uint32_t compute_perfcount_enable;
0173     uint32_t compute_pgm_lo;
0174     uint32_t compute_pgm_hi;
0175     uint32_t compute_tba_lo;
0176     uint32_t compute_tba_hi;
0177     uint32_t compute_tma_lo;
0178     uint32_t compute_tma_hi;
0179     uint32_t compute_pgm_rsrc1;
0180     uint32_t compute_pgm_rsrc2;
0181     uint32_t compute_vmid;
0182     uint32_t compute_resource_limits;
0183     uint32_t compute_static_thread_mgmt_se0;
0184     uint32_t compute_static_thread_mgmt_se1;
0185     uint32_t compute_tmpring_size;
0186     uint32_t compute_static_thread_mgmt_se2;
0187     uint32_t compute_static_thread_mgmt_se3;
0188     uint32_t compute_restart_x;
0189     uint32_t compute_restart_y;
0190     uint32_t compute_restart_z;
0191     uint32_t compute_thread_trace_enable;
0192     uint32_t compute_misc_reserved;
0193     uint32_t compute_dispatch_id;
0194     uint32_t compute_threadgroup_id;
0195     uint32_t compute_relaunch;
0196     uint32_t compute_wave_restore_addr_lo;
0197     uint32_t compute_wave_restore_addr_hi;
0198     uint32_t compute_wave_restore_control;
0199     uint32_t compute_static_thread_mgmt_se4;
0200     uint32_t compute_static_thread_mgmt_se5;
0201     uint32_t compute_static_thread_mgmt_se6;
0202     uint32_t compute_static_thread_mgmt_se7;
0203     uint32_t reserved_43;
0204     uint32_t reserved_44;
0205     uint32_t reserved_45;
0206     uint32_t reserved_46;
0207     uint32_t reserved_47;
0208     uint32_t reserved_48;
0209     uint32_t reserved_49;
0210     uint32_t reserved_50;
0211     uint32_t reserved_51;
0212     uint32_t reserved_52;
0213     uint32_t reserved_53;
0214     uint32_t reserved_54;
0215     uint32_t reserved_55;
0216     uint32_t reserved_56;
0217     uint32_t reserved_57;
0218     uint32_t reserved_58;
0219     uint32_t reserved_59;
0220     uint32_t reserved_60;
0221     uint32_t reserved_61;
0222     uint32_t reserved_62;
0223     uint32_t reserved_63;
0224     uint32_t reserved_64;
0225     uint32_t compute_user_data_0;
0226     uint32_t compute_user_data_1;
0227     uint32_t compute_user_data_2;
0228     uint32_t compute_user_data_3;
0229     uint32_t compute_user_data_4;
0230     uint32_t compute_user_data_5;
0231     uint32_t compute_user_data_6;
0232     uint32_t compute_user_data_7;
0233     uint32_t compute_user_data_8;
0234     uint32_t compute_user_data_9;
0235     uint32_t compute_user_data_10;
0236     uint32_t compute_user_data_11;
0237     uint32_t compute_user_data_12;
0238     uint32_t compute_user_data_13;
0239     uint32_t compute_user_data_14;
0240     uint32_t compute_user_data_15;
0241     uint32_t cp_compute_csinvoc_count_lo;
0242     uint32_t cp_compute_csinvoc_count_hi;
0243     uint32_t reserved_83;
0244     uint32_t reserved_84;
0245     uint32_t reserved_85;
0246     uint32_t cp_mqd_query_time_lo;
0247     uint32_t cp_mqd_query_time_hi;
0248     uint32_t cp_mqd_connect_start_time_lo;
0249     uint32_t cp_mqd_connect_start_time_hi;
0250     uint32_t cp_mqd_connect_end_time_lo;
0251     uint32_t cp_mqd_connect_end_time_hi;
0252     uint32_t cp_mqd_connect_end_wf_count;
0253     uint32_t cp_mqd_connect_end_pq_rptr;
0254     uint32_t cp_mqd_connect_end_pq_wptr;
0255     uint32_t cp_mqd_connect_end_ib_rptr;
0256     uint32_t cp_mqd_readindex_lo;
0257     uint32_t cp_mqd_readindex_hi;
0258     uint32_t cp_mqd_save_start_time_lo;
0259     uint32_t cp_mqd_save_start_time_hi;
0260     uint32_t cp_mqd_save_end_time_lo;
0261     uint32_t cp_mqd_save_end_time_hi;
0262     uint32_t cp_mqd_restore_start_time_lo;
0263     uint32_t cp_mqd_restore_start_time_hi;
0264     uint32_t cp_mqd_restore_end_time_lo;
0265     uint32_t cp_mqd_restore_end_time_hi;
0266     uint32_t disable_queue;
0267     uint32_t reserved_107;
0268     uint32_t gds_cs_ctxsw_cnt0;
0269     uint32_t gds_cs_ctxsw_cnt1;
0270     uint32_t gds_cs_ctxsw_cnt2;
0271     uint32_t gds_cs_ctxsw_cnt3;
0272     uint32_t reserved_112;
0273     uint32_t reserved_113;
0274     uint32_t cp_pq_exe_status_lo;
0275     uint32_t cp_pq_exe_status_hi;
0276     uint32_t cp_packet_id_lo;
0277     uint32_t cp_packet_id_hi;
0278     uint32_t cp_packet_exe_status_lo;
0279     uint32_t cp_packet_exe_status_hi;
0280     uint32_t gds_save_base_addr_lo;
0281     uint32_t gds_save_base_addr_hi;
0282     uint32_t gds_save_mask_lo;
0283     uint32_t gds_save_mask_hi;
0284     uint32_t ctx_save_base_addr_lo;
0285     uint32_t ctx_save_base_addr_hi;
0286     uint32_t dynamic_cu_mask_addr_lo;
0287     uint32_t dynamic_cu_mask_addr_hi;
0288     uint32_t cp_mqd_base_addr_lo;
0289     uint32_t cp_mqd_base_addr_hi;
0290     uint32_t cp_hqd_active;
0291     uint32_t cp_hqd_vmid;
0292     uint32_t cp_hqd_persistent_state;
0293     uint32_t cp_hqd_pipe_priority;
0294     uint32_t cp_hqd_queue_priority;
0295     uint32_t cp_hqd_quantum;
0296     uint32_t cp_hqd_pq_base_lo;
0297     uint32_t cp_hqd_pq_base_hi;
0298     uint32_t cp_hqd_pq_rptr;
0299     uint32_t cp_hqd_pq_rptr_report_addr_lo;
0300     uint32_t cp_hqd_pq_rptr_report_addr_hi;
0301     uint32_t cp_hqd_pq_wptr_poll_addr_lo;
0302     uint32_t cp_hqd_pq_wptr_poll_addr_hi;
0303     uint32_t cp_hqd_pq_doorbell_control;
0304     uint32_t reserved_144;
0305     uint32_t cp_hqd_pq_control;
0306     uint32_t cp_hqd_ib_base_addr_lo;
0307     uint32_t cp_hqd_ib_base_addr_hi;
0308     uint32_t cp_hqd_ib_rptr;
0309     uint32_t cp_hqd_ib_control;
0310     uint32_t cp_hqd_iq_timer;
0311     uint32_t cp_hqd_iq_rptr;
0312     uint32_t cp_hqd_dequeue_request;
0313     uint32_t cp_hqd_dma_offload;
0314     uint32_t cp_hqd_sema_cmd;
0315     uint32_t cp_hqd_msg_type;
0316     uint32_t cp_hqd_atomic0_preop_lo;
0317     uint32_t cp_hqd_atomic0_preop_hi;
0318     uint32_t cp_hqd_atomic1_preop_lo;
0319     uint32_t cp_hqd_atomic1_preop_hi;
0320     uint32_t cp_hqd_hq_status0;
0321     uint32_t cp_hqd_hq_control0;
0322     uint32_t cp_mqd_control;
0323     uint32_t cp_hqd_hq_status1;
0324     uint32_t cp_hqd_hq_control1;
0325     uint32_t cp_hqd_eop_base_addr_lo;
0326     uint32_t cp_hqd_eop_base_addr_hi;
0327     uint32_t cp_hqd_eop_control;
0328     uint32_t cp_hqd_eop_rptr;
0329     uint32_t cp_hqd_eop_wptr;
0330     uint32_t cp_hqd_eop_done_events;
0331     uint32_t cp_hqd_ctx_save_base_addr_lo;
0332     uint32_t cp_hqd_ctx_save_base_addr_hi;
0333     uint32_t cp_hqd_ctx_save_control;
0334     uint32_t cp_hqd_cntl_stack_offset;
0335     uint32_t cp_hqd_cntl_stack_size;
0336     uint32_t cp_hqd_wg_state_offset;
0337     uint32_t cp_hqd_ctx_save_size;
0338     uint32_t cp_hqd_gds_resource_state;
0339     uint32_t cp_hqd_error;
0340     uint32_t cp_hqd_eop_wptr_mem;
0341     uint32_t cp_hqd_aql_control;
0342     uint32_t cp_hqd_pq_wptr_lo;
0343     uint32_t cp_hqd_pq_wptr_hi;
0344     uint32_t reserved_184;
0345     uint32_t reserved_185;
0346     uint32_t reserved_186;
0347     uint32_t reserved_187;
0348     uint32_t reserved_188;
0349     uint32_t reserved_189;
0350     uint32_t reserved_190;
0351     uint32_t reserved_191;
0352     uint32_t iqtimer_pkt_header;
0353     uint32_t iqtimer_pkt_dw0;
0354     uint32_t iqtimer_pkt_dw1;
0355     uint32_t iqtimer_pkt_dw2;
0356     uint32_t iqtimer_pkt_dw3;
0357     uint32_t iqtimer_pkt_dw4;
0358     uint32_t iqtimer_pkt_dw5;
0359     uint32_t iqtimer_pkt_dw6;
0360     uint32_t iqtimer_pkt_dw7;
0361     uint32_t iqtimer_pkt_dw8;
0362     uint32_t iqtimer_pkt_dw9;
0363     uint32_t iqtimer_pkt_dw10;
0364     uint32_t iqtimer_pkt_dw11;
0365     uint32_t iqtimer_pkt_dw12;
0366     uint32_t iqtimer_pkt_dw13;
0367     uint32_t iqtimer_pkt_dw14;
0368     uint32_t iqtimer_pkt_dw15;
0369     uint32_t iqtimer_pkt_dw16;
0370     uint32_t iqtimer_pkt_dw17;
0371     uint32_t iqtimer_pkt_dw18;
0372     uint32_t iqtimer_pkt_dw19;
0373     uint32_t iqtimer_pkt_dw20;
0374     uint32_t iqtimer_pkt_dw21;
0375     uint32_t iqtimer_pkt_dw22;
0376     uint32_t iqtimer_pkt_dw23;
0377     uint32_t iqtimer_pkt_dw24;
0378     uint32_t iqtimer_pkt_dw25;
0379     uint32_t iqtimer_pkt_dw26;
0380     uint32_t iqtimer_pkt_dw27;
0381     uint32_t iqtimer_pkt_dw28;
0382     uint32_t iqtimer_pkt_dw29;
0383     uint32_t iqtimer_pkt_dw30;
0384     uint32_t iqtimer_pkt_dw31;
0385     uint32_t reserved_225;
0386     uint32_t reserved_226;
0387     uint32_t reserved_227;
0388     uint32_t set_resources_header;
0389     uint32_t set_resources_dw1;
0390     uint32_t set_resources_dw2;
0391     uint32_t set_resources_dw3;
0392     uint32_t set_resources_dw4;
0393     uint32_t set_resources_dw5;
0394     uint32_t set_resources_dw6;
0395     uint32_t set_resources_dw7;
0396     uint32_t reserved_236;
0397     uint32_t reserved_237;
0398     uint32_t reserved_238;
0399     uint32_t reserved_239;
0400     uint32_t queue_doorbell_id0;
0401     uint32_t queue_doorbell_id1;
0402     uint32_t queue_doorbell_id2;
0403     uint32_t queue_doorbell_id3;
0404     uint32_t queue_doorbell_id4;
0405     uint32_t queue_doorbell_id5;
0406     uint32_t queue_doorbell_id6;
0407     uint32_t queue_doorbell_id7;
0408     uint32_t queue_doorbell_id8;
0409     uint32_t queue_doorbell_id9;
0410     uint32_t queue_doorbell_id10;
0411     uint32_t queue_doorbell_id11;
0412     uint32_t queue_doorbell_id12;
0413     uint32_t queue_doorbell_id13;
0414     uint32_t queue_doorbell_id14;
0415     uint32_t queue_doorbell_id15;
0416     uint32_t reserved_256;
0417     uint32_t reserved_257;
0418     uint32_t reserved_258;
0419     uint32_t reserved_259;
0420     uint32_t reserved_260;
0421     uint32_t reserved_261;
0422     uint32_t reserved_262;
0423     uint32_t reserved_263;
0424     uint32_t reserved_264;
0425     uint32_t reserved_265;
0426     uint32_t reserved_266;
0427     uint32_t reserved_267;
0428     uint32_t reserved_268;
0429     uint32_t reserved_269;
0430     uint32_t reserved_270;
0431     uint32_t reserved_271;
0432     uint32_t reserved_272;
0433     uint32_t reserved_273;
0434     uint32_t reserved_274;
0435     uint32_t reserved_275;
0436     uint32_t reserved_276;
0437     uint32_t reserved_277;
0438     uint32_t reserved_278;
0439     uint32_t reserved_279;
0440     uint32_t reserved_280;
0441     uint32_t reserved_281;
0442     uint32_t reserved_282;
0443     uint32_t reserved_283;
0444     uint32_t reserved_284;
0445     uint32_t reserved_285;
0446     uint32_t reserved_286;
0447     uint32_t reserved_287;
0448     uint32_t reserved_288;
0449     uint32_t reserved_289;
0450     uint32_t reserved_290;
0451     uint32_t reserved_291;
0452     uint32_t reserved_292;
0453     uint32_t reserved_293;
0454     uint32_t reserved_294;
0455     uint32_t reserved_295;
0456     uint32_t reserved_296;
0457     uint32_t reserved_297;
0458     uint32_t reserved_298;
0459     uint32_t reserved_299;
0460     uint32_t reserved_300;
0461     uint32_t reserved_301;
0462     uint32_t reserved_302;
0463     uint32_t reserved_303;
0464     uint32_t reserved_304;
0465     uint32_t reserved_305;
0466     uint32_t reserved_306;
0467     uint32_t reserved_307;
0468     uint32_t reserved_308;
0469     uint32_t reserved_309;
0470     uint32_t reserved_310;
0471     uint32_t reserved_311;
0472     uint32_t reserved_312;
0473     uint32_t reserved_313;
0474     uint32_t reserved_314;
0475     uint32_t reserved_315;
0476     uint32_t reserved_316;
0477     uint32_t reserved_317;
0478     uint32_t reserved_318;
0479     uint32_t reserved_319;
0480     uint32_t reserved_320;
0481     uint32_t reserved_321;
0482     uint32_t reserved_322;
0483     uint32_t reserved_323;
0484     uint32_t reserved_324;
0485     uint32_t reserved_325;
0486     uint32_t reserved_326;
0487     uint32_t reserved_327;
0488     uint32_t reserved_328;
0489     uint32_t reserved_329;
0490     uint32_t reserved_330;
0491     uint32_t reserved_331;
0492     uint32_t reserved_332;
0493     uint32_t reserved_333;
0494     uint32_t reserved_334;
0495     uint32_t reserved_335;
0496     uint32_t reserved_336;
0497     uint32_t reserved_337;
0498     uint32_t reserved_338;
0499     uint32_t reserved_339;
0500     uint32_t reserved_340;
0501     uint32_t reserved_341;
0502     uint32_t reserved_342;
0503     uint32_t reserved_343;
0504     uint32_t reserved_344;
0505     uint32_t reserved_345;
0506     uint32_t reserved_346;
0507     uint32_t reserved_347;
0508     uint32_t reserved_348;
0509     uint32_t reserved_349;
0510     uint32_t reserved_350;
0511     uint32_t reserved_351;
0512     uint32_t reserved_352;
0513     uint32_t reserved_353;
0514     uint32_t reserved_354;
0515     uint32_t reserved_355;
0516     uint32_t reserved_356;
0517     uint32_t reserved_357;
0518     uint32_t reserved_358;
0519     uint32_t reserved_359;
0520     uint32_t reserved_360;
0521     uint32_t reserved_361;
0522     uint32_t reserved_362;
0523     uint32_t reserved_363;
0524     uint32_t reserved_364;
0525     uint32_t reserved_365;
0526     uint32_t reserved_366;
0527     uint32_t reserved_367;
0528     uint32_t reserved_368;
0529     uint32_t reserved_369;
0530     uint32_t reserved_370;
0531     uint32_t reserved_371;
0532     uint32_t reserved_372;
0533     uint32_t reserved_373;
0534     uint32_t reserved_374;
0535     uint32_t reserved_375;
0536     uint32_t reserved_376;
0537     uint32_t reserved_377;
0538     uint32_t reserved_378;
0539     uint32_t reserved_379;
0540     uint32_t reserved_380;
0541     uint32_t reserved_381;
0542     uint32_t reserved_382;
0543     uint32_t reserved_383;
0544     uint32_t reserved_384;
0545     uint32_t reserved_385;
0546     uint32_t reserved_386;
0547     uint32_t reserved_387;
0548     uint32_t reserved_388;
0549     uint32_t reserved_389;
0550     uint32_t reserved_390;
0551     uint32_t reserved_391;
0552     uint32_t reserved_392;
0553     uint32_t reserved_393;
0554     uint32_t reserved_394;
0555     uint32_t reserved_395;
0556     uint32_t reserved_396;
0557     uint32_t reserved_397;
0558     uint32_t reserved_398;
0559     uint32_t reserved_399;
0560     uint32_t reserved_400;
0561     uint32_t reserved_401;
0562     uint32_t reserved_402;
0563     uint32_t reserved_403;
0564     uint32_t reserved_404;
0565     uint32_t reserved_405;
0566     uint32_t reserved_406;
0567     uint32_t reserved_407;
0568     uint32_t reserved_408;
0569     uint32_t reserved_409;
0570     uint32_t reserved_410;
0571     uint32_t reserved_411;
0572     uint32_t reserved_412;
0573     uint32_t reserved_413;
0574     uint32_t reserved_414;
0575     uint32_t reserved_415;
0576     uint32_t reserved_416;
0577     uint32_t reserved_417;
0578     uint32_t reserved_418;
0579     uint32_t reserved_419;
0580     uint32_t reserved_420;
0581     uint32_t reserved_421;
0582     uint32_t reserved_422;
0583     uint32_t reserved_423;
0584     uint32_t reserved_424;
0585     uint32_t reserved_425;
0586     uint32_t reserved_426;
0587     uint32_t reserved_427;
0588     uint32_t reserved_428;
0589     uint32_t reserved_429;
0590     uint32_t reserved_430;
0591     uint32_t reserved_431;
0592     uint32_t reserved_432;
0593     uint32_t reserved_433;
0594     uint32_t reserved_434;
0595     uint32_t reserved_435;
0596     uint32_t reserved_436;
0597     uint32_t reserved_437;
0598     uint32_t reserved_438;
0599     uint32_t reserved_439;
0600     uint32_t reserved_440;
0601     uint32_t reserved_441;
0602     uint32_t reserved_442;
0603     uint32_t reserved_443;
0604     uint32_t reserved_444;
0605     uint32_t reserved_445;
0606     uint32_t reserved_446;
0607     uint32_t reserved_447;
0608     uint32_t reserved_448;
0609     uint32_t reserved_449;
0610     uint32_t reserved_450;
0611     uint32_t reserved_451;
0612     uint32_t reserved_452;
0613     uint32_t reserved_453;
0614     uint32_t reserved_454;
0615     uint32_t reserved_455;
0616     uint32_t reserved_456;
0617     uint32_t reserved_457;
0618     uint32_t reserved_458;
0619     uint32_t reserved_459;
0620     uint32_t reserved_460;
0621     uint32_t reserved_461;
0622     uint32_t reserved_462;
0623     uint32_t reserved_463;
0624     uint32_t reserved_464;
0625     uint32_t reserved_465;
0626     uint32_t reserved_466;
0627     uint32_t reserved_467;
0628     uint32_t reserved_468;
0629     uint32_t reserved_469;
0630     uint32_t reserved_470;
0631     uint32_t reserved_471;
0632     uint32_t reserved_472;
0633     uint32_t reserved_473;
0634     uint32_t reserved_474;
0635     uint32_t reserved_475;
0636     uint32_t reserved_476;
0637     uint32_t reserved_477;
0638     uint32_t reserved_478;
0639     uint32_t reserved_479;
0640     uint32_t reserved_480;
0641     uint32_t reserved_481;
0642     uint32_t reserved_482;
0643     uint32_t reserved_483;
0644     uint32_t reserved_484;
0645     uint32_t reserved_485;
0646     uint32_t reserved_486;
0647     uint32_t reserved_487;
0648     uint32_t reserved_488;
0649     uint32_t reserved_489;
0650     uint32_t reserved_490;
0651     uint32_t reserved_491;
0652     uint32_t reserved_492;
0653     uint32_t reserved_493;
0654     uint32_t reserved_494;
0655     uint32_t reserved_495;
0656     uint32_t reserved_496;
0657     uint32_t reserved_497;
0658     uint32_t reserved_498;
0659     uint32_t reserved_499;
0660     uint32_t reserved_500;
0661     uint32_t reserved_501;
0662     uint32_t reserved_502;
0663     uint32_t reserved_503;
0664     uint32_t reserved_504;
0665     uint32_t reserved_505;
0666     uint32_t reserved_506;
0667     uint32_t reserved_507;
0668     uint32_t reserved_508;
0669     uint32_t reserved_509;
0670     uint32_t reserved_510;
0671     uint32_t reserved_511;
0672 };
0673
0674 struct v9_mqd_allocation {
0675     struct v9_mqd mqd;
0676     uint32_t wptr_poll_mem;
0677     uint32_t rptr_report_mem;
0678     uint32_t dynamic_cu_mask;
0679     uint32_t dynamic_rb_mask;
0680 };
0681
0682 /* from vega10 all CSA format is shifted to chain ib compatible mode */
0683 struct v9_ce_ib_state {
0684     /* section of non chained ib part */
0685     uint32_t ce_ib_completion_status;
0686     uint32_t ce_constegnine_count;
0687     uint32_t ce_ibOffset_ib1;
0688     uint32_t ce_ibOffset_ib2;
0689
0690     /* section of chained ib */
0691     uint32_t ce_chainib_addrlo_ib1;
0692     uint32_t ce_chainib_addrlo_ib2;
0693     uint32_t ce_chainib_addrhi_ib1;
0694     uint32_t ce_chainib_addrhi_ib2;
0695     uint32_t ce_chainib_size_ib1;
0696     uint32_t ce_chainib_size_ib2;
0697 }; /* total 10 DWORD */
0698
0699 struct v9_de_ib_state {
0700     /* section of non chained ib part */
0701     uint32_t ib_completion_status;
0702     uint32_t de_constEngine_count;
0703     uint32_t ib_offset_ib1;
0704     uint32_t ib_offset_ib2;
0705
0706     /* section of chained ib */
0707     uint32_t chain_ib_addrlo_ib1;
0708     uint32_t chain_ib_addrlo_ib2;
0709     uint32_t chain_ib_addrhi_ib1;
0710     uint32_t chain_ib_addrhi_ib2;
0711     uint32_t chain_ib_size_ib1;
0712     uint32_t chain_ib_size_ib2;
0713
0714     /* section of non chained ib part */
0715     uint32_t preamble_begin_ib1;
0716     uint32_t preamble_begin_ib2;
0717     uint32_t preamble_end_ib1;
0718     uint32_t preamble_end_ib2;
0719
0720     /* section of chained ib */
0721     uint32_t chain_ib_pream_addrlo_ib1;
0722     uint32_t chain_ib_pream_addrlo_ib2;
0723     uint32_t chain_ib_pream_addrhi_ib1;
0724     uint32_t chain_ib_pream_addrhi_ib2;
0725
0726     /* section of non chained ib part */
0727     uint32_t draw_indirect_baseLo;
0728     uint32_t draw_indirect_baseHi;
0729     uint32_t disp_indirect_baseLo;
0730     uint32_t disp_indirect_baseHi;
0731     uint32_t gds_backup_addrlo;
0732     uint32_t gds_backup_addrhi;
0733     uint32_t index_base_addrlo;
0734     uint32_t index_base_addrhi;
0735     uint32_t sample_cntl;
0736 }; /* Total of 27 DWORD */
0737
0738 struct v9_gfx_meta_data {
0739     /* 10 DWORD, address must be 4KB aligned */
0740     struct v9_ce_ib_state ce_payload;
0741     uint32_t reserved1[54];
0742     /* 27 DWORD, address must be 64B aligned */
0743     struct v9_de_ib_state de_payload;
0744     /* PFP IB base address which get pre-empted */
0745     uint32_t DeIbBaseAddrLo;
0746     uint32_t DeIbBaseAddrHi;
0747     uint32_t reserved2[931];
0748 }; /* Total of 4K Bytes */
0749
0750 #endif /* V9_STRUCTS_H_ */