ivsrcid/vcn/irqsrcs_vcn_4_0.h

0001 /*
0002  * Copyright 2022 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  */
0022
0023 #ifndef __IRQSRCS_VCN_4_0_H__
0024 #define __IRQSRCS_VCN_4_0_H__
0025
0026 #define VCN_4_0__SRCID__UVD_TRAP                    114     // 0x72 UVD_TRAP
0027 #define VCN_4_0__SRCID__UVD_ENC_GENERAL_PURPOSE             119     // 0x77 Encoder General Purpose
0028 #define VCN_4_0__SRCID__UVD_ENC_LOW_LATENCY             120     // 0x78 Encoder Low Latency
0029 #define VCN_4_0__SRCID__UVD_SYSTEM_MESSAGE_INTERRUPT            124     // 0x7c UVD system message interrupt
0030 #define VCN_4_0__SRCID__JPEG_ENCODE                 151     // 0x97 JRBC Encode interrupt
0031 #define VCN_4_0__SRCID__JPEG_DECODE                 153     // 0x99 JRBC Decode interrupt
0032
0033 #define VCN_4_0__SRCID__JPEG1_DECODE                    149     // 0x95 JRBC1 Decode interrupt
0034 #define VCN_4_0__SRCID__JPEG2_DECODE                    VCN_4_0__SRCID__JPEG_ENCODE//0x97 JRBC2 Decode interrupt
0035 #define VCN_4_0__SRCID__JPEG3_DECODE                    171     // 0xab JRBC3 Decode interrupt
0036 #define VCN_4_0__SRCID__JPEG4_DECODE                    172     // 0xac JRBC4 Decode interrupt
0037 #define VCN_4_0__SRCID__JPEG5_DECODE                    173     // 0xad JRBC5 Decode interrupt
0038 #define VCN_4_0__SRCID__JPEG6_DECODE                    174     // 0xae JRBC6 Decode interrupt
0039 #define VCN_4_0__SRCID__JPEG7_DECODE                    175     // 0xaf JRBC7 Decode interrupt
0040
0041 #endif