amd/include/cik_structs.h

0001 /*
0002  * Copyright 2012 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #ifndef CIK_STRUCTS_H_
0025 #define CIK_STRUCTS_H_
0026
0027 struct cik_mqd {
0028     uint32_t header;
0029     uint32_t compute_dispatch_initiator;
0030     uint32_t compute_dim_x;
0031     uint32_t compute_dim_y;
0032     uint32_t compute_dim_z;
0033     uint32_t compute_start_x;
0034     uint32_t compute_start_y;
0035     uint32_t compute_start_z;
0036     uint32_t compute_num_thread_x;
0037     uint32_t compute_num_thread_y;
0038     uint32_t compute_num_thread_z;
0039     uint32_t compute_pipelinestat_enable;
0040     uint32_t compute_perfcount_enable;
0041     uint32_t compute_pgm_lo;
0042     uint32_t compute_pgm_hi;
0043     uint32_t compute_tba_lo;
0044     uint32_t compute_tba_hi;
0045     uint32_t compute_tma_lo;
0046     uint32_t compute_tma_hi;
0047     uint32_t compute_pgm_rsrc1;
0048     uint32_t compute_pgm_rsrc2;
0049     uint32_t compute_vmid;
0050     uint32_t compute_resource_limits;
0051     uint32_t compute_static_thread_mgmt_se0;
0052     uint32_t compute_static_thread_mgmt_se1;
0053     uint32_t compute_tmpring_size;
0054     uint32_t compute_static_thread_mgmt_se2;
0055     uint32_t compute_static_thread_mgmt_se3;
0056     uint32_t compute_restart_x;
0057     uint32_t compute_restart_y;
0058     uint32_t compute_restart_z;
0059     uint32_t compute_thread_trace_enable;
0060     uint32_t compute_misc_reserved;
0061     uint32_t compute_user_data_0;
0062     uint32_t compute_user_data_1;
0063     uint32_t compute_user_data_2;
0064     uint32_t compute_user_data_3;
0065     uint32_t compute_user_data_4;
0066     uint32_t compute_user_data_5;
0067     uint32_t compute_user_data_6;
0068     uint32_t compute_user_data_7;
0069     uint32_t compute_user_data_8;
0070     uint32_t compute_user_data_9;
0071     uint32_t compute_user_data_10;
0072     uint32_t compute_user_data_11;
0073     uint32_t compute_user_data_12;
0074     uint32_t compute_user_data_13;
0075     uint32_t compute_user_data_14;
0076     uint32_t compute_user_data_15;
0077     uint32_t cp_compute_csinvoc_count_lo;
0078     uint32_t cp_compute_csinvoc_count_hi;
0079     uint32_t cp_mqd_base_addr_lo;
0080     uint32_t cp_mqd_base_addr_hi;
0081     uint32_t cp_hqd_active;
0082     uint32_t cp_hqd_vmid;
0083     uint32_t cp_hqd_persistent_state;
0084     uint32_t cp_hqd_pipe_priority;
0085     uint32_t cp_hqd_queue_priority;
0086     uint32_t cp_hqd_quantum;
0087     uint32_t cp_hqd_pq_base_lo;
0088     uint32_t cp_hqd_pq_base_hi;
0089     uint32_t cp_hqd_pq_rptr;
0090     uint32_t cp_hqd_pq_rptr_report_addr_lo;
0091     uint32_t cp_hqd_pq_rptr_report_addr_hi;
0092     uint32_t cp_hqd_pq_wptr_poll_addr_lo;
0093     uint32_t cp_hqd_pq_wptr_poll_addr_hi;
0094     uint32_t cp_hqd_pq_doorbell_control;
0095     uint32_t cp_hqd_pq_wptr;
0096     uint32_t cp_hqd_pq_control;
0097     uint32_t cp_hqd_ib_base_addr_lo;
0098     uint32_t cp_hqd_ib_base_addr_hi;
0099     uint32_t cp_hqd_ib_rptr;
0100     uint32_t cp_hqd_ib_control;
0101     uint32_t cp_hqd_iq_timer;
0102     uint32_t cp_hqd_iq_rptr;
0103     uint32_t cp_hqd_dequeue_request;
0104     uint32_t cp_hqd_dma_offload;
0105     uint32_t cp_hqd_sema_cmd;
0106     uint32_t cp_hqd_msg_type;
0107     uint32_t cp_hqd_atomic0_preop_lo;
0108     uint32_t cp_hqd_atomic0_preop_hi;
0109     uint32_t cp_hqd_atomic1_preop_lo;
0110     uint32_t cp_hqd_atomic1_preop_hi;
0111     uint32_t cp_hqd_hq_status0;
0112     uint32_t cp_hqd_hq_control0;
0113     uint32_t cp_mqd_control;
0114     uint32_t cp_mqd_query_time_lo;
0115     uint32_t cp_mqd_query_time_hi;
0116     uint32_t cp_mqd_connect_start_time_lo;
0117     uint32_t cp_mqd_connect_start_time_hi;
0118     uint32_t cp_mqd_connect_end_time_lo;
0119     uint32_t cp_mqd_connect_end_time_hi;
0120     uint32_t cp_mqd_connect_end_wf_count;
0121     uint32_t cp_mqd_connect_end_pq_rptr;
0122     uint32_t cp_mqd_connect_end_pq_wptr;
0123     uint32_t cp_mqd_connect_end_ib_rptr;
0124     uint32_t reserved_96;
0125     uint32_t reserved_97;
0126     uint32_t reserved_98;
0127     uint32_t reserved_99;
0128     uint32_t iqtimer_pkt_header;
0129     uint32_t iqtimer_pkt_dw0;
0130     uint32_t iqtimer_pkt_dw1;
0131     uint32_t iqtimer_pkt_dw2;
0132     uint32_t iqtimer_pkt_dw3;
0133     uint32_t iqtimer_pkt_dw4;
0134     uint32_t iqtimer_pkt_dw5;
0135     uint32_t iqtimer_pkt_dw6;
0136     uint32_t reserved_108;
0137     uint32_t reserved_109;
0138     uint32_t reserved_110;
0139     uint32_t reserved_111;
0140     uint32_t queue_doorbell_id0;
0141     uint32_t queue_doorbell_id1;
0142     uint32_t queue_doorbell_id2;
0143     uint32_t queue_doorbell_id3;
0144     uint32_t queue_doorbell_id4;
0145     uint32_t queue_doorbell_id5;
0146     uint32_t queue_doorbell_id6;
0147     uint32_t queue_doorbell_id7;
0148     uint32_t queue_doorbell_id8;
0149     uint32_t queue_doorbell_id9;
0150     uint32_t queue_doorbell_id10;
0151     uint32_t queue_doorbell_id11;
0152     uint32_t queue_doorbell_id12;
0153     uint32_t queue_doorbell_id13;
0154     uint32_t queue_doorbell_id14;
0155     uint32_t queue_doorbell_id15;
0156 };
0157
0158 struct cik_sdma_rlc_registers {
0159     uint32_t sdma_rlc_rb_cntl;
0160     uint32_t sdma_rlc_rb_base;
0161     uint32_t sdma_rlc_rb_base_hi;
0162     uint32_t sdma_rlc_rb_rptr;
0163     uint32_t sdma_rlc_rb_wptr;
0164     uint32_t sdma_rlc_rb_wptr_poll_cntl;
0165     uint32_t sdma_rlc_rb_wptr_poll_addr_hi;
0166     uint32_t sdma_rlc_rb_wptr_poll_addr_lo;
0167     uint32_t sdma_rlc_rb_rptr_addr_hi;
0168     uint32_t sdma_rlc_rb_rptr_addr_lo;
0169     uint32_t sdma_rlc_ib_cntl;
0170     uint32_t sdma_rlc_ib_rptr;
0171     uint32_t sdma_rlc_ib_offset;
0172     uint32_t sdma_rlc_ib_base_lo;
0173     uint32_t sdma_rlc_ib_base_hi;
0174     uint32_t sdma_rlc_ib_size;
0175     uint32_t sdma_rlc_skip_cntl;
0176     uint32_t sdma_rlc_context_status;
0177     uint32_t sdma_rlc_doorbell;
0178     uint32_t sdma_rlc_virtual_addr;
0179     uint32_t sdma_rlc_ape1_cntl;
0180     uint32_t sdma_rlc_doorbell_log;
0181     uint32_t reserved_22;
0182     uint32_t reserved_23;
0183     uint32_t reserved_24;
0184     uint32_t reserved_25;
0185     uint32_t reserved_26;
0186     uint32_t reserved_27;
0187     uint32_t reserved_28;
0188     uint32_t reserved_29;
0189     uint32_t reserved_30;
0190     uint32_t reserved_31;
0191     uint32_t reserved_32;
0192     uint32_t reserved_33;
0193     uint32_t reserved_34;
0194     uint32_t reserved_35;
0195     uint32_t reserved_36;
0196     uint32_t reserved_37;
0197     uint32_t reserved_38;
0198     uint32_t reserved_39;
0199     uint32_t reserved_40;
0200     uint32_t reserved_41;
0201     uint32_t reserved_42;
0202     uint32_t reserved_43;
0203     uint32_t reserved_44;
0204     uint32_t reserved_45;
0205     uint32_t reserved_46;
0206     uint32_t reserved_47;
0207     uint32_t reserved_48;
0208     uint32_t reserved_49;
0209     uint32_t reserved_50;
0210     uint32_t reserved_51;
0211     uint32_t reserved_52;
0212     uint32_t reserved_53;
0213     uint32_t reserved_54;
0214     uint32_t reserved_55;
0215     uint32_t reserved_56;
0216     uint32_t reserved_57;
0217     uint32_t reserved_58;
0218     uint32_t reserved_59;
0219     uint32_t reserved_60;
0220     uint32_t reserved_61;
0221     uint32_t reserved_62;
0222     uint32_t reserved_63;
0223     uint32_t reserved_64;
0224     uint32_t reserved_65;
0225     uint32_t reserved_66;
0226     uint32_t reserved_67;
0227     uint32_t reserved_68;
0228     uint32_t reserved_69;
0229     uint32_t reserved_70;
0230     uint32_t reserved_71;
0231     uint32_t reserved_72;
0232     uint32_t reserved_73;
0233     uint32_t reserved_74;
0234     uint32_t reserved_75;
0235     uint32_t reserved_76;
0236     uint32_t reserved_77;
0237     uint32_t reserved_78;
0238     uint32_t reserved_79;
0239     uint32_t reserved_80;
0240     uint32_t reserved_81;
0241     uint32_t reserved_82;
0242     uint32_t reserved_83;
0243     uint32_t reserved_84;
0244     uint32_t reserved_85;
0245     uint32_t reserved_86;
0246     uint32_t reserved_87;
0247     uint32_t reserved_88;
0248     uint32_t reserved_89;
0249     uint32_t reserved_90;
0250     uint32_t reserved_91;
0251     uint32_t reserved_92;
0252     uint32_t reserved_93;
0253     uint32_t reserved_94;
0254     uint32_t reserved_95;
0255     uint32_t reserved_96;
0256     uint32_t reserved_97;
0257     uint32_t reserved_98;
0258     uint32_t reserved_99;
0259     uint32_t reserved_100;
0260     uint32_t reserved_101;
0261     uint32_t reserved_102;
0262     uint32_t reserved_103;
0263     uint32_t reserved_104;
0264     uint32_t reserved_105;
0265     uint32_t reserved_106;
0266     uint32_t reserved_107;
0267     uint32_t reserved_108;
0268     uint32_t reserved_109;
0269     uint32_t reserved_110;
0270     uint32_t reserved_111;
0271     uint32_t reserved_112;
0272     uint32_t reserved_113;
0273     uint32_t reserved_114;
0274     uint32_t reserved_115;
0275     uint32_t reserved_116;
0276     uint32_t reserved_117;
0277     uint32_t reserved_118;
0278     uint32_t reserved_119;
0279     uint32_t reserved_120;
0280     uint32_t reserved_121;
0281     uint32_t reserved_122;
0282     uint32_t reserved_123;
0283     uint32_t reserved_124;
0284     uint32_t reserved_125;
0285     /* reserved_126,127: repurposed for driver-internal use */
0286     uint32_t sdma_engine_id;
0287     uint32_t sdma_queue_id;
0288 };
0289
0290
0291
0292 #endif /* CIK_STRUCTS_H_ */