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0001 /*
0002  * Copyright 2022 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025 #include "link_hwss_dpia.h"
0026 #include "core_types.h"
0027 #include "link_hwss_dio.h"
0028 #include "link_enc_cfg.h"
0029 
0030 #define DC_LOGGER_INIT(logger)
0031 
0032 static void update_dpia_stream_allocation_table(struct dc_link *link,
0033         const struct link_resource *link_res,
0034         const struct link_mst_stream_allocation_table *table)
0035 {
0036     struct link_encoder *link_enc = link_enc_cfg_get_link_enc(link);
0037     static enum dc_status status;
0038     uint8_t mst_alloc_slots = 0, prev_mst_slots_in_use = 0xFF;
0039     int i;
0040     DC_LOGGER_INIT(link->ctx->logger);
0041 
0042     for (i = 0; i < table->stream_count; i++)
0043         mst_alloc_slots += table->stream_allocations[i].slot_count;
0044 
0045     status = dc_process_dmub_set_mst_slots(link->dc, link->link_index,
0046             mst_alloc_slots, &prev_mst_slots_in_use);
0047     ASSERT(status == DC_OK);
0048     DC_LOG_MST("dpia : status[%d]: alloc_slots[%d]: used_slots[%d]\n",
0049             status, mst_alloc_slots, prev_mst_slots_in_use);
0050 
0051     ASSERT(link_enc);
0052     link_enc->funcs->update_mst_stream_allocation_table(link_enc, table);
0053 }
0054 
0055 static const struct link_hwss dpia_link_hwss = {
0056     .setup_stream_encoder = setup_dio_stream_encoder,
0057     .reset_stream_encoder = reset_dio_stream_encoder,
0058     .setup_stream_attribute = setup_dio_stream_attribute,
0059     .ext = {
0060         .set_throttled_vcp_size = set_dio_throttled_vcp_size,
0061         .enable_dp_link_output = enable_dio_dp_link_output,
0062         .disable_dp_link_output = disable_dio_dp_link_output,
0063         .set_dp_link_test_pattern = set_dio_dp_link_test_pattern,
0064         .set_dp_lane_settings = set_dio_dp_lane_settings,
0065         .update_stream_allocation_table = update_dpia_stream_allocation_table,
0066     },
0067 };
0068 
0069 bool can_use_dpia_link_hwss(const struct dc_link *link,
0070         const struct link_resource *link_res)
0071 {
0072     return link->is_dig_mapping_flexible &&
0073             link->dc->res_pool->funcs->link_encs_assign;
0074 }
0075 
0076 const struct link_hwss *get_dpia_link_hwss(void)
0077 {
0078     return &dpia_link_hwss;
0079 }