dc/inc/hw_sequencer.h

0001 /*
0002  * Copyright 2015 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef __DC_HW_SEQUENCER_H__
0027 #define __DC_HW_SEQUENCER_H__
0028 #include "dc_types.h"
0029 #include "clock_source.h"
0030 #include "inc/hw/timing_generator.h"
0031 #include "inc/hw/opp.h"
0032 #include "inc/hw/link_encoder.h"
0033 #include "core_status.h"
0034
0035 enum vline_select {
0036     VLINE0,
0037     VLINE1
0038 };
0039
0040 struct pipe_ctx;
0041 struct dc_state;
0042 struct dc_stream_status;
0043 struct dc_writeback_info;
0044 struct dchub_init_data;
0045 struct dc_static_screen_params;
0046 struct resource_pool;
0047 struct dc_phy_addr_space_config;
0048 struct dc_virtual_addr_space_config;
0049 struct dpp;
0050 struct dce_hwseq;
0051
0052 struct hw_sequencer_funcs {
0053     void (*hardware_release)(struct dc *dc);
0054     /* Embedded Display Related */
0055     void (*edp_power_control)(struct dc_link *link, bool enable);
0056     void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
0057     void (*edp_wait_for_T12)(struct dc_link *link);
0058
0059     /* Pipe Programming Related */
0060     void (*init_hw)(struct dc *dc);
0061     void (*power_down_on_boot)(struct dc *dc);
0062     void (*enable_accelerated_mode)(struct dc *dc,
0063             struct dc_state *context);
0064     enum dc_status (*apply_ctx_to_hw)(struct dc *dc,
0065             struct dc_state *context);
0066     void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
0067     void (*disable_pixel_data)(struct dc *dc, struct pipe_ctx *pipe_ctx, bool blank);
0068     void (*apply_ctx_for_surface)(struct dc *dc,
0069             const struct dc_stream_state *stream,
0070             int num_planes, struct dc_state *context);
0071     void (*program_front_end_for_ctx)(struct dc *dc,
0072             struct dc_state *context);
0073     void (*wait_for_pending_cleared)(struct dc *dc,
0074             struct dc_state *context);
0075     void (*post_unlock_program_front_end)(struct dc *dc,
0076             struct dc_state *context);
0077     void (*update_plane_addr)(const struct dc *dc,
0078             struct pipe_ctx *pipe_ctx);
0079     void (*update_dchub)(struct dce_hwseq *hws,
0080             struct dchub_init_data *dh_data);
0081     void (*wait_for_mpcc_disconnect)(struct dc *dc,
0082             struct resource_pool *res_pool,
0083             struct pipe_ctx *pipe_ctx);
0084     void (*edp_backlight_control)(
0085             struct dc_link *link,
0086             bool enable);
0087     void (*program_triplebuffer)(const struct dc *dc,
0088         struct pipe_ctx *pipe_ctx, bool enableTripleBuffer);
0089     void (*update_pending_status)(struct pipe_ctx *pipe_ctx);
0090     void (*power_down)(struct dc *dc);
0091
0092     /* Pipe Lock Related */
0093     void (*pipe_control_lock)(struct dc *dc,
0094             struct pipe_ctx *pipe, bool lock);
0095     void (*interdependent_update_lock)(struct dc *dc,
0096             struct dc_state *context, bool lock);
0097     void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx,
0098             bool flip_immediate);
0099     void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock);
0100
0101     /* Timing Related */
0102     void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
0103             struct crtc_position *position);
0104     int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx);
0105     void (*calc_vupdate_position)(
0106             struct dc *dc,
0107             struct pipe_ctx *pipe_ctx,
0108             uint32_t *start_line,
0109             uint32_t *end_line);
0110     void (*enable_per_frame_crtc_position_reset)(struct dc *dc,
0111             int group_size, struct pipe_ctx *grouped_pipes[]);
0112     void (*enable_timing_synchronization)(struct dc *dc,
0113             int group_index, int group_size,
0114             struct pipe_ctx *grouped_pipes[]);
0115     void (*enable_vblanks_synchronization)(struct dc *dc,
0116             int group_index, int group_size,
0117             struct pipe_ctx *grouped_pipes[]);
0118     void (*setup_periodic_interrupt)(struct dc *dc,
0119             struct pipe_ctx *pipe_ctx,
0120             enum vline_select vline);
0121     void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
0122             struct dc_crtc_timing_adjust adjust);
0123     void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
0124             int num_pipes,
0125             const struct dc_static_screen_params *events);
0126 #ifndef TRIM_FSFT
0127     bool (*optimize_timing_for_fsft)(struct dc *dc,
0128             struct dc_crtc_timing *timing,
0129             unsigned int max_input_rate_in_khz);
0130 #endif
0131
0132     /* Stream Related */
0133     void (*enable_stream)(struct pipe_ctx *pipe_ctx);
0134     void (*disable_stream)(struct pipe_ctx *pipe_ctx);
0135     void (*blank_stream)(struct pipe_ctx *pipe_ctx);
0136     void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
0137             struct dc_link_settings *link_settings);
0138
0139     /* Bandwidth Related */
0140     void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context);
0141     bool (*update_bandwidth)(struct dc *dc, struct dc_state *context);
0142     void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context);
0143
0144     /* Infopacket Related */
0145     void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
0146     void (*send_immediate_sdp_message)(
0147             struct pipe_ctx *pipe_ctx,
0148             const uint8_t *custom_sdp_message,
0149             unsigned int sdp_message_size);
0150     void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
0151     void (*set_dmdata_attributes)(struct pipe_ctx *pipe);
0152     void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx);
0153     bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx);
0154
0155     /* Cursor Related */
0156     void (*set_cursor_position)(struct pipe_ctx *pipe);
0157     void (*set_cursor_attribute)(struct pipe_ctx *pipe);
0158     void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
0159
0160     /* Colour Related */
0161     void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx);
0162     void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx,
0163             enum dc_color_space colorspace,
0164             uint16_t *matrix, int opp_id);
0165
0166     /* VM Related */
0167     int (*init_sys_ctx)(struct dce_hwseq *hws,
0168             struct dc *dc,
0169             struct dc_phy_addr_space_config *pa_config);
0170     void (*init_vm_ctx)(struct dce_hwseq *hws,
0171             struct dc *dc,
0172             struct dc_virtual_addr_space_config *va_config,
0173             int vmid);
0174
0175     /* Writeback Related */
0176     void (*update_writeback)(struct dc *dc,
0177             struct dc_writeback_info *wb_info,
0178             struct dc_state *context);
0179     void (*enable_writeback)(struct dc *dc,
0180             struct dc_writeback_info *wb_info,
0181             struct dc_state *context);
0182     void (*disable_writeback)(struct dc *dc,
0183             unsigned int dwb_pipe_inst);
0184
0185     bool (*mmhubbub_warmup)(struct dc *dc,
0186             unsigned int num_dwb,
0187             struct dc_writeback_info *wb_info);
0188
0189     /* Clock Related */
0190     enum dc_status (*set_clock)(struct dc *dc,
0191             enum dc_clock_type clock_type,
0192             uint32_t clk_khz, uint32_t stepping);
0193     void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type,
0194             struct dc_clock_config *clock_cfg);
0195     void (*optimize_pwr_state)(const struct dc *dc,
0196             struct dc_state *context);
0197     void (*exit_optimized_pwr_state)(const struct dc *dc,
0198             struct dc_state *context);
0199
0200     /* Audio Related */
0201     void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
0202     void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx);
0203
0204     /* Stereo 3D Related */
0205     void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc);
0206
0207     /* HW State Logging Related */
0208     void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx);
0209     void (*get_hw_state)(struct dc *dc, char *pBuf,
0210             unsigned int bufSize, unsigned int mask);
0211     void (*clear_status_bits)(struct dc *dc, unsigned int mask);
0212
0213     bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx,
0214             uint32_t backlight_pwm_u16_16,
0215             uint32_t frame_ramp);
0216
0217     void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx);
0218
0219     void (*set_pipe)(struct pipe_ctx *pipe_ctx);
0220
0221     void (*get_dcc_en_bits)(struct dc *dc, int *dcc_en_bits);
0222
0223     /* Idle Optimization Related */
0224     bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable);
0225
0226     bool (*does_plane_fit_in_mall)(struct dc *dc, struct dc_plane_state *plane,
0227             struct dc_cursor_attributes *cursor_attr);
0228
0229     bool (*is_abm_supported)(struct dc *dc,
0230             struct dc_state *context, struct dc_stream_state *stream);
0231
0232     void (*set_disp_pattern_generator)(const struct dc *dc,
0233             struct pipe_ctx *pipe_ctx,
0234             enum controller_dp_test_pattern test_pattern,
0235             enum controller_dp_color_space color_space,
0236             enum dc_color_depth color_depth,
0237             const struct tg_color *solid_color,
0238             int width, int height, int offset);
0239
0240     void (*z10_restore)(const struct dc *dc);
0241     void (*z10_save_init)(struct dc *dc);
0242
0243     void (*update_visual_confirm_color)(struct dc *dc,
0244             struct pipe_ctx *pipe_ctx,
0245             struct tg_color *color,
0246             int mpcc_id);
0247
0248     void (*commit_subvp_config)(struct dc *dc, struct dc_state *context);
0249     void (*subvp_pipe_control_lock)(struct dc *dc,
0250             struct dc_state *context,
0251             bool lock,
0252             bool should_lock_all_pipes,
0253             struct pipe_ctx *top_pipe_to_program,
0254             bool subvp_prev_use);
0255
0256 };
0257
0258 void color_space_to_black_color(
0259     const struct dc *dc,
0260     enum dc_color_space colorspace,
0261     struct tg_color *black_color);
0262
0263 bool hwss_wait_for_blank_complete(
0264         struct timing_generator *tg);
0265
0266 const uint16_t *find_color_matrix(
0267         enum dc_color_space color_space,
0268         uint32_t *array_size);
0269
0270 void get_surface_visual_confirm_color(
0271         const struct pipe_ctx *pipe_ctx,
0272         struct tg_color *color);
0273
0274 void get_hdr_visual_confirm_color(
0275         struct pipe_ctx *pipe_ctx,
0276         struct tg_color *color);
0277 void get_mpctree_visual_confirm_color(
0278         struct pipe_ctx *pipe_ctx,
0279         struct tg_color *color);
0280 void get_surface_tile_visual_confirm_color(
0281         struct pipe_ctx *pipe_ctx,
0282         struct tg_color *color);
0283 #endif /* __DC_HW_SEQUENCER_H__ */