inc/hw/opp.h

0001 /*
0002  * Copyright 2012-15 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef __DAL_OPP_H__
0027 #define __DAL_OPP_H__
0028
0029 #include "hw_shared.h"
0030 #include "dc_hw_types.h"
0031 #include "transform.h"
0032 #include "mpc.h"
0033
0034 struct fixed31_32;
0035
0036 /* TODO: Need cleanup */
0037 enum clamping_range {
0038     CLAMPING_FULL_RANGE = 0,       /* No Clamping */
0039     CLAMPING_LIMITED_RANGE_8BPC,   /* 8  bpc: Clamping 1  to FE */
0040     CLAMPING_LIMITED_RANGE_10BPC, /* 10 bpc: Clamping 4  to 3FB */
0041     CLAMPING_LIMITED_RANGE_12BPC, /* 12 bpc: Clamping 10 to FEF */
0042     /* Use programmable clampping value on FMT_CLAMP_COMPONENT_R/G/B. */
0043     CLAMPING_LIMITED_RANGE_PROGRAMMABLE
0044 };
0045
0046 struct clamping_and_pixel_encoding_params {
0047     enum dc_pixel_encoding pixel_encoding; /* Pixel Encoding */
0048     enum clamping_range clamping_level; /* Clamping identifier */
0049     enum dc_color_depth c_depth; /* Deep color use. */
0050 };
0051
0052 struct bit_depth_reduction_params {
0053     struct {
0054         /* truncate/round */
0055         /* trunc/round enabled*/
0056         uint32_t TRUNCATE_ENABLED:1;
0057         /* 2 bits: 0=6 bpc, 1=8 bpc, 2 = 10bpc*/
0058         uint32_t TRUNCATE_DEPTH:2;
0059         /* truncate or round*/
0060         uint32_t TRUNCATE_MODE:1;
0061
0062         /* spatial dither */
0063         /* Spatial Bit Depth Reduction enabled*/
0064         uint32_t SPATIAL_DITHER_ENABLED:1;
0065         /* 2 bits: 0=6 bpc, 1 = 8 bpc, 2 = 10bpc*/
0066         uint32_t SPATIAL_DITHER_DEPTH:2;
0067         /* 0-3 to select patterns*/
0068         uint32_t SPATIAL_DITHER_MODE:2;
0069         /* Enable RGB random dithering*/
0070         uint32_t RGB_RANDOM:1;
0071         /* Enable Frame random dithering*/
0072         uint32_t FRAME_RANDOM:1;
0073         /* Enable HighPass random dithering*/
0074         uint32_t HIGHPASS_RANDOM:1;
0075
0076         /* temporal dither*/
0077          /* frame modulation enabled*/
0078         uint32_t FRAME_MODULATION_ENABLED:1;
0079         /* same as for trunc/spatial*/
0080         uint32_t FRAME_MODULATION_DEPTH:2;
0081         /* 2/4 gray levels*/
0082         uint32_t TEMPORAL_LEVEL:1;
0083         uint32_t FRC25:2;
0084         uint32_t FRC50:2;
0085         uint32_t FRC75:2;
0086     } flags;
0087
0088     uint32_t r_seed_value;
0089     uint32_t b_seed_value;
0090     uint32_t g_seed_value;
0091     enum dc_pixel_encoding pixel_encoding;
0092 };
0093
0094 enum wide_gamut_regamma_mode {
0095     /*  0x0  - BITS2:0 Bypass */
0096     WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_BYPASS,
0097     /*  0x1  - Fixed curve sRGB 2.4 */
0098     WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_SRGB24,
0099     /*  0x2  - Fixed curve xvYCC 2.22 */
0100     WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_XYYCC22,
0101     /*  0x3  - Programmable control A */
0102     WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_A,
0103     /*  0x4  - Programmable control B */
0104     WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_B,
0105     /*  0x0  - BITS6:4 Bypass */
0106     WIDE_GAMUT_REGAMMA_MODE_OVL_BYPASS,
0107     /*  0x1  - Fixed curve sRGB 2.4 */
0108     WIDE_GAMUT_REGAMMA_MODE_OVL_SRGB24,
0109     /*  0x2  - Fixed curve xvYCC 2.22 */
0110     WIDE_GAMUT_REGAMMA_MODE_OVL_XYYCC22,
0111     /*  0x3  - Programmable control A */
0112     WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_A,
0113     /*  0x4  - Programmable control B */
0114     WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_B
0115 };
0116
0117 struct gamma_pixel {
0118     struct fixed31_32 r;
0119     struct fixed31_32 g;
0120     struct fixed31_32 b;
0121 };
0122
0123 enum channel_name {
0124     CHANNEL_NAME_RED,
0125     CHANNEL_NAME_GREEN,
0126     CHANNEL_NAME_BLUE
0127 };
0128
0129 struct custom_float_format {
0130     uint32_t mantissa_bits;
0131     uint32_t exponenta_bits;
0132     bool sign;
0133 };
0134
0135 struct custom_float_value {
0136     uint32_t mantissa;
0137     uint32_t exponenta;
0138     uint32_t value;
0139     bool negative;
0140 };
0141
0142 struct hw_x_point {
0143     uint32_t custom_float_x;
0144     struct fixed31_32 x;
0145     struct fixed31_32 regamma_y_red;
0146     struct fixed31_32 regamma_y_green;
0147     struct fixed31_32 regamma_y_blue;
0148
0149 };
0150
0151 struct pwl_float_data_ex {
0152     struct fixed31_32 r;
0153     struct fixed31_32 g;
0154     struct fixed31_32 b;
0155     struct fixed31_32 delta_r;
0156     struct fixed31_32 delta_g;
0157     struct fixed31_32 delta_b;
0158 };
0159
0160 enum hw_point_position {
0161     /* hw point sits between left and right sw points */
0162     HW_POINT_POSITION_MIDDLE,
0163     /* hw point lays left from left (smaller) sw point */
0164     HW_POINT_POSITION_LEFT,
0165     /* hw point lays stays from right (bigger) sw point */
0166     HW_POINT_POSITION_RIGHT
0167 };
0168
0169 struct gamma_point {
0170     int32_t left_index;
0171     int32_t right_index;
0172     enum hw_point_position pos;
0173     struct fixed31_32 coeff;
0174 };
0175
0176 struct pixel_gamma_point {
0177     struct gamma_point r;
0178     struct gamma_point g;
0179     struct gamma_point b;
0180 };
0181
0182 struct gamma_coefficients {
0183     struct fixed31_32 a0[3];
0184     struct fixed31_32 a1[3];
0185     struct fixed31_32 a2[3];
0186     struct fixed31_32 a3[3];
0187     struct fixed31_32 user_gamma[3];
0188     struct fixed31_32 user_contrast;
0189     struct fixed31_32 user_brightness;
0190 };
0191
0192 struct pwl_float_data {
0193     struct fixed31_32 r;
0194     struct fixed31_32 g;
0195     struct fixed31_32 b;
0196 };
0197
0198 struct mpc_tree_cfg {
0199     int num_pipes;
0200     int dpp[MAX_PIPES];
0201     int mpcc[MAX_PIPES];
0202 };
0203
0204 struct output_pixel_processor {
0205     struct dc_context *ctx;
0206     uint32_t inst;
0207     struct pwl_params regamma_params;
0208     struct mpc_tree mpc_tree_params;
0209     bool mpcc_disconnect_pending[MAX_PIPES];
0210     const struct opp_funcs *funcs;
0211     uint32_t dyn_expansion;
0212 };
0213
0214 enum fmt_stereo_action {
0215     FMT_STEREO_ACTION_ENABLE = 0,
0216     FMT_STEREO_ACTION_DISABLE,
0217     FMT_STEREO_ACTION_UPDATE_POLARITY
0218 };
0219
0220 struct opp_grph_csc_adjustment {
0221     //enum grph_color_adjust_option color_adjust_option;
0222     enum dc_color_space c_space;
0223     enum dc_color_depth color_depth; /* clean up to uint32_t */
0224     enum graphics_csc_adjust_type   csc_adjust_type;
0225     int32_t adjust_divider;
0226     int32_t grph_cont;
0227     int32_t grph_sat;
0228     int32_t grph_bright;
0229     int32_t grph_hue;
0230 };
0231
0232 /* Underlay related types */
0233
0234 struct hw_adjustment_range {
0235     int32_t hw_default;
0236     int32_t min;
0237     int32_t max;
0238     int32_t step;
0239     uint32_t divider; /* (actually HW range is min/divider; divider !=0) */
0240 };
0241
0242 enum ovl_csc_adjust_item {
0243     OVERLAY_BRIGHTNESS = 0,
0244     OVERLAY_GAMMA,
0245     OVERLAY_CONTRAST,
0246     OVERLAY_SATURATION,
0247     OVERLAY_HUE,
0248     OVERLAY_ALPHA,
0249     OVERLAY_ALPHA_PER_PIX,
0250     OVERLAY_COLOR_TEMPERATURE
0251 };
0252
0253 enum oppbuf_display_segmentation {
0254     OPPBUF_DISPLAY_SEGMENTATION_1_SEGMENT = 0,
0255     OPPBUF_DISPLAY_SEGMENTATION_2_SEGMENT = 1,
0256     OPPBUF_DISPLAY_SEGMENTATION_4_SEGMENT = 2,
0257     OPPBUF_DISPLAY_SEGMENTATION_4_SEGMENT_SPLIT_LEFT = 3,
0258     OPPBUF_DISPLAY_SEGMENTATION_4_SEGMENT_SPLIT_RIGHT = 4
0259 };
0260
0261 struct oppbuf_params {
0262     uint32_t active_width;
0263     enum oppbuf_display_segmentation mso_segmentation;
0264     uint32_t mso_overlap_pixel_num;
0265     uint32_t pixel_repetition;
0266     uint32_t num_segment_padded_pixels;
0267 };
0268
0269 struct opp_funcs {
0270
0271
0272     /* FORMATTER RELATED */
0273
0274     void (*opp_program_fmt)(
0275             struct output_pixel_processor *opp,
0276             struct bit_depth_reduction_params *fmt_bit_depth,
0277             struct clamping_and_pixel_encoding_params *clamping);
0278
0279     void (*opp_set_dyn_expansion)(
0280         struct output_pixel_processor *opp,
0281         enum dc_color_space color_sp,
0282         enum dc_color_depth color_dpth,
0283         enum signal_type signal);
0284
0285     void (*opp_program_bit_depth_reduction)(
0286         struct output_pixel_processor *opp,
0287         const struct bit_depth_reduction_params *params);
0288
0289     /* underlay related */
0290     void (*opp_get_underlay_adjustment_range)(
0291             struct output_pixel_processor *opp,
0292             enum ovl_csc_adjust_item overlay_adjust_item,
0293             struct hw_adjustment_range *range);
0294
0295     void (*opp_destroy)(struct output_pixel_processor **opp);
0296
0297     void (*opp_program_stereo)(
0298         struct output_pixel_processor *opp,
0299         bool enable,
0300         const struct dc_crtc_timing *timing);
0301
0302     void (*opp_pipe_clock_control)(
0303             struct output_pixel_processor *opp,
0304             bool enable);
0305
0306     void (*opp_set_disp_pattern_generator)(
0307             struct output_pixel_processor *opp,
0308             enum controller_dp_test_pattern test_pattern,
0309             enum controller_dp_color_space color_space,
0310             enum dc_color_depth color_depth,
0311             const struct tg_color *solid_color,
0312             int width,
0313             int height,
0314             int offset);
0315
0316     void (*opp_program_dpg_dimensions)(
0317                 struct output_pixel_processor *opp,
0318                 int width,
0319                 int height);
0320
0321     bool (*dpg_is_blanked)(
0322             struct output_pixel_processor *opp);
0323
0324     void (*opp_dpg_set_blank_color)(
0325             struct output_pixel_processor *opp,
0326             const struct tg_color *color);
0327
0328     void (*opp_program_left_edge_extra_pixel)(
0329             struct output_pixel_processor *opp,
0330             bool count);
0331
0332 };
0333
0334 #endif