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0001 /*
0002  * Copyright 2012-15 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025 
0026 #ifndef __DAL_HUBP_H__
0027 #define __DAL_HUBP_H__
0028 
0029 #include "mem_input.h"
0030 
0031 #define OPP_ID_INVALID 0xf
0032 #define MAX_TTU 0xffffff
0033 
0034 
0035 enum cursor_pitch {
0036     CURSOR_PITCH_64_PIXELS = 0,
0037     CURSOR_PITCH_128_PIXELS,
0038     CURSOR_PITCH_256_PIXELS
0039 };
0040 
0041 enum cursor_lines_per_chunk {
0042     CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */
0043     CURSOR_LINE_PER_CHUNK_2 = 1,
0044     CURSOR_LINE_PER_CHUNK_4,
0045     CURSOR_LINE_PER_CHUNK_8,
0046     CURSOR_LINE_PER_CHUNK_16
0047 };
0048 
0049 enum hubp_ind_block_size {
0050     hubp_ind_block_unconstrained = 0,
0051     hubp_ind_block_64b,
0052     hubp_ind_block_128b,
0053     hubp_ind_block_64b_no_128bcl,
0054 };
0055 
0056 struct hubp {
0057     const struct hubp_funcs *funcs;
0058     struct dc_context *ctx;
0059     struct dc_plane_address request_address;
0060     int inst;
0061 
0062     /* run time states */
0063     int opp_id;
0064     int mpcc_id;
0065     struct dc_cursor_attributes curs_attr;
0066     struct dc_cursor_position curs_pos;
0067     bool power_gated;
0068 };
0069 
0070 struct surface_flip_registers {
0071     uint32_t DCSURF_SURFACE_CONTROL;
0072     uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH;
0073     uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS;
0074     uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH;
0075     uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS;
0076     uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C;
0077     uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C;
0078     uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C;
0079     uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C;
0080     uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH;
0081     uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS;
0082     uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH;
0083     uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS;
0084     bool tmz_surface;
0085     bool immediate;
0086     uint8_t vmid;
0087     bool grph_stereo;
0088 };
0089 
0090 struct hubp_funcs {
0091     void (*hubp_setup)(
0092             struct hubp *hubp,
0093             struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
0094             struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
0095             struct _vcs_dpi_display_rq_regs_st *rq_regs,
0096             struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
0097 
0098     void (*hubp_setup_interdependent)(
0099             struct hubp *hubp,
0100             struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
0101             struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
0102 
0103     void (*dcc_control)(struct hubp *hubp, bool enable,
0104             enum hubp_ind_block_size blk_size);
0105 
0106     void (*mem_program_viewport)(
0107             struct hubp *hubp,
0108             const struct rect *viewport,
0109             const struct rect *viewport_c);
0110 
0111     bool (*hubp_program_surface_flip_and_addr)(
0112         struct hubp *hubp,
0113         const struct dc_plane_address *address,
0114         bool flip_immediate);
0115 
0116     void (*hubp_program_pte_vm)(
0117         struct hubp *hubp,
0118         enum surface_pixel_format format,
0119         union dc_tiling_info *tiling_info,
0120         enum dc_rotation_angle rotation);
0121 
0122     void (*hubp_set_vm_system_aperture_settings)(
0123             struct hubp *hubp,
0124             struct vm_system_aperture_param *apt);
0125 
0126     void (*hubp_set_vm_context0_settings)(
0127             struct hubp *hubp,
0128             const struct vm_context0_param *vm0);
0129 
0130     void (*hubp_program_surface_config)(
0131         struct hubp *hubp,
0132         enum surface_pixel_format format,
0133         union dc_tiling_info *tiling_info,
0134         struct plane_size *plane_size,
0135         enum dc_rotation_angle rotation,
0136         struct dc_plane_dcc_param *dcc,
0137         bool horizontal_mirror,
0138         unsigned int compa_level);
0139 
0140     bool (*hubp_is_flip_pending)(struct hubp *hubp);
0141 
0142     void (*set_blank)(struct hubp *hubp, bool blank);
0143     void (*set_blank_regs)(struct hubp *hubp, bool blank);
0144 #ifdef CONFIG_DRM_AMD_DC_DCN
0145     void (*phantom_hubp_post_enable)(struct hubp *hubp);
0146 #endif
0147     void (*set_hubp_blank_en)(struct hubp *hubp, bool blank);
0148 
0149     void (*set_cursor_attributes)(
0150             struct hubp *hubp,
0151             const struct dc_cursor_attributes *attr);
0152 
0153     void (*set_cursor_position)(
0154             struct hubp *hubp,
0155             const struct dc_cursor_position *pos,
0156             const struct dc_cursor_mi_param *param);
0157 
0158     void (*hubp_disconnect)(struct hubp *hubp);
0159 
0160     void (*hubp_clk_cntl)(struct hubp *hubp, bool enable);
0161     void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
0162     void (*hubp_read_state)(struct hubp *hubp);
0163     void (*hubp_clear_underflow)(struct hubp *hubp);
0164     void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp);
0165     unsigned int (*hubp_get_underflow_status)(struct hubp *hubp);
0166     void (*hubp_init)(struct hubp *hubp);
0167 
0168     void (*dmdata_set_attributes)(
0169             struct hubp *hubp,
0170             const struct dc_dmdata_attributes *attr);
0171 
0172     void (*dmdata_load)(
0173             struct hubp *hubp,
0174             uint32_t dmdata_sw_size,
0175             const uint32_t *dmdata_sw_data);
0176     bool (*dmdata_status_done)(struct hubp *hubp);
0177     void (*hubp_enable_tripleBuffer)(
0178         struct hubp *hubp,
0179         bool enable);
0180 
0181     bool (*hubp_is_triplebuffer_enabled)(
0182         struct hubp *hubp);
0183 
0184     void (*hubp_set_flip_control_surface_gsl)(
0185         struct hubp *hubp,
0186         bool enable);
0187 
0188     void (*validate_dml_output)(
0189             struct hubp *hubp,
0190             struct dc_context *ctx,
0191             struct _vcs_dpi_display_rq_regs_st *dml_rq_regs,
0192             struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr,
0193             struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr);
0194     void (*set_unbounded_requesting)(
0195         struct hubp *hubp,
0196         bool enable);
0197     bool (*hubp_in_blank)(struct hubp *hubp);
0198     void (*hubp_soft_reset)(struct hubp *hubp, bool reset);
0199 
0200     void (*hubp_update_force_pstate_disallow)(struct hubp *hubp, bool allow);
0201     void (*hubp_update_mall_sel)(struct hubp *hubp, uint32_t mall_sel, bool c_cursor);
0202     void (*hubp_prepare_subvp_buffering)(struct hubp *hubp, bool enable);
0203 
0204     void (*hubp_set_flip_int)(struct hubp *hubp);
0205 
0206     void (*program_extended_blank)(struct hubp *hubp,
0207             unsigned int min_dst_y_next_start_optimized);
0208 
0209     void (*hubp_wait_pipe_read_start)(struct hubp *hubp);
0210 };
0211 
0212 #endif