inc/hw/dmcu.h

0001 /* Copyright 2012-15 Advanced Micro Devices, Inc.
0002  *
0003  * Permission is hereby granted, free of charge, to any person obtaining a
0004  * copy of this software and associated documentation files (the "Software"),
0005  * to deal in the Software without restriction, including without limitation
0006  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0007  * and/or sell copies of the Software, and to permit persons to whom the
0008  * Software is furnished to do so, subject to the following conditions:
0009  *
0010  * The above copyright notice and this permission notice shall be included in
0011  * all copies or substantial portions of the Software.
0012  *
0013  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0014  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0015  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0016  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0017  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0018  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0019  * OTHER DEALINGS IN THE SOFTWARE.
0020  *
0021  * Authors: AMD
0022  *
0023  */
0024
0025 #ifndef __DC_DMCU_H__
0026 #define __DC_DMCU_H__
0027
0028 #include "dm_services_types.h"
0029
0030 /* If HW itself ever powered down it will be 0.
0031  * fwDmcuInit will write to 1.
0032  * Driver will only call MCP init if current state is 1,
0033  * and the MCP command will transition this to 2.
0034  */
0035 enum dmcu_state {
0036     DMCU_UNLOADED = 0,
0037     DMCU_LOADED_UNINITIALIZED = 1,
0038     DMCU_RUNNING = 2,
0039 };
0040
0041 struct dmcu_version {
0042     unsigned int interface_version;
0043     unsigned int abm_version;
0044     unsigned int psr_version;
0045     unsigned int build_version;
0046 };
0047
0048 struct dmcu {
0049     struct dc_context *ctx;
0050     const struct dmcu_funcs *funcs;
0051
0052     enum dmcu_state dmcu_state;
0053     struct dmcu_version dmcu_version;
0054     unsigned int cached_wait_loop_number;
0055     uint32_t psp_version;
0056     bool auto_load_dmcu;
0057 };
0058
0059 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
0060 struct crc_region {
0061     uint16_t x_start;
0062     uint16_t y_start;
0063     uint16_t x_end;
0064     uint16_t y_end;
0065 };
0066
0067 struct otg_phy_mux {
0068     uint8_t phy_output_num;
0069     uint8_t otg_output_num;
0070 };
0071 #endif
0072
0073 struct dmcu_funcs {
0074     bool (*dmcu_init)(struct dmcu *dmcu);
0075     bool (*load_iram)(struct dmcu *dmcu,
0076             unsigned int start_offset,
0077             const char *src,
0078             unsigned int bytes);
0079     void (*set_psr_enable)(struct dmcu *dmcu, bool enable, bool wait);
0080     bool (*setup_psr)(struct dmcu *dmcu,
0081             struct dc_link *link,
0082             struct psr_context *psr_context);
0083     void (*get_psr_state)(struct dmcu *dmcu, enum dc_psr_state *dc_psr_state);
0084     void (*set_psr_wait_loop)(struct dmcu *dmcu,
0085             unsigned int wait_loop_number);
0086     void (*get_psr_wait_loop)(struct dmcu *dmcu,
0087             unsigned int *psr_wait_loop_number);
0088     bool (*is_dmcu_initialized)(struct dmcu *dmcu);
0089     bool (*lock_phy)(struct dmcu *dmcu);
0090     bool (*unlock_phy)(struct dmcu *dmcu);
0091     bool (*send_edid_cea)(struct dmcu *dmcu,
0092             int offset,
0093             int total_length,
0094             uint8_t *data,
0095             int length);
0096     bool (*recv_amd_vsdb)(struct dmcu *dmcu,
0097             int *version,
0098             int *min_frame_rate,
0099             int *max_frame_rate);
0100     bool (*recv_edid_cea_ack)(struct dmcu *dmcu, int *offset);
0101 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
0102     void (*forward_crc_window)(struct dmcu *dmcu,
0103             struct crc_region *crc_win,
0104             struct otg_phy_mux *mux_mapping);
0105     void (*stop_crc_win_update)(struct dmcu *dmcu,
0106             struct otg_phy_mux *mux_mapping);
0107 #endif
0108 };
0109
0110 #endif