dc/inc/dce_calcs.h

0001 /*
0002  * Copyright 2015-2017 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 /**
0027  * Bandwidth and Watermark calculations interface.
0028  * (Refer to "DCEx_mode_support.xlsm" from Perforce.)
0029  */
0030 #ifndef __DCE_CALCS_H__
0031 #define __DCE_CALCS_H__
0032
0033 #include "bw_fixed.h"
0034
0035 struct pipe_ctx;
0036 struct dc;
0037 struct dc_state;
0038 struct dce_bw_output;
0039
0040 enum bw_calcs_version {
0041     BW_CALCS_VERSION_INVALID,
0042     BW_CALCS_VERSION_CARRIZO,
0043     BW_CALCS_VERSION_POLARIS10,
0044     BW_CALCS_VERSION_POLARIS11,
0045     BW_CALCS_VERSION_POLARIS12,
0046     BW_CALCS_VERSION_VEGAM,
0047     BW_CALCS_VERSION_STONEY,
0048     BW_CALCS_VERSION_VEGA10
0049 };
0050
0051 /*******************************************************************************
0052  * There are three types of input into Calculations:
0053  * 1. per-DCE static values - these are "hardcoded" properties of the DCEIP
0054  * 2. board-level values - these are generally coming from VBIOS parser
0055  * 3. mode/configuration values - depending Mode, Scaling number of Displays etc.
0056  ******************************************************************************/
0057
0058 enum bw_defines {
0059     //Common
0060     bw_def_no = 0,
0061     bw_def_none = 0,
0062     bw_def_yes = 1,
0063     bw_def_ok = 1,
0064     bw_def_high = 2,
0065     bw_def_mid = 1,
0066     bw_def_low = 0,
0067
0068     //Internal
0069     bw_defs_start = 255,
0070     bw_def_underlay422,
0071     bw_def_underlay420_luma,
0072     bw_def_underlay420_chroma,
0073     bw_def_underlay444,
0074     bw_def_graphics,
0075     bw_def_display_write_back420_luma,
0076     bw_def_display_write_back420_chroma,
0077     bw_def_portrait,
0078     bw_def_hsr_mtn_4,
0079     bw_def_hsr_mtn_h_taps,
0080     bw_def_ceiling__h_taps_div_4___meq_hsr,
0081     bw_def_invalid_linear_or_stereo_mode,
0082     bw_def_invalid_rotation_or_bpp_or_stereo,
0083     bw_def_vsr_mtn_v_taps,
0084     bw_def_vsr_mtn_4,
0085     bw_def_auto,
0086     bw_def_manual,
0087     bw_def_exceeded_allowed_maximum_sclk,
0088     bw_def_exceeded_allowed_page_close_open,
0089     bw_def_exceeded_allowed_outstanding_pte_req_queue_size,
0090     bw_def_exceeded_allowed_maximum_bw,
0091     bw_def_landscape,
0092
0093     //Panning and bezel
0094     bw_def_any_lines,
0095
0096     //Underlay mode
0097     bw_def_underlay_only,
0098     bw_def_blended,
0099     bw_def_blend,
0100
0101     //Stereo mode
0102     bw_def_mono,
0103     bw_def_side_by_side,
0104     bw_def_top_bottom,
0105
0106     //Underlay surface type
0107     bw_def_420,
0108     bw_def_422,
0109     bw_def_444,
0110
0111     //Tiling mode
0112     bw_def_linear,
0113     bw_def_tiled,
0114     bw_def_array_linear_general,
0115     bw_def_array_linear_aligned,
0116     bw_def_rotated_micro_tiling,
0117     bw_def_display_micro_tiling,
0118
0119     //Memory type
0120     bw_def_gddr5,
0121     bw_def_hbm,
0122
0123     //Voltage
0124     bw_def_high_no_nbp_state_change,
0125     bw_def_0_72,
0126     bw_def_0_8,
0127     bw_def_0_9,
0128
0129     bw_def_notok = -1,
0130     bw_def_na = -1
0131 };
0132
0133 struct bw_calcs_dceip {
0134     enum bw_calcs_version version;
0135     uint32_t percent_of_ideal_port_bw_received_after_urgent_latency;
0136     uint32_t max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation;
0137     uint32_t max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation;
0138     bool large_cursor;
0139     uint32_t cursor_max_outstanding_group_num;
0140     bool dmif_pipe_en_fbc_chunk_tracker;
0141     struct bw_fixed dmif_request_buffer_size;
0142     uint32_t lines_interleaved_into_lb;
0143     uint32_t low_power_tiling_mode;
0144     uint32_t chunk_width;
0145     uint32_t number_of_graphics_pipes;
0146     uint32_t number_of_underlay_pipes;
0147     bool display_write_back_supported;
0148     bool argb_compression_support;
0149     struct bw_fixed underlay_vscaler_efficiency6_bit_per_component;
0150     struct bw_fixed underlay_vscaler_efficiency8_bit_per_component;
0151     struct bw_fixed underlay_vscaler_efficiency10_bit_per_component;
0152     struct bw_fixed underlay_vscaler_efficiency12_bit_per_component;
0153     struct bw_fixed graphics_vscaler_efficiency6_bit_per_component;
0154     struct bw_fixed graphics_vscaler_efficiency8_bit_per_component;
0155     struct bw_fixed graphics_vscaler_efficiency10_bit_per_component;
0156     struct bw_fixed graphics_vscaler_efficiency12_bit_per_component;
0157     struct bw_fixed alpha_vscaler_efficiency;
0158     uint32_t max_dmif_buffer_allocated;
0159     uint32_t graphics_dmif_size;
0160     uint32_t underlay_luma_dmif_size;
0161     uint32_t underlay_chroma_dmif_size;
0162     bool pre_downscaler_enabled;
0163     bool underlay_downscale_prefetch_enabled;
0164     struct bw_fixed lb_write_pixels_per_dispclk;
0165     struct bw_fixed lb_size_per_component444;
0166     bool graphics_lb_nodownscaling_multi_line_prefetching;
0167     struct bw_fixed stutter_and_dram_clock_state_change_gated_before_cursor;
0168     struct bw_fixed underlay420_luma_lb_size_per_component;
0169     struct bw_fixed underlay420_chroma_lb_size_per_component;
0170     struct bw_fixed underlay422_lb_size_per_component;
0171     struct bw_fixed cursor_chunk_width;
0172     struct bw_fixed cursor_dcp_buffer_lines;
0173     struct bw_fixed underlay_maximum_width_efficient_for_tiling;
0174     struct bw_fixed underlay_maximum_height_efficient_for_tiling;
0175     struct bw_fixed peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display;
0176     struct bw_fixed peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation;
0177     struct bw_fixed minimum_outstanding_pte_request_limit;
0178     struct bw_fixed maximum_total_outstanding_pte_requests_allowed_by_saw;
0179     bool limit_excessive_outstanding_dmif_requests;
0180     struct bw_fixed linear_mode_line_request_alternation_slice;
0181     uint32_t scatter_gather_lines_of_pte_prefetching_in_linear_mode;
0182     uint32_t display_write_back420_luma_mcifwr_buffer_size;
0183     uint32_t display_write_back420_chroma_mcifwr_buffer_size;
0184     struct bw_fixed request_efficiency;
0185     struct bw_fixed dispclk_per_request;
0186     struct bw_fixed dispclk_ramping_factor;
0187     struct bw_fixed display_pipe_throughput_factor;
0188     uint32_t scatter_gather_pte_request_rows_in_tiling_mode;
0189     struct bw_fixed mcifwr_all_surfaces_burst_time;
0190 };
0191
0192 struct bw_calcs_vbios {
0193     enum bw_defines memory_type;
0194     uint32_t dram_channel_width_in_bits;
0195     uint32_t number_of_dram_channels;
0196     uint32_t number_of_dram_banks;
0197     struct bw_fixed low_yclk; /*m_hz*/
0198     struct bw_fixed mid_yclk; /*m_hz*/
0199     struct bw_fixed high_yclk; /*m_hz*/
0200     struct bw_fixed low_sclk; /*m_hz*/
0201     struct bw_fixed mid1_sclk; /*m_hz*/
0202     struct bw_fixed mid2_sclk; /*m_hz*/
0203     struct bw_fixed mid3_sclk; /*m_hz*/
0204     struct bw_fixed mid4_sclk; /*m_hz*/
0205     struct bw_fixed mid5_sclk; /*m_hz*/
0206     struct bw_fixed mid6_sclk; /*m_hz*/
0207     struct bw_fixed high_sclk; /*m_hz*/
0208     struct bw_fixed low_voltage_max_dispclk; /*m_hz*/
0209     struct bw_fixed mid_voltage_max_dispclk; /*m_hz*/
0210     struct bw_fixed high_voltage_max_dispclk; /*m_hz*/
0211     struct bw_fixed low_voltage_max_phyclk;
0212     struct bw_fixed mid_voltage_max_phyclk;
0213     struct bw_fixed high_voltage_max_phyclk;
0214     struct bw_fixed data_return_bus_width;
0215     struct bw_fixed trc;
0216     struct bw_fixed dmifmc_urgent_latency;
0217     struct bw_fixed stutter_self_refresh_exit_latency;
0218     struct bw_fixed stutter_self_refresh_entry_latency;
0219     struct bw_fixed nbp_state_change_latency;
0220     struct bw_fixed mcifwrmc_urgent_latency;
0221     bool scatter_gather_enable;
0222     struct bw_fixed down_spread_percentage;
0223     uint32_t cursor_width;
0224     uint32_t average_compression_rate;
0225     uint32_t number_of_request_slots_gmc_reserves_for_dmif_per_channel;
0226     struct bw_fixed blackout_duration;
0227     struct bw_fixed maximum_blackout_recovery_time;
0228 };
0229
0230 /*******************************************************************************
0231  * Temporary data structure(s).
0232  ******************************************************************************/
0233 #define maximum_number_of_surfaces 12
0234 /*Units : MHz, us */
0235
0236 struct bw_calcs_data {
0237     /* data for all displays */
0238     bool display_synchronization_enabled;
0239     uint32_t number_of_displays;
0240     enum bw_defines underlay_surface_type;
0241     enum bw_defines panning_and_bezel_adjustment;
0242     enum bw_defines graphics_tiling_mode;
0243     uint32_t graphics_lb_bpc;
0244     uint32_t underlay_lb_bpc;
0245     enum bw_defines underlay_tiling_mode;
0246     enum bw_defines d0_underlay_mode;
0247     bool d1_display_write_back_dwb_enable;
0248     enum bw_defines d1_underlay_mode;
0249
0250     bool increase_voltage_to_support_mclk_switch;
0251     bool cpup_state_change_enable;
0252     bool cpuc_state_change_enable;
0253     bool nbp_state_change_enable;
0254     bool stutter_mode_enable;
0255     uint32_t y_clk_level;
0256     uint32_t sclk_level;
0257     uint32_t number_of_underlay_surfaces;
0258     uint32_t number_of_dram_wrchannels;
0259     uint32_t chunk_request_delay;
0260     uint32_t number_of_dram_channels;
0261     enum bw_defines underlay_micro_tile_mode;
0262     enum bw_defines graphics_micro_tile_mode;
0263     struct bw_fixed max_phyclk;
0264     struct bw_fixed dram_efficiency;
0265     struct bw_fixed src_width_after_surface_type;
0266     struct bw_fixed src_height_after_surface_type;
0267     struct bw_fixed hsr_after_surface_type;
0268     struct bw_fixed vsr_after_surface_type;
0269     struct bw_fixed src_width_after_rotation;
0270     struct bw_fixed src_height_after_rotation;
0271     struct bw_fixed hsr_after_rotation;
0272     struct bw_fixed vsr_after_rotation;
0273     struct bw_fixed source_height_pixels;
0274     struct bw_fixed hsr_after_stereo;
0275     struct bw_fixed vsr_after_stereo;
0276     struct bw_fixed source_width_in_lb;
0277     struct bw_fixed lb_line_pitch;
0278     struct bw_fixed underlay_maximum_source_efficient_for_tiling;
0279     struct bw_fixed num_lines_at_frame_start;
0280     struct bw_fixed min_dmif_size_in_time;
0281     struct bw_fixed min_mcifwr_size_in_time;
0282     struct bw_fixed total_requests_for_dmif_size;
0283     struct bw_fixed peak_pte_request_to_eviction_ratio_limiting;
0284     struct bw_fixed useful_pte_per_pte_request;
0285     struct bw_fixed scatter_gather_pte_request_rows;
0286     struct bw_fixed scatter_gather_row_height;
0287     struct bw_fixed scatter_gather_pte_requests_in_vblank;
0288     struct bw_fixed inefficient_linear_pitch_in_bytes;
0289     struct bw_fixed cursor_total_data;
0290     struct bw_fixed cursor_total_request_groups;
0291     struct bw_fixed scatter_gather_total_pte_requests;
0292     struct bw_fixed scatter_gather_total_pte_request_groups;
0293     struct bw_fixed tile_width_in_pixels;
0294     struct bw_fixed dmif_total_number_of_data_request_page_close_open;
0295     struct bw_fixed mcifwr_total_number_of_data_request_page_close_open;
0296     struct bw_fixed bytes_per_page_close_open;
0297     struct bw_fixed mcifwr_total_page_close_open_time;
0298     struct bw_fixed total_requests_for_adjusted_dmif_size;
0299     struct bw_fixed total_dmifmc_urgent_trips;
0300     struct bw_fixed total_dmifmc_urgent_latency;
0301     struct bw_fixed total_display_reads_required_data;
0302     struct bw_fixed total_display_reads_required_dram_access_data;
0303     struct bw_fixed total_display_writes_required_data;
0304     struct bw_fixed total_display_writes_required_dram_access_data;
0305     struct bw_fixed display_reads_required_data;
0306     struct bw_fixed display_reads_required_dram_access_data;
0307     struct bw_fixed dmif_total_page_close_open_time;
0308     struct bw_fixed min_cursor_memory_interface_buffer_size_in_time;
0309     struct bw_fixed min_read_buffer_size_in_time;
0310     struct bw_fixed display_reads_time_for_data_transfer;
0311     struct bw_fixed display_writes_time_for_data_transfer;
0312     struct bw_fixed dmif_required_dram_bandwidth;
0313     struct bw_fixed mcifwr_required_dram_bandwidth;
0314     struct bw_fixed required_dmifmc_urgent_latency_for_page_close_open;
0315     struct bw_fixed required_mcifmcwr_urgent_latency;
0316     struct bw_fixed required_dram_bandwidth_gbyte_per_second;
0317     struct bw_fixed dram_bandwidth;
0318     struct bw_fixed dmif_required_sclk;
0319     struct bw_fixed mcifwr_required_sclk;
0320     struct bw_fixed required_sclk;
0321     struct bw_fixed downspread_factor;
0322     struct bw_fixed v_scaler_efficiency;
0323     struct bw_fixed scaler_limits_factor;
0324     struct bw_fixed display_pipe_pixel_throughput;
0325     struct bw_fixed total_dispclk_required_with_ramping;
0326     struct bw_fixed total_dispclk_required_without_ramping;
0327     struct bw_fixed total_read_request_bandwidth;
0328     struct bw_fixed total_write_request_bandwidth;
0329     struct bw_fixed dispclk_required_for_total_read_request_bandwidth;
0330     struct bw_fixed total_dispclk_required_with_ramping_with_request_bandwidth;
0331     struct bw_fixed total_dispclk_required_without_ramping_with_request_bandwidth;
0332     struct bw_fixed dispclk;
0333     struct bw_fixed blackout_recovery_time;
0334     struct bw_fixed min_pixels_per_data_fifo_entry;
0335     struct bw_fixed sclk_deep_sleep;
0336     struct bw_fixed chunk_request_time;
0337     struct bw_fixed cursor_request_time;
0338     struct bw_fixed line_source_pixels_transfer_time;
0339     struct bw_fixed dmifdram_access_efficiency;
0340     struct bw_fixed mcifwrdram_access_efficiency;
0341     struct bw_fixed total_average_bandwidth_no_compression;
0342     struct bw_fixed total_average_bandwidth;
0343     struct bw_fixed total_stutter_cycle_duration;
0344     struct bw_fixed stutter_burst_time;
0345     struct bw_fixed time_in_self_refresh;
0346     struct bw_fixed stutter_efficiency;
0347     struct bw_fixed worst_number_of_trips_to_memory;
0348     struct bw_fixed immediate_flip_time;
0349     struct bw_fixed latency_for_non_dmif_clients;
0350     struct bw_fixed latency_for_non_mcifwr_clients;
0351     struct bw_fixed dmifmc_urgent_latency_supported_in_high_sclk_and_yclk;
0352     struct bw_fixed nbp_state_dram_speed_change_margin;
0353     struct bw_fixed display_reads_time_for_data_transfer_and_urgent_latency;
0354     struct bw_fixed dram_speed_change_margin;
0355     struct bw_fixed min_vblank_dram_speed_change_margin;
0356     struct bw_fixed min_stutter_refresh_duration;
0357     uint32_t total_stutter_dmif_buffer_size;
0358     uint32_t total_bytes_requested;
0359     uint32_t min_stutter_dmif_buffer_size;
0360     uint32_t num_stutter_bursts;
0361     struct bw_fixed v_blank_nbp_state_dram_speed_change_latency_supported;
0362     struct bw_fixed nbp_state_dram_speed_change_latency_supported;
0363     bool fbc_en[maximum_number_of_surfaces];
0364     bool lpt_en[maximum_number_of_surfaces];
0365     bool displays_match_flag[maximum_number_of_surfaces];
0366     bool use_alpha[maximum_number_of_surfaces];
0367     bool orthogonal_rotation[maximum_number_of_surfaces];
0368     bool enable[maximum_number_of_surfaces];
0369     bool access_one_channel_only[maximum_number_of_surfaces];
0370     bool scatter_gather_enable_for_pipe[maximum_number_of_surfaces];
0371     bool interlace_mode[maximum_number_of_surfaces];
0372     bool display_pstate_change_enable[maximum_number_of_surfaces];
0373     bool line_buffer_prefetch[maximum_number_of_surfaces];
0374     uint32_t bytes_per_pixel[maximum_number_of_surfaces];
0375     uint32_t max_chunks_non_fbc_mode[maximum_number_of_surfaces];
0376     uint32_t lb_bpc[maximum_number_of_surfaces];
0377     uint32_t output_bpphdmi[maximum_number_of_surfaces];
0378     uint32_t output_bppdp4_lane_hbr[maximum_number_of_surfaces];
0379     uint32_t output_bppdp4_lane_hbr2[maximum_number_of_surfaces];
0380     uint32_t output_bppdp4_lane_hbr3[maximum_number_of_surfaces];
0381     enum bw_defines stereo_mode[maximum_number_of_surfaces];
0382     struct bw_fixed dmif_buffer_transfer_time[maximum_number_of_surfaces];
0383     struct bw_fixed displays_with_same_mode[maximum_number_of_surfaces];
0384     struct bw_fixed stutter_dmif_buffer_size[maximum_number_of_surfaces];
0385     struct bw_fixed stutter_refresh_duration[maximum_number_of_surfaces];
0386     struct bw_fixed stutter_exit_watermark[maximum_number_of_surfaces];
0387     struct bw_fixed stutter_entry_watermark[maximum_number_of_surfaces];
0388     struct bw_fixed h_total[maximum_number_of_surfaces];
0389     struct bw_fixed v_total[maximum_number_of_surfaces];
0390     struct bw_fixed pixel_rate[maximum_number_of_surfaces];
0391     struct bw_fixed src_width[maximum_number_of_surfaces];
0392     struct bw_fixed pitch_in_pixels[maximum_number_of_surfaces];
0393     struct bw_fixed pitch_in_pixels_after_surface_type[maximum_number_of_surfaces];
0394     struct bw_fixed src_height[maximum_number_of_surfaces];
0395     struct bw_fixed scale_ratio[maximum_number_of_surfaces];
0396     struct bw_fixed h_taps[maximum_number_of_surfaces];
0397     struct bw_fixed v_taps[maximum_number_of_surfaces];
0398     struct bw_fixed h_scale_ratio[maximum_number_of_surfaces];
0399     struct bw_fixed v_scale_ratio[maximum_number_of_surfaces];
0400     struct bw_fixed rotation_angle[maximum_number_of_surfaces];
0401     struct bw_fixed compression_rate[maximum_number_of_surfaces];
0402     struct bw_fixed hsr[maximum_number_of_surfaces];
0403     struct bw_fixed vsr[maximum_number_of_surfaces];
0404     struct bw_fixed source_width_rounded_up_to_chunks[maximum_number_of_surfaces];
0405     struct bw_fixed source_width_pixels[maximum_number_of_surfaces];
0406     struct bw_fixed source_height_rounded_up_to_chunks[maximum_number_of_surfaces];
0407     struct bw_fixed display_bandwidth[maximum_number_of_surfaces];
0408     struct bw_fixed request_bandwidth[maximum_number_of_surfaces];
0409     struct bw_fixed bytes_per_request[maximum_number_of_surfaces];
0410     struct bw_fixed useful_bytes_per_request[maximum_number_of_surfaces];
0411     struct bw_fixed lines_interleaved_in_mem_access[maximum_number_of_surfaces];
0412     struct bw_fixed latency_hiding_lines[maximum_number_of_surfaces];
0413     struct bw_fixed lb_partitions[maximum_number_of_surfaces];
0414     struct bw_fixed lb_partitions_max[maximum_number_of_surfaces];
0415     struct bw_fixed dispclk_required_with_ramping[maximum_number_of_surfaces];
0416     struct bw_fixed dispclk_required_without_ramping[maximum_number_of_surfaces];
0417     struct bw_fixed data_buffer_size[maximum_number_of_surfaces];
0418     struct bw_fixed outstanding_chunk_request_limit[maximum_number_of_surfaces];
0419     struct bw_fixed urgent_watermark[maximum_number_of_surfaces];
0420     struct bw_fixed nbp_state_change_watermark[maximum_number_of_surfaces];
0421     struct bw_fixed v_filter_init[maximum_number_of_surfaces];
0422     struct bw_fixed stutter_cycle_duration[maximum_number_of_surfaces];
0423     struct bw_fixed average_bandwidth[maximum_number_of_surfaces];
0424     struct bw_fixed average_bandwidth_no_compression[maximum_number_of_surfaces];
0425     struct bw_fixed scatter_gather_pte_request_limit[maximum_number_of_surfaces];
0426     struct bw_fixed lb_size_per_component[maximum_number_of_surfaces];
0427     struct bw_fixed memory_chunk_size_in_bytes[maximum_number_of_surfaces];
0428     struct bw_fixed pipe_chunk_size_in_bytes[maximum_number_of_surfaces];
0429     struct bw_fixed number_of_trips_to_memory_for_getting_apte_row[maximum_number_of_surfaces];
0430     struct bw_fixed adjusted_data_buffer_size[maximum_number_of_surfaces];
0431     struct bw_fixed adjusted_data_buffer_size_in_memory[maximum_number_of_surfaces];
0432     struct bw_fixed pixels_per_data_fifo_entry[maximum_number_of_surfaces];
0433     struct bw_fixed scatter_gather_pte_requests_in_row[maximum_number_of_surfaces];
0434     struct bw_fixed pte_request_per_chunk[maximum_number_of_surfaces];
0435     struct bw_fixed scatter_gather_page_width[maximum_number_of_surfaces];
0436     struct bw_fixed scatter_gather_page_height[maximum_number_of_surfaces];
0437     struct bw_fixed lb_lines_in_per_line_out_in_beginning_of_frame[maximum_number_of_surfaces];
0438     struct bw_fixed lb_lines_in_per_line_out_in_middle_of_frame[maximum_number_of_surfaces];
0439     struct bw_fixed cursor_width_pixels[maximum_number_of_surfaces];
0440     struct bw_fixed minimum_latency_hiding[maximum_number_of_surfaces];
0441     struct bw_fixed maximum_latency_hiding[maximum_number_of_surfaces];
0442     struct bw_fixed minimum_latency_hiding_with_cursor[maximum_number_of_surfaces];
0443     struct bw_fixed maximum_latency_hiding_with_cursor[maximum_number_of_surfaces];
0444     struct bw_fixed src_pixels_for_first_output_pixel[maximum_number_of_surfaces];
0445     struct bw_fixed src_pixels_for_last_output_pixel[maximum_number_of_surfaces];
0446     struct bw_fixed src_data_for_first_output_pixel[maximum_number_of_surfaces];
0447     struct bw_fixed src_data_for_last_output_pixel[maximum_number_of_surfaces];
0448     struct bw_fixed active_time[maximum_number_of_surfaces];
0449     struct bw_fixed horizontal_blank_and_chunk_granularity_factor[maximum_number_of_surfaces];
0450     struct bw_fixed cursor_latency_hiding[maximum_number_of_surfaces];
0451     struct bw_fixed v_blank_dram_speed_change_margin[maximum_number_of_surfaces];
0452     uint32_t num_displays_with_margin[3][8];
0453     struct bw_fixed dmif_burst_time[3][8];
0454     struct bw_fixed mcifwr_burst_time[3][8];
0455     struct bw_fixed line_source_transfer_time[maximum_number_of_surfaces][3][8];
0456     struct bw_fixed dram_speed_change_line_source_transfer_time[maximum_number_of_surfaces][3][8];
0457     struct bw_fixed min_dram_speed_change_margin[3][8];
0458     struct bw_fixed dispclk_required_for_dram_speed_change[3][8];
0459     struct bw_fixed dispclk_required_for_dram_speed_change_pipe[3][8];
0460     struct bw_fixed blackout_duration_margin[3][8];
0461     struct bw_fixed dispclk_required_for_blackout_duration[3][8];
0462     struct bw_fixed dispclk_required_for_blackout_recovery[3][8];
0463     struct bw_fixed dmif_required_sclk_for_urgent_latency[6];
0464 };
0465
0466 /**
0467  * Initialize structures with data which will NOT change at runtime.
0468  */
0469 void bw_calcs_init(
0470     struct bw_calcs_dceip *bw_dceip,
0471     struct bw_calcs_vbios *bw_vbios,
0472     struct hw_asic_id asic_id);
0473
0474 /**
0475  * Return:
0476  *  true -  Display(s) configuration supported.
0477  *      In this case 'calcs_output' contains data for HW programming
0478  *  false - Display(s) configuration not supported (not enough bandwidth).
0479  */
0480 bool bw_calcs(
0481     struct dc_context *ctx,
0482     const struct bw_calcs_dceip *dceip,
0483     const struct bw_calcs_vbios *vbios,
0484     const struct pipe_ctx *pipe,
0485     int pipe_count,
0486     struct dce_bw_output *calcs_output);
0487
0488 #endif /* __BANDWIDTH_CALCS_H__ */
0489