dc/inc/dc_link_dpia.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright 2021 Advanced Micro Devices, Inc.
0004  *
0005  * Permission is hereby granted, free of charge, to any person obtaining a
0006  * copy of this software and associated documentation files (the "Software"),
0007  * to deal in the Software without restriction, including without limitation
0008  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0009  * and/or sell copies of the Software, and to permit persons to whom the
0010  * Software is furnished to do so, subject to the following conditions:
0011  *
0012  * The above copyright notice and this permission notice shall be included in
0013  * all copies or substantial portions of the Software.
0014  *
0015  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0016  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0017  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0018  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0019  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0020  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0021  * OTHER DEALINGS IN THE SOFTWARE.
0022  *
0023  * Authors: AMD
0024  *
0025  */
0026
0027 #ifndef __DC_LINK_DPIA_H__
0028 #define __DC_LINK_DPIA_H__
0029
0030 /* This module implements functionality for training DPIA links. */
0031
0032 struct dc_link;
0033 struct dc_link_settings;
0034
0035 /* The approximate time (us) it takes to transmit 9 USB4 DP clock sync packets. */
0036 #define DPIA_CLK_SYNC_DELAY 16000
0037
0038 /* Extend interval between training status checks for manual testing. */
0039 #define DPIA_DEBUG_EXTENDED_AUX_RD_INTERVAL_US 60000000
0040
0041 /** @note Can remove once DP tunneling registers in upstream include/drm/drm_dp_helper.h */
0042 /* DPCD DP Tunneling over USB4 */
0043 #define DP_TUNNELING_CAPABILITIES_SUPPORT 0xe000d
0044 #define DP_IN_ADAPTER_INFO                0xe000e
0045 #define DP_USB4_DRIVER_ID                 0xe000f
0046 #define DP_USB4_ROUTER_TOPOLOGY_ID        0xe001b
0047
0048 /* SET_CONFIG message types sent by driver. */
0049 enum dpia_set_config_type {
0050     DPIA_SET_CFG_SET_LINK = 0x01,
0051     DPIA_SET_CFG_SET_PHY_TEST_MODE = 0x05,
0052     DPIA_SET_CFG_SET_TRAINING = 0x18,
0053     DPIA_SET_CFG_SET_VSPE = 0x19
0054 };
0055
0056 /* Training stages (TS) in SET_CONFIG(SET_TRAINING) message. */
0057 enum dpia_set_config_ts {
0058     DPIA_TS_DPRX_DONE = 0x00, /* Done training DPRX. */
0059     DPIA_TS_TPS1 = 0x01,
0060     DPIA_TS_TPS2 = 0x02,
0061     DPIA_TS_TPS3 = 0x03,
0062     DPIA_TS_TPS4 = 0x07,
0063     DPIA_TS_UFP_DONE = 0xff /* Done training DPTX-to-DPIA hop. */
0064 };
0065
0066 /* SET_CONFIG message data associated with messages sent by driver. */
0067 union dpia_set_config_data {
0068     struct {
0069         uint8_t mode : 1;
0070         uint8_t reserved : 7;
0071     } set_link;
0072     struct {
0073         uint8_t stage;
0074     } set_training;
0075     struct {
0076         uint8_t swing : 2;
0077         uint8_t max_swing_reached : 1;
0078         uint8_t pre_emph : 2;
0079         uint8_t max_pre_emph_reached : 1;
0080         uint8_t reserved : 2;
0081     } set_vspe;
0082     uint8_t raw;
0083 };
0084
0085 /* Read tunneling device capability from DPCD and update link capability
0086  * accordingly.
0087  */
0088 enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link);
0089
0090 /* Query hot plug status of USB4 DP tunnel.
0091  * Returns true if HPD high.
0092  */
0093 bool dc_link_dpia_query_hpd_status(struct dc_link *link);
0094
0095 /* Train DP tunneling link for USB4 DPIA display endpoint.
0096  * DPIA equivalent of dc_link_dp_perfrorm_link_training.
0097  * Aborts link training upon detection of sink unplug.
0098  */
0099 enum link_training_result dc_link_dpia_perform_link_training(
0100     struct dc_link *link,
0101     const struct link_resource *link_res,
0102     const struct dc_link_settings *link_setting,
0103     bool skip_video_pattern);
0104
0105 #endif /* __DC_LINK_DPIA_H__ */