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0001 /*
0002  * Copyright 2012-15 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025 
0026 #ifndef __DAL_DDC_SERVICE_H__
0027 #define __DAL_DDC_SERVICE_H__
0028 
0029 #include "include/ddc_service_types.h"
0030 #include "include/i2caux_interface.h"
0031 
0032 #define EDID_SEGMENT_SIZE 256
0033 
0034 /* Address range from 0x00 to 0x1F.*/
0035 #define DP_ADAPTOR_TYPE2_SIZE 0x20
0036 #define DP_ADAPTOR_TYPE2_REG_ID 0x10
0037 #define DP_ADAPTOR_TYPE2_REG_MAX_TMDS_CLK 0x1D
0038 /* Identifies adaptor as Dual-mode adaptor */
0039 #define DP_ADAPTOR_TYPE2_ID 0xA0
0040 /* MHz*/
0041 #define DP_ADAPTOR_TYPE2_MAX_TMDS_CLK 600
0042 /* MHz*/
0043 #define DP_ADAPTOR_TYPE2_MIN_TMDS_CLK 25
0044 /* kHZ*/
0045 #define DP_ADAPTOR_DVI_MAX_TMDS_CLK 165000
0046 /* kHZ*/
0047 #define DP_ADAPTOR_HDMI_SAFE_MAX_TMDS_CLK 165000
0048 
0049 #define DDC_I2C_COMMAND_ENGINE I2C_COMMAND_ENGINE_SW
0050 
0051 struct ddc_service;
0052 struct graphics_object_id;
0053 enum ddc_result;
0054 struct av_sync_data;
0055 struct dp_receiver_id_info;
0056 
0057 struct i2c_payloads;
0058 struct aux_payloads;
0059 enum aux_return_code_type;
0060 
0061 void dal_ddc_i2c_payloads_add(
0062         struct i2c_payloads *payloads,
0063         uint32_t address,
0064         uint32_t len,
0065         uint8_t *data,
0066         bool write);
0067 
0068 struct ddc_service_init_data {
0069     struct graphics_object_id id;
0070     struct dc_context *ctx;
0071     struct dc_link *link;
0072     bool is_dpia_link;
0073 };
0074 
0075 struct ddc_service *dal_ddc_service_create(
0076         struct ddc_service_init_data *ddc_init_data);
0077 
0078 void dal_ddc_service_destroy(struct ddc_service **ddc);
0079 
0080 enum ddc_service_type dal_ddc_service_get_type(struct ddc_service *ddc);
0081 
0082 void dal_ddc_service_set_transaction_type(
0083         struct ddc_service *ddc,
0084         enum ddc_transaction_type type);
0085 
0086 bool dal_ddc_service_is_in_aux_transaction_mode(struct ddc_service *ddc);
0087 
0088 void dal_ddc_service_i2c_query_dp_dual_mode_adaptor(
0089         struct ddc_service *ddc,
0090         struct display_sink_capability *sink_cap);
0091 
0092 bool dal_ddc_service_query_ddc_data(
0093         struct ddc_service *ddc,
0094         uint32_t address,
0095         uint8_t *write_buf,
0096         uint32_t write_size,
0097         uint8_t *read_buf,
0098         uint32_t read_size);
0099 
0100 bool dal_ddc_submit_aux_command(struct ddc_service *ddc,
0101         struct aux_payload *payload);
0102 
0103 int dc_link_aux_transfer_raw(struct ddc_service *ddc,
0104         struct aux_payload *payload,
0105         enum aux_return_code_type *operation_result);
0106 
0107 bool dc_link_aux_transfer_with_retries(struct ddc_service *ddc,
0108         struct aux_payload *payload);
0109 
0110 bool dc_link_aux_try_to_configure_timeout(struct ddc_service *ddc,
0111         uint32_t timeout);
0112 
0113 void dal_ddc_service_write_scdc_data(
0114         struct ddc_service *ddc_service,
0115         uint32_t pix_clk,
0116         bool lte_340_scramble);
0117 
0118 void dal_ddc_service_read_scdc_data(
0119         struct ddc_service *ddc_service);
0120 
0121 void ddc_service_set_dongle_type(struct ddc_service *ddc,
0122         enum display_dongle_type dongle_type);
0123 
0124 void dal_ddc_service_set_ddc_pin(
0125         struct ddc_service *ddc_service,
0126         struct ddc *ddc);
0127 
0128 struct ddc *dal_ddc_service_get_ddc_pin(struct ddc_service *ddc_service);
0129 
0130 uint32_t get_defer_delay(struct ddc_service *ddc);
0131 
0132 #endif /* __DAL_DDC_SERVICE_H__ */
0133