dc/gpio/hw_gpio.h

0001 /*
0002  * Copyright 2012-15 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef __DAL_HW_GPIO_H__
0027 #define __DAL_HW_GPIO_H__
0028
0029 #include "gpio_regs.h"
0030
0031 #define FROM_HW_GPIO_PIN(ptr) \
0032     container_of((ptr), struct hw_gpio, base)
0033
0034 struct addr_mask {
0035     uint32_t addr;
0036     uint32_t mask;
0037 };
0038
0039 struct hw_gpio_pin {
0040     const struct hw_gpio_pin_funcs *funcs;
0041     enum gpio_id id;
0042     uint32_t en;
0043     enum gpio_mode mode;
0044     bool opened;
0045     struct dc_context *ctx;
0046 };
0047
0048 struct hw_gpio_pin_funcs {
0049     void (*destroy)(
0050         struct hw_gpio_pin **ptr);
0051     bool (*open)(
0052         struct hw_gpio_pin *pin,
0053         enum gpio_mode mode);
0054     enum gpio_result (*get_value)(
0055         const struct hw_gpio_pin *pin,
0056         uint32_t *value);
0057     enum gpio_result (*set_value)(
0058         const struct hw_gpio_pin *pin,
0059         uint32_t value);
0060     enum gpio_result (*set_config)(
0061         struct hw_gpio_pin *pin,
0062         const struct gpio_config_data *config_data);
0063     enum gpio_result (*change_mode)(
0064         struct hw_gpio_pin *pin,
0065         enum gpio_mode mode);
0066     void (*close)(
0067         struct hw_gpio_pin *pin);
0068 };
0069
0070
0071 struct hw_gpio;
0072
0073 /* Register indices are represented by member variables
0074  * and are to be filled in by constructors of derived classes.
0075  * These members permit the use of common code
0076  * for programming registers, where the sequence is the same
0077  * but register sets are different.
0078  * Some GPIOs have HW mux which allows to choose
0079  * what is the source of the signal in HW mode */
0080
0081 struct hw_gpio_pin_reg {
0082     struct addr_mask DC_GPIO_DATA_MASK;
0083     struct addr_mask DC_GPIO_DATA_A;
0084     struct addr_mask DC_GPIO_DATA_EN;
0085     struct addr_mask DC_GPIO_DATA_Y;
0086 };
0087
0088 struct hw_gpio_mux_reg {
0089     struct addr_mask GPIO_MUX_CONTROL;
0090     struct addr_mask GPIO_MUX_STEREO_SEL;
0091 };
0092
0093 struct hw_gpio {
0094     struct hw_gpio_pin base;
0095
0096     /* variables to save register value */
0097     struct {
0098         uint32_t mask;
0099         uint32_t a;
0100         uint32_t en;
0101         uint32_t mux;
0102     } store;
0103
0104     /* GPIO MUX support */
0105     bool mux_supported;
0106     const struct gpio_registers *regs;
0107 };
0108
0109 #define HW_GPIO_FROM_BASE(hw_gpio_pin) \
0110     container_of((hw_gpio_pin), struct hw_gpio, base)
0111
0112 void dal_hw_gpio_construct(
0113     struct hw_gpio *pin,
0114     enum gpio_id id,
0115     uint32_t en,
0116     struct dc_context *ctx);
0117
0118 bool dal_hw_gpio_open(
0119     struct hw_gpio_pin *pin,
0120     enum gpio_mode mode);
0121
0122 enum gpio_result dal_hw_gpio_get_value(
0123     const struct hw_gpio_pin *pin,
0124     uint32_t *value);
0125
0126 enum gpio_result dal_hw_gpio_config_mode(
0127     struct hw_gpio *pin,
0128     enum gpio_mode mode);
0129
0130 void dal_hw_gpio_destruct(
0131     struct hw_gpio *pin);
0132
0133 enum gpio_result dal_hw_gpio_set_value(
0134     const struct hw_gpio_pin *ptr,
0135     uint32_t value);
0136
0137 enum gpio_result dal_hw_gpio_change_mode(
0138     struct hw_gpio_pin *ptr,
0139     enum gpio_mode mode);
0140
0141 void dal_hw_gpio_close(
0142     struct hw_gpio_pin *ptr);
0143
0144 #endif