dc/gpio/hpd_regs.h

0001 /*
0002  * Copyright 2012-16 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_HPD_REGS_H_
0027 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_HPD_REGS_H_
0028
0029 #include "gpio_regs.h"
0030
0031 #define ONE_MORE_0 1
0032 #define ONE_MORE_1 2
0033 #define ONE_MORE_2 3
0034 #define ONE_MORE_3 4
0035 #define ONE_MORE_4 5
0036 #define ONE_MORE_5 6
0037
0038
0039 #define HPD_GPIO_REG_LIST_ENTRY(type,cd,id) \
0040     .type ## _reg =  REG(DC_GPIO_HPD_## type),\
0041     .type ## _mask =  DC_GPIO_HPD_ ## type ## __DC_GPIO_HPD ## id ## _ ## type ## _MASK,\
0042     .type ## _shift = DC_GPIO_HPD_ ## type ## __DC_GPIO_HPD ## id ## _ ## type ## __SHIFT
0043
0044 #define HPD_GPIO_REG_LIST(id) \
0045     {\
0046     HPD_GPIO_REG_LIST_ENTRY(MASK,cd,id),\
0047     HPD_GPIO_REG_LIST_ENTRY(A,cd,id),\
0048     HPD_GPIO_REG_LIST_ENTRY(EN,cd,id),\
0049     HPD_GPIO_REG_LIST_ENTRY(Y,cd,id)\
0050     }
0051
0052 #define HPD_REG_LIST(id) \
0053     HPD_GPIO_REG_LIST(ONE_MORE_ ## id), \
0054     .int_status = REGI(DC_HPD_INT_STATUS, HPD, id),\
0055     .toggle_filt_cntl = REGI(DC_HPD_TOGGLE_FILT_CNTL, HPD, id)
0056
0057  #define HPD_MASK_SH_LIST(mask_sh) \
0058         SF_HPD(DC_HPD_INT_STATUS, DC_HPD_SENSE_DELAYED, mask_sh),\
0059         SF_HPD(DC_HPD_INT_STATUS, DC_HPD_SENSE, mask_sh),\
0060         SF_HPD(DC_HPD_TOGGLE_FILT_CNTL, DC_HPD_CONNECT_INT_DELAY, mask_sh),\
0061         SF_HPD(DC_HPD_TOGGLE_FILT_CNTL, DC_HPD_DISCONNECT_INT_DELAY, mask_sh)
0062
0063 struct hpd_registers {
0064     struct gpio_registers gpio;
0065     uint32_t int_status;
0066     uint32_t toggle_filt_cntl;
0067 };
0068
0069 struct hpd_sh_mask {
0070     /* int_status */
0071     uint32_t DC_HPD_SENSE_DELAYED;
0072     uint32_t DC_HPD_SENSE;
0073     /* toggle_filt_cntl */
0074     uint32_t DC_HPD_CONNECT_INT_DELAY;
0075     uint32_t DC_HPD_DISCONNECT_INT_DELAY;
0076 };
0077
0078
0079 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_HPD_REGS_H_ */