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0001 /*
0002  * Copyright 2019 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Author: AMD
0023  */
0024 
0025 #include <drm/display/drm_dp_helper.h>
0026 #include <drm/display/drm_dsc_helper.h>
0027 #include "dc_hw_types.h"
0028 #include "dsc.h"
0029 #include "dc.h"
0030 #include "rc_calc.h"
0031 #include "fixed31_32.h"
0032 
0033 /* This module's internal functions */
0034 
0035 /* default DSC policy target bitrate limit is 16bpp */
0036 static uint32_t dsc_policy_max_target_bpp_limit = 16;
0037 
0038 /* default DSC policy enables DSC only when needed */
0039 static bool dsc_policy_enable_dsc_when_not_needed;
0040 
0041 static bool dsc_policy_disable_dsc_stream_overhead;
0042 
0043 #ifndef MAX
0044 #define MAX(X, Y) ((X) > (Y) ? (X) : (Y))
0045 #endif
0046 #ifndef MIN
0047 #define MIN(X, Y) ((X) < (Y) ? (X) : (Y))
0048 #endif
0049 
0050 /* Forward Declerations */
0051 static bool decide_dsc_bandwidth_range(
0052         const uint32_t min_bpp_x16,
0053         const uint32_t max_bpp_x16,
0054         const uint32_t num_slices_h,
0055         const struct dsc_enc_caps *dsc_caps,
0056         const struct dc_crtc_timing *timing,
0057         struct dc_dsc_bw_range *range);
0058 
0059 static uint32_t compute_bpp_x16_from_target_bandwidth(
0060         const uint32_t bandwidth_in_kbps,
0061         const struct dc_crtc_timing *timing,
0062         const uint32_t num_slices_h,
0063         const uint32_t bpp_increment_div,
0064         const bool is_dp);
0065 
0066 static void get_dsc_enc_caps(
0067         const struct display_stream_compressor *dsc,
0068         struct dsc_enc_caps *dsc_enc_caps,
0069         int pixel_clock_100Hz);
0070 
0071 static bool intersect_dsc_caps(
0072         const struct dsc_dec_dpcd_caps *dsc_sink_caps,
0073         const struct dsc_enc_caps *dsc_enc_caps,
0074         enum dc_pixel_encoding pixel_encoding,
0075         struct dsc_enc_caps *dsc_common_caps);
0076 
0077 static bool setup_dsc_config(
0078         const struct dsc_dec_dpcd_caps *dsc_sink_caps,
0079         const struct dsc_enc_caps *dsc_enc_caps,
0080         int target_bandwidth_kbps,
0081         const struct dc_crtc_timing *timing,
0082         int min_slice_height_override,
0083         int max_dsc_target_bpp_limit_override_x16,
0084         struct dc_dsc_config *dsc_cfg);
0085 
0086 static bool dsc_buff_block_size_from_dpcd(int dpcd_buff_block_size, int *buff_block_size)
0087 {
0088 
0089     switch (dpcd_buff_block_size) {
0090     case DP_DSC_RC_BUF_BLK_SIZE_1:
0091         *buff_block_size = 1024;
0092         break;
0093     case DP_DSC_RC_BUF_BLK_SIZE_4:
0094         *buff_block_size = 4 * 1024;
0095         break;
0096     case DP_DSC_RC_BUF_BLK_SIZE_16:
0097         *buff_block_size = 16 * 1024;
0098         break;
0099     case DP_DSC_RC_BUF_BLK_SIZE_64:
0100         *buff_block_size = 64 * 1024;
0101         break;
0102     default: {
0103             dm_error("%s: DPCD DSC buffer size not recognized.\n", __func__);
0104             return false;
0105         }
0106     }
0107 
0108     return true;
0109 }
0110 
0111 
0112 static bool dsc_line_buff_depth_from_dpcd(int dpcd_line_buff_bit_depth, int *line_buff_bit_depth)
0113 {
0114     if (0 <= dpcd_line_buff_bit_depth && dpcd_line_buff_bit_depth <= 7)
0115         *line_buff_bit_depth = dpcd_line_buff_bit_depth + 9;
0116     else if (dpcd_line_buff_bit_depth == 8)
0117         *line_buff_bit_depth = 8;
0118     else {
0119         dm_error("%s: DPCD DSC buffer depth not recognized.\n", __func__);
0120         return false;
0121     }
0122 
0123     return true;
0124 }
0125 
0126 
0127 static bool dsc_throughput_from_dpcd(int dpcd_throughput, int *throughput)
0128 {
0129     switch (dpcd_throughput) {
0130     case DP_DSC_THROUGHPUT_MODE_0_UNSUPPORTED:
0131         *throughput = 0;
0132         break;
0133     case DP_DSC_THROUGHPUT_MODE_0_170:
0134         *throughput = 170;
0135         break;
0136     case DP_DSC_THROUGHPUT_MODE_0_340:
0137         *throughput = 340;
0138         break;
0139     case DP_DSC_THROUGHPUT_MODE_0_400:
0140         *throughput = 400;
0141         break;
0142     case DP_DSC_THROUGHPUT_MODE_0_450:
0143         *throughput = 450;
0144         break;
0145     case DP_DSC_THROUGHPUT_MODE_0_500:
0146         *throughput = 500;
0147         break;
0148     case DP_DSC_THROUGHPUT_MODE_0_550:
0149         *throughput = 550;
0150         break;
0151     case DP_DSC_THROUGHPUT_MODE_0_600:
0152         *throughput = 600;
0153         break;
0154     case DP_DSC_THROUGHPUT_MODE_0_650:
0155         *throughput = 650;
0156         break;
0157     case DP_DSC_THROUGHPUT_MODE_0_700:
0158         *throughput = 700;
0159         break;
0160     case DP_DSC_THROUGHPUT_MODE_0_750:
0161         *throughput = 750;
0162         break;
0163     case DP_DSC_THROUGHPUT_MODE_0_800:
0164         *throughput = 800;
0165         break;
0166     case DP_DSC_THROUGHPUT_MODE_0_850:
0167         *throughput = 850;
0168         break;
0169     case DP_DSC_THROUGHPUT_MODE_0_900:
0170         *throughput = 900;
0171         break;
0172     case DP_DSC_THROUGHPUT_MODE_0_950:
0173         *throughput = 950;
0174         break;
0175     case DP_DSC_THROUGHPUT_MODE_0_1000:
0176         *throughput = 1000;
0177         break;
0178     default: {
0179             dm_error("%s: DPCD DSC throughput mode not recognized.\n", __func__);
0180             return false;
0181         }
0182     }
0183 
0184     return true;
0185 }
0186 
0187 
0188 static bool dsc_bpp_increment_div_from_dpcd(uint8_t bpp_increment_dpcd, uint32_t *bpp_increment_div)
0189 {
0190     // Mask bpp increment dpcd field to avoid reading other fields
0191     bpp_increment_dpcd &= 0x7;
0192 
0193     switch (bpp_increment_dpcd) {
0194     case 0:
0195         *bpp_increment_div = 16;
0196         break;
0197     case 1:
0198         *bpp_increment_div = 8;
0199         break;
0200     case 2:
0201         *bpp_increment_div = 4;
0202         break;
0203     case 3:
0204         *bpp_increment_div = 2;
0205         break;
0206     case 4:
0207         *bpp_increment_div = 1;
0208         break;
0209     default: {
0210         dm_error("%s: DPCD DSC bits-per-pixel increment not recognized.\n", __func__);
0211         return false;
0212     }
0213     }
0214 
0215     return true;
0216 }
0217 
0218 
0219 
0220 bool dc_dsc_parse_dsc_dpcd(const struct dc *dc,
0221         const uint8_t *dpcd_dsc_basic_data,
0222         const uint8_t *dpcd_dsc_branch_decoder_caps,
0223         struct dsc_dec_dpcd_caps *dsc_sink_caps)
0224 {
0225     if (!dpcd_dsc_basic_data)
0226         return false;
0227 
0228     dsc_sink_caps->is_dsc_supported =
0229         (dpcd_dsc_basic_data[DP_DSC_SUPPORT - DP_DSC_SUPPORT] & DP_DSC_DECOMPRESSION_IS_SUPPORTED) != 0;
0230     if (!dsc_sink_caps->is_dsc_supported)
0231         return false;
0232 
0233     dsc_sink_caps->dsc_version = dpcd_dsc_basic_data[DP_DSC_REV - DP_DSC_SUPPORT];
0234 
0235     {
0236         int buff_block_size;
0237         int buff_size;
0238 
0239         if (!dsc_buff_block_size_from_dpcd(dpcd_dsc_basic_data[DP_DSC_RC_BUF_BLK_SIZE - DP_DSC_SUPPORT],
0240                                            &buff_block_size))
0241             return false;
0242 
0243         buff_size = dpcd_dsc_basic_data[DP_DSC_RC_BUF_SIZE - DP_DSC_SUPPORT] + 1;
0244         dsc_sink_caps->rc_buffer_size = buff_size * buff_block_size;
0245     }
0246 
0247     dsc_sink_caps->slice_caps1.raw = dpcd_dsc_basic_data[DP_DSC_SLICE_CAP_1 - DP_DSC_SUPPORT];
0248     if (!dsc_line_buff_depth_from_dpcd(dpcd_dsc_basic_data[DP_DSC_LINE_BUF_BIT_DEPTH - DP_DSC_SUPPORT],
0249                                        &dsc_sink_caps->lb_bit_depth))
0250         return false;
0251 
0252     dsc_sink_caps->is_block_pred_supported =
0253         (dpcd_dsc_basic_data[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
0254          DP_DSC_BLK_PREDICTION_IS_SUPPORTED) != 0;
0255 
0256     dsc_sink_caps->edp_max_bits_per_pixel =
0257         dpcd_dsc_basic_data[DP_DSC_MAX_BITS_PER_PIXEL_LOW - DP_DSC_SUPPORT] |
0258         dpcd_dsc_basic_data[DP_DSC_MAX_BITS_PER_PIXEL_HI - DP_DSC_SUPPORT] << 8;
0259 
0260     dsc_sink_caps->color_formats.raw = dpcd_dsc_basic_data[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT];
0261     dsc_sink_caps->color_depth.raw = dpcd_dsc_basic_data[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT];
0262 
0263     {
0264         int dpcd_throughput = dpcd_dsc_basic_data[DP_DSC_PEAK_THROUGHPUT - DP_DSC_SUPPORT];
0265 
0266         if (!dsc_throughput_from_dpcd(dpcd_throughput & DP_DSC_THROUGHPUT_MODE_0_MASK,
0267                                       &dsc_sink_caps->throughput_mode_0_mps))
0268             return false;
0269 
0270         dpcd_throughput = (dpcd_throughput & DP_DSC_THROUGHPUT_MODE_1_MASK) >> DP_DSC_THROUGHPUT_MODE_1_SHIFT;
0271         if (!dsc_throughput_from_dpcd(dpcd_throughput, &dsc_sink_caps->throughput_mode_1_mps))
0272             return false;
0273     }
0274 
0275     dsc_sink_caps->max_slice_width = dpcd_dsc_basic_data[DP_DSC_MAX_SLICE_WIDTH - DP_DSC_SUPPORT] * 320;
0276     dsc_sink_caps->slice_caps2.raw = dpcd_dsc_basic_data[DP_DSC_SLICE_CAP_2 - DP_DSC_SUPPORT];
0277 
0278     if (!dsc_bpp_increment_div_from_dpcd(dpcd_dsc_basic_data[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT],
0279                                          &dsc_sink_caps->bpp_increment_div))
0280         return false;
0281 
0282     if (dc->debug.dsc_bpp_increment_div) {
0283         /* dsc_bpp_increment_div should onl be 1, 2, 4, 8 or 16, but rather than rejecting invalid values,
0284          * we'll accept all and get it into range. This also makes the above check against 0 redundant,
0285          * but that one stresses out the override will be only used if it's not 0.
0286          */
0287         if (dc->debug.dsc_bpp_increment_div >= 1)
0288             dsc_sink_caps->bpp_increment_div = 1;
0289         if (dc->debug.dsc_bpp_increment_div >= 2)
0290             dsc_sink_caps->bpp_increment_div = 2;
0291         if (dc->debug.dsc_bpp_increment_div >= 4)
0292             dsc_sink_caps->bpp_increment_div = 4;
0293         if (dc->debug.dsc_bpp_increment_div >= 8)
0294             dsc_sink_caps->bpp_increment_div = 8;
0295         if (dc->debug.dsc_bpp_increment_div >= 16)
0296             dsc_sink_caps->bpp_increment_div = 16;
0297     }
0298 
0299     /* Extended caps */
0300     if (dpcd_dsc_branch_decoder_caps == NULL) { // branch decoder DPCD DSC data can be null for non branch device
0301         dsc_sink_caps->branch_overall_throughput_0_mps = 0;
0302         dsc_sink_caps->branch_overall_throughput_1_mps = 0;
0303         dsc_sink_caps->branch_max_line_width = 0;
0304         return true;
0305     }
0306 
0307     dsc_sink_caps->branch_overall_throughput_0_mps =
0308         dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0];
0309     if (dsc_sink_caps->branch_overall_throughput_0_mps == 0)
0310         dsc_sink_caps->branch_overall_throughput_0_mps = 0;
0311     else if (dsc_sink_caps->branch_overall_throughput_0_mps == 1)
0312         dsc_sink_caps->branch_overall_throughput_0_mps = 680;
0313     else {
0314         dsc_sink_caps->branch_overall_throughput_0_mps *= 50;
0315         dsc_sink_caps->branch_overall_throughput_0_mps += 600;
0316     }
0317 
0318     dsc_sink_caps->branch_overall_throughput_1_mps =
0319         dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0];
0320     if (dsc_sink_caps->branch_overall_throughput_1_mps == 0)
0321         dsc_sink_caps->branch_overall_throughput_1_mps = 0;
0322     else if (dsc_sink_caps->branch_overall_throughput_1_mps == 1)
0323         dsc_sink_caps->branch_overall_throughput_1_mps = 680;
0324     else {
0325         dsc_sink_caps->branch_overall_throughput_1_mps *= 50;
0326         dsc_sink_caps->branch_overall_throughput_1_mps += 600;
0327     }
0328 
0329     dsc_sink_caps->branch_max_line_width =
0330         dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_MAX_LINE_WIDTH - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0] * 320;
0331     ASSERT(dsc_sink_caps->branch_max_line_width == 0 || dsc_sink_caps->branch_max_line_width >= 5120);
0332 
0333     dsc_sink_caps->is_dp = true;
0334     return true;
0335 }
0336 
0337 
0338 /* If DSC is possbile, get DSC bandwidth range based on [min_bpp, max_bpp] target bitrate range and
0339  * timing's pixel clock and uncompressed bandwidth.
0340  * If DSC is not possible, leave '*range' untouched.
0341  */
0342 bool dc_dsc_compute_bandwidth_range(
0343         const struct display_stream_compressor *dsc,
0344         uint32_t dsc_min_slice_height_override,
0345         uint32_t min_bpp_x16,
0346         uint32_t max_bpp_x16,
0347         const struct dsc_dec_dpcd_caps *dsc_sink_caps,
0348         const struct dc_crtc_timing *timing,
0349         struct dc_dsc_bw_range *range)
0350 {
0351     bool is_dsc_possible = false;
0352     struct dsc_enc_caps dsc_enc_caps;
0353     struct dsc_enc_caps dsc_common_caps;
0354     struct dc_dsc_config config;
0355 
0356     get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz);
0357 
0358     is_dsc_possible = intersect_dsc_caps(dsc_sink_caps, &dsc_enc_caps,
0359             timing->pixel_encoding, &dsc_common_caps);
0360 
0361     if (is_dsc_possible)
0362         is_dsc_possible = setup_dsc_config(dsc_sink_caps, &dsc_enc_caps, 0, timing,
0363                 dsc_min_slice_height_override, max_bpp_x16, &config);
0364 
0365     if (is_dsc_possible)
0366         is_dsc_possible = decide_dsc_bandwidth_range(min_bpp_x16, max_bpp_x16,
0367                 config.num_slices_h, &dsc_common_caps, timing, range);
0368 
0369     return is_dsc_possible;
0370 }
0371 
0372 static void get_dsc_enc_caps(
0373         const struct display_stream_compressor *dsc,
0374         struct dsc_enc_caps *dsc_enc_caps,
0375         int pixel_clock_100Hz)
0376 {
0377     // This is a static HW query, so we can use any DSC
0378 
0379     memset(dsc_enc_caps, 0, sizeof(struct dsc_enc_caps));
0380     if (dsc) {
0381         if (!dsc->ctx->dc->debug.disable_dsc)
0382             dsc->funcs->dsc_get_enc_caps(dsc_enc_caps, pixel_clock_100Hz);
0383         if (dsc->ctx->dc->debug.native422_support)
0384             dsc_enc_caps->color_formats.bits.YCBCR_NATIVE_422 = 1;
0385     }
0386 }
0387 
0388 /* Returns 'false' if no intersection was found for at least one capability.
0389  * It also implicitly validates some sink caps against invalid value of zero.
0390  */
0391 static bool intersect_dsc_caps(
0392         const struct dsc_dec_dpcd_caps *dsc_sink_caps,
0393         const struct dsc_enc_caps *dsc_enc_caps,
0394         enum dc_pixel_encoding pixel_encoding,
0395         struct dsc_enc_caps *dsc_common_caps)
0396 {
0397     int32_t max_slices;
0398     int32_t total_sink_throughput;
0399 
0400     memset(dsc_common_caps, 0, sizeof(struct dsc_enc_caps));
0401 
0402     dsc_common_caps->dsc_version = min(dsc_sink_caps->dsc_version, dsc_enc_caps->dsc_version);
0403     if (!dsc_common_caps->dsc_version)
0404         return false;
0405 
0406     dsc_common_caps->slice_caps.bits.NUM_SLICES_1 =
0407         dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_1;
0408     dsc_common_caps->slice_caps.bits.NUM_SLICES_2 =
0409         dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_2;
0410     dsc_common_caps->slice_caps.bits.NUM_SLICES_4 =
0411         dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_4;
0412     dsc_common_caps->slice_caps.bits.NUM_SLICES_8 =
0413         dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_8;
0414     if (!dsc_common_caps->slice_caps.raw)
0415         return false;
0416 
0417     dsc_common_caps->lb_bit_depth = min(dsc_sink_caps->lb_bit_depth, dsc_enc_caps->lb_bit_depth);
0418     if (!dsc_common_caps->lb_bit_depth)
0419         return false;
0420 
0421     dsc_common_caps->is_block_pred_supported =
0422         dsc_sink_caps->is_block_pred_supported && dsc_enc_caps->is_block_pred_supported;
0423 
0424     dsc_common_caps->color_formats.raw = dsc_sink_caps->color_formats.raw & dsc_enc_caps->color_formats.raw;
0425     if (!dsc_common_caps->color_formats.raw)
0426         return false;
0427 
0428     dsc_common_caps->color_depth.raw = dsc_sink_caps->color_depth.raw & dsc_enc_caps->color_depth.raw;
0429     if (!dsc_common_caps->color_depth.raw)
0430         return false;
0431 
0432     max_slices = 0;
0433     if (dsc_common_caps->slice_caps.bits.NUM_SLICES_1)
0434         max_slices = 1;
0435 
0436     if (dsc_common_caps->slice_caps.bits.NUM_SLICES_2)
0437         max_slices = 2;
0438 
0439     if (dsc_common_caps->slice_caps.bits.NUM_SLICES_4)
0440         max_slices = 4;
0441 
0442     total_sink_throughput = max_slices * dsc_sink_caps->throughput_mode_0_mps;
0443     if (pixel_encoding == PIXEL_ENCODING_YCBCR422 || pixel_encoding == PIXEL_ENCODING_YCBCR420)
0444         total_sink_throughput = max_slices * dsc_sink_caps->throughput_mode_1_mps;
0445 
0446     dsc_common_caps->max_total_throughput_mps = min(total_sink_throughput, dsc_enc_caps->max_total_throughput_mps);
0447 
0448     dsc_common_caps->max_slice_width = min(dsc_sink_caps->max_slice_width, dsc_enc_caps->max_slice_width);
0449     if (!dsc_common_caps->max_slice_width)
0450         return false;
0451 
0452     dsc_common_caps->bpp_increment_div = min(dsc_sink_caps->bpp_increment_div, dsc_enc_caps->bpp_increment_div);
0453 
0454     // TODO DSC: Remove this workaround for N422 and 420 once it's fixed, or move it to get_dsc_encoder_caps()
0455     if (pixel_encoding == PIXEL_ENCODING_YCBCR422 || pixel_encoding == PIXEL_ENCODING_YCBCR420)
0456         dsc_common_caps->bpp_increment_div = min(dsc_common_caps->bpp_increment_div, (uint32_t)8);
0457 
0458     dsc_common_caps->edp_sink_max_bits_per_pixel = dsc_sink_caps->edp_max_bits_per_pixel;
0459     dsc_common_caps->is_dp = dsc_sink_caps->is_dp;
0460     return true;
0461 }
0462 
0463 static inline uint32_t dsc_div_by_10_round_up(uint32_t value)
0464 {
0465     return (value + 9) / 10;
0466 }
0467 
0468 static uint32_t compute_bpp_x16_from_target_bandwidth(
0469     const uint32_t bandwidth_in_kbps,
0470     const struct dc_crtc_timing *timing,
0471     const uint32_t num_slices_h,
0472     const uint32_t bpp_increment_div,
0473     const bool is_dp)
0474 {
0475     uint32_t overhead_in_kbps;
0476     struct fixed31_32 effective_bandwidth_in_kbps;
0477     struct fixed31_32 bpp_x16;
0478 
0479     overhead_in_kbps = dc_dsc_stream_bandwidth_overhead_in_kbps(
0480                 timing, num_slices_h, is_dp);
0481     effective_bandwidth_in_kbps = dc_fixpt_from_int(bandwidth_in_kbps);
0482     effective_bandwidth_in_kbps = dc_fixpt_sub_int(effective_bandwidth_in_kbps,
0483             overhead_in_kbps);
0484     bpp_x16 = dc_fixpt_mul_int(effective_bandwidth_in_kbps, 10);
0485     bpp_x16 = dc_fixpt_div_int(bpp_x16, timing->pix_clk_100hz);
0486     bpp_x16 = dc_fixpt_from_int(dc_fixpt_floor(dc_fixpt_mul_int(bpp_x16, bpp_increment_div)));
0487     bpp_x16 = dc_fixpt_div_int(bpp_x16, bpp_increment_div);
0488     bpp_x16 = dc_fixpt_mul_int(bpp_x16, 16);
0489     return dc_fixpt_floor(bpp_x16);
0490 }
0491 
0492 /* Decide DSC bandwidth range based on signal, timing, specs specific and input min and max
0493  * requirements.
0494  * The range output includes decided min/max target bpp, the respective bandwidth requirements
0495  * and native timing bandwidth requirement when DSC is not used.
0496  */
0497 static bool decide_dsc_bandwidth_range(
0498         const uint32_t min_bpp_x16,
0499         const uint32_t max_bpp_x16,
0500         const uint32_t num_slices_h,
0501         const struct dsc_enc_caps *dsc_caps,
0502         const struct dc_crtc_timing *timing,
0503         struct dc_dsc_bw_range *range)
0504 {
0505     uint32_t preferred_bpp_x16 = timing->dsc_fixed_bits_per_pixel_x16;
0506 
0507     memset(range, 0, sizeof(*range));
0508 
0509     /* apply signal, timing, specs and explicitly specified DSC range requirements */
0510     if (preferred_bpp_x16) {
0511         if (preferred_bpp_x16 <= max_bpp_x16 &&
0512                 preferred_bpp_x16 >= min_bpp_x16) {
0513             range->max_target_bpp_x16 = preferred_bpp_x16;
0514             range->min_target_bpp_x16 = preferred_bpp_x16;
0515         }
0516     }
0517     /* TODO - make this value generic to all signal types */
0518     else if (dsc_caps->edp_sink_max_bits_per_pixel) {
0519         /* apply max bpp limitation from edp sink */
0520         range->max_target_bpp_x16 = MIN(dsc_caps->edp_sink_max_bits_per_pixel,
0521                 max_bpp_x16);
0522         range->min_target_bpp_x16 = min_bpp_x16;
0523     }
0524     else {
0525         range->max_target_bpp_x16 = max_bpp_x16;
0526         range->min_target_bpp_x16 = min_bpp_x16;
0527     }
0528 
0529     /* populate output structure */
0530     if (range->max_target_bpp_x16 >= range->min_target_bpp_x16 && range->min_target_bpp_x16 > 0) {
0531         /* native stream bandwidth */
0532         range->stream_kbps = dc_bandwidth_in_kbps_from_timing(timing);
0533 
0534         /* max dsc target bpp */
0535         range->max_kbps = dc_dsc_stream_bandwidth_in_kbps(timing,
0536                 range->max_target_bpp_x16, num_slices_h, dsc_caps->is_dp);
0537 
0538         /* min dsc target bpp */
0539         range->min_kbps = dc_dsc_stream_bandwidth_in_kbps(timing,
0540                 range->min_target_bpp_x16, num_slices_h, dsc_caps->is_dp);
0541     }
0542 
0543     return range->max_kbps >= range->min_kbps && range->min_kbps > 0;
0544 }
0545 
0546 /* Decides if DSC should be used and calculates target bpp if it should, applying DSC policy.
0547  *
0548  * Returns:
0549  *     - 'true' if target bpp is decided
0550  *     - 'false' if target bpp cannot be decided (e.g. cannot fit even with min DSC bpp),
0551  */
0552 static bool decide_dsc_target_bpp_x16(
0553         const struct dc_dsc_policy *policy,
0554         const struct dsc_enc_caps *dsc_common_caps,
0555         const int target_bandwidth_kbps,
0556         const struct dc_crtc_timing *timing,
0557         const int num_slices_h,
0558         int *target_bpp_x16)
0559 {
0560     struct dc_dsc_bw_range range;
0561 
0562     *target_bpp_x16 = 0;
0563 
0564     if (decide_dsc_bandwidth_range(policy->min_target_bpp * 16, policy->max_target_bpp * 16,
0565             num_slices_h, dsc_common_caps, timing, &range)) {
0566         if (target_bandwidth_kbps >= range.stream_kbps) {
0567             if (policy->enable_dsc_when_not_needed)
0568                 /* enable max bpp even dsc is not needed */
0569                 *target_bpp_x16 = range.max_target_bpp_x16;
0570         } else if (target_bandwidth_kbps >= range.max_kbps) {
0571             /* use max target bpp allowed */
0572             *target_bpp_x16 = range.max_target_bpp_x16;
0573         } else if (target_bandwidth_kbps >= range.min_kbps) {
0574             /* use target bpp that can take entire target bandwidth */
0575             *target_bpp_x16 = compute_bpp_x16_from_target_bandwidth(
0576                     target_bandwidth_kbps, timing, num_slices_h,
0577                     dsc_common_caps->bpp_increment_div,
0578                     dsc_common_caps->is_dp);
0579         }
0580     }
0581 
0582     return *target_bpp_x16 != 0;
0583 }
0584 
0585 #define MIN_AVAILABLE_SLICES_SIZE  6
0586 
0587 static int get_available_dsc_slices(union dsc_enc_slice_caps slice_caps, int *available_slices)
0588 {
0589     int idx = 0;
0590 
0591     memset(available_slices, -1, MIN_AVAILABLE_SLICES_SIZE);
0592 
0593     if (slice_caps.bits.NUM_SLICES_1)
0594         available_slices[idx++] = 1;
0595 
0596     if (slice_caps.bits.NUM_SLICES_2)
0597         available_slices[idx++] = 2;
0598 
0599     if (slice_caps.bits.NUM_SLICES_4)
0600         available_slices[idx++] = 4;
0601 
0602     if (slice_caps.bits.NUM_SLICES_8)
0603         available_slices[idx++] = 8;
0604 
0605     return idx;
0606 }
0607 
0608 
0609 static int get_max_dsc_slices(union dsc_enc_slice_caps slice_caps)
0610 {
0611     int max_slices = 0;
0612     int available_slices[MIN_AVAILABLE_SLICES_SIZE];
0613     int end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]);
0614 
0615     if (end_idx > 0)
0616         max_slices = available_slices[end_idx - 1];
0617 
0618     return max_slices;
0619 }
0620 
0621 
0622 // Increment slice number in available slice numbers stops if possible, or just increment if not
0623 static int inc_num_slices(union dsc_enc_slice_caps slice_caps, int num_slices)
0624 {
0625     // Get next bigger num slices available in common caps
0626     int available_slices[MIN_AVAILABLE_SLICES_SIZE];
0627     int end_idx;
0628     int i;
0629     int new_num_slices = num_slices;
0630 
0631     end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]);
0632     if (end_idx == 0) {
0633         // No available slices found
0634         new_num_slices++;
0635         return new_num_slices;
0636     }
0637 
0638     // Numbers of slices found - get the next bigger number
0639     for (i = 0; i < end_idx; i++) {
0640         if (new_num_slices < available_slices[i]) {
0641             new_num_slices = available_slices[i];
0642             break;
0643         }
0644     }
0645 
0646     if (new_num_slices == num_slices) // No biger number of slices found
0647         new_num_slices++;
0648 
0649     return new_num_slices;
0650 }
0651 
0652 
0653 // Decrement slice number in available slice numbers stops if possible, or just decrement if not. Stop at zero.
0654 static int dec_num_slices(union dsc_enc_slice_caps slice_caps, int num_slices)
0655 {
0656     // Get next bigger num slices available in common caps
0657     int available_slices[MIN_AVAILABLE_SLICES_SIZE];
0658     int end_idx;
0659     int i;
0660     int new_num_slices = num_slices;
0661 
0662     end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]);
0663     if (end_idx == 0 && new_num_slices > 0) {
0664         // No numbers of slices found
0665         new_num_slices++;
0666         return new_num_slices;
0667     }
0668 
0669     // Numbers of slices found - get the next smaller number
0670     for (i = end_idx - 1; i >= 0; i--) {
0671         if (new_num_slices > available_slices[i]) {
0672             new_num_slices = available_slices[i];
0673             break;
0674         }
0675     }
0676 
0677     if (new_num_slices == num_slices) {
0678         // No smaller number of slices found
0679         new_num_slices--;
0680         if (new_num_slices < 0)
0681             new_num_slices = 0;
0682     }
0683 
0684     return new_num_slices;
0685 }
0686 
0687 
0688 // Choose next bigger number of slices if the requested number of slices is not available
0689 static int fit_num_slices_up(union dsc_enc_slice_caps slice_caps, int num_slices)
0690 {
0691     // Get next bigger num slices available in common caps
0692     int available_slices[MIN_AVAILABLE_SLICES_SIZE];
0693     int end_idx;
0694     int i;
0695     int new_num_slices = num_slices;
0696 
0697     end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]);
0698     if (end_idx == 0) {
0699         // No available slices found
0700         new_num_slices++;
0701         return new_num_slices;
0702     }
0703 
0704     // Numbers of slices found - get the equal or next bigger number
0705     for (i = 0; i < end_idx; i++) {
0706         if (new_num_slices <= available_slices[i]) {
0707             new_num_slices = available_slices[i];
0708             break;
0709         }
0710     }
0711 
0712     return new_num_slices;
0713 }
0714 
0715 
0716 /* Attempts to set DSC configuration for the stream, applying DSC policy.
0717  * Returns 'true' if successful or 'false' if not.
0718  *
0719  * Parameters:
0720  *
0721  * dsc_sink_caps       - DSC sink decoder capabilities (from DPCD)
0722  *
0723  * dsc_enc_caps        - DSC encoder capabilities
0724  *
0725  * target_bandwidth_kbps  - Target bandwidth to fit the stream into.
0726  *                          If 0, do not calculate target bpp.
0727  *
0728  * timing              - The stream timing to fit into 'target_bandwidth_kbps' or apply
0729  *                       maximum compression to, if 'target_badwidth == 0'
0730  *
0731  * dsc_cfg             - DSC configuration to use if it was possible to come up with
0732  *                       one for the given inputs.
0733  *                       The target bitrate after DSC can be calculated by multiplying
0734  *                       dsc_cfg.bits_per_pixel (in U6.4 format) by pixel rate, e.g.
0735  *
0736  *                       dsc_stream_bitrate_kbps = (int)ceil(timing->pix_clk_khz * dsc_cfg.bits_per_pixel / 16.0);
0737  */
0738 static bool setup_dsc_config(
0739         const struct dsc_dec_dpcd_caps *dsc_sink_caps,
0740         const struct dsc_enc_caps *dsc_enc_caps,
0741         int target_bandwidth_kbps,
0742         const struct dc_crtc_timing *timing,
0743         int min_slice_height_override,
0744         int max_dsc_target_bpp_limit_override_x16,
0745         struct dc_dsc_config *dsc_cfg)
0746 {
0747     struct dsc_enc_caps dsc_common_caps;
0748     int max_slices_h;
0749     int min_slices_h;
0750     int num_slices_h;
0751     int pic_width;
0752     int slice_width;
0753     int target_bpp;
0754     int sink_per_slice_throughput_mps;
0755     int branch_max_throughput_mps = 0;
0756     bool is_dsc_possible = false;
0757     int pic_height;
0758     int slice_height;
0759     struct dc_dsc_policy policy;
0760 
0761     memset(dsc_cfg, 0, sizeof(struct dc_dsc_config));
0762 
0763     dc_dsc_get_policy_for_timing(timing, max_dsc_target_bpp_limit_override_x16, &policy);
0764     pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right;
0765     pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom;
0766 
0767     if (!dsc_sink_caps->is_dsc_supported)
0768         goto done;
0769 
0770     if (dsc_sink_caps->branch_max_line_width && dsc_sink_caps->branch_max_line_width < pic_width)
0771         goto done;
0772 
0773     // Intersect decoder with encoder DSC caps and validate DSC settings
0774     is_dsc_possible = intersect_dsc_caps(dsc_sink_caps, dsc_enc_caps, timing->pixel_encoding, &dsc_common_caps);
0775     if (!is_dsc_possible)
0776         goto done;
0777 
0778     sink_per_slice_throughput_mps = 0;
0779 
0780     // Validate available DSC settings against the mode timing
0781 
0782     // Validate color format (and pick up the throughput values)
0783     dsc_cfg->ycbcr422_simple = false;
0784     switch (timing->pixel_encoding) {
0785     case PIXEL_ENCODING_RGB:
0786         is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.RGB;
0787         sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps;
0788         branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_0_mps;
0789         break;
0790     case PIXEL_ENCODING_YCBCR444:
0791         is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_444;
0792         sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps;
0793         branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_0_mps;
0794         break;
0795     case PIXEL_ENCODING_YCBCR422:
0796         is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_NATIVE_422;
0797         sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_1_mps;
0798         branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_1_mps;
0799         if (!is_dsc_possible) {
0800             is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_SIMPLE_422;
0801             dsc_cfg->ycbcr422_simple = is_dsc_possible;
0802             sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps;
0803         }
0804         break;
0805     case PIXEL_ENCODING_YCBCR420:
0806         is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_NATIVE_420;
0807         sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_1_mps;
0808         branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_1_mps;
0809         break;
0810     default:
0811         is_dsc_possible = false;
0812     }
0813 
0814     // Validate branch's maximum throughput
0815     if (branch_max_throughput_mps && dsc_div_by_10_round_up(timing->pix_clk_100hz) > branch_max_throughput_mps * 1000)
0816         is_dsc_possible = false;
0817 
0818     if (!is_dsc_possible)
0819         goto done;
0820 
0821     // Color depth
0822     switch (timing->display_color_depth) {
0823     case COLOR_DEPTH_888:
0824         is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_8_BPC;
0825         break;
0826     case COLOR_DEPTH_101010:
0827         is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_10_BPC;
0828         break;
0829     case COLOR_DEPTH_121212:
0830         is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_12_BPC;
0831         break;
0832     default:
0833         is_dsc_possible = false;
0834     }
0835 
0836     if (!is_dsc_possible)
0837         goto done;
0838 
0839     // Slice width (i.e. number of slices per line)
0840     max_slices_h = get_max_dsc_slices(dsc_common_caps.slice_caps);
0841 
0842     while (max_slices_h > 0) {
0843         if (pic_width % max_slices_h == 0)
0844             break;
0845 
0846         max_slices_h = dec_num_slices(dsc_common_caps.slice_caps, max_slices_h);
0847     }
0848 
0849     is_dsc_possible = (dsc_common_caps.max_slice_width > 0);
0850     if (!is_dsc_possible)
0851         goto done;
0852 
0853     min_slices_h = pic_width / dsc_common_caps.max_slice_width;
0854     if (pic_width % dsc_common_caps.max_slice_width)
0855         min_slices_h++;
0856 
0857     min_slices_h = fit_num_slices_up(dsc_common_caps.slice_caps, min_slices_h);
0858 
0859     while (min_slices_h <= max_slices_h) {
0860         int pix_clk_per_slice_khz = dsc_div_by_10_round_up(timing->pix_clk_100hz) / min_slices_h;
0861         if (pix_clk_per_slice_khz <= sink_per_slice_throughput_mps * 1000)
0862             break;
0863 
0864         min_slices_h = inc_num_slices(dsc_common_caps.slice_caps, min_slices_h);
0865     }
0866 
0867     is_dsc_possible = (min_slices_h <= max_slices_h);
0868 
0869     if (pic_width % min_slices_h != 0)
0870         min_slices_h = 0; // DSC TODO: Maybe try increasing the number of slices first?
0871 
0872     if (min_slices_h == 0 && max_slices_h == 0)
0873         is_dsc_possible = false;
0874 
0875     if (!is_dsc_possible)
0876         goto done;
0877 
0878     if (policy.use_min_slices_h) {
0879         if (min_slices_h > 0)
0880             num_slices_h = min_slices_h;
0881         else if (max_slices_h > 0) { // Fall back to max slices if min slices is not working out
0882             if (policy.max_slices_h)
0883                 num_slices_h = min(policy.max_slices_h, max_slices_h);
0884             else
0885                 num_slices_h = max_slices_h;
0886         } else
0887             is_dsc_possible = false;
0888     } else {
0889         if (max_slices_h > 0) {
0890             if (policy.max_slices_h)
0891                 num_slices_h = min(policy.max_slices_h, max_slices_h);
0892             else
0893                 num_slices_h = max_slices_h;
0894         } else if (min_slices_h > 0) // Fall back to min slices if max slices is not possible
0895             num_slices_h = min_slices_h;
0896         else
0897             is_dsc_possible = false;
0898     }
0899 
0900     if (!is_dsc_possible)
0901         goto done;
0902 
0903     dsc_cfg->num_slices_h = num_slices_h;
0904     slice_width = pic_width / num_slices_h;
0905 
0906     is_dsc_possible = slice_width <= dsc_common_caps.max_slice_width;
0907     if (!is_dsc_possible)
0908         goto done;
0909 
0910     // Slice height (i.e. number of slices per column): start with policy and pick the first one that height is divisible by.
0911     // For 4:2:0 make sure the slice height is divisible by 2 as well.
0912     if (min_slice_height_override == 0)
0913         slice_height = min(policy.min_slice_height, pic_height);
0914     else
0915         slice_height = min(min_slice_height_override, pic_height);
0916 
0917     while (slice_height < pic_height && (pic_height % slice_height != 0 ||
0918         (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420 && slice_height % 2 != 0)))
0919         slice_height++;
0920 
0921     if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420) // For the case when pic_height < dsc_policy.min_sice_height
0922         is_dsc_possible = (slice_height % 2 == 0);
0923 
0924     if (!is_dsc_possible)
0925         goto done;
0926 
0927     dsc_cfg->num_slices_v = pic_height/slice_height;
0928 
0929     if (target_bandwidth_kbps > 0) {
0930         is_dsc_possible = decide_dsc_target_bpp_x16(
0931                 &policy,
0932                 &dsc_common_caps,
0933                 target_bandwidth_kbps,
0934                 timing,
0935                 num_slices_h,
0936                 &target_bpp);
0937         dsc_cfg->bits_per_pixel = target_bpp;
0938     }
0939     if (!is_dsc_possible)
0940         goto done;
0941 
0942     // Final decission: can we do DSC or not?
0943     if (is_dsc_possible) {
0944         // Fill out the rest of DSC settings
0945         dsc_cfg->block_pred_enable = dsc_common_caps.is_block_pred_supported;
0946         dsc_cfg->linebuf_depth = dsc_common_caps.lb_bit_depth;
0947         dsc_cfg->version_minor = (dsc_common_caps.dsc_version & 0xf0) >> 4;
0948         dsc_cfg->is_dp = dsc_sink_caps->is_dp;
0949     }
0950 
0951 done:
0952     if (!is_dsc_possible)
0953         memset(dsc_cfg, 0, sizeof(struct dc_dsc_config));
0954 
0955     return is_dsc_possible;
0956 }
0957 
0958 bool dc_dsc_compute_config(
0959         const struct display_stream_compressor *dsc,
0960         const struct dsc_dec_dpcd_caps *dsc_sink_caps,
0961         uint32_t dsc_min_slice_height_override,
0962         uint32_t max_target_bpp_limit_override,
0963         uint32_t target_bandwidth_kbps,
0964         const struct dc_crtc_timing *timing,
0965         struct dc_dsc_config *dsc_cfg)
0966 {
0967     bool is_dsc_possible = false;
0968     struct dsc_enc_caps dsc_enc_caps;
0969 
0970     get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz);
0971     is_dsc_possible = setup_dsc_config(dsc_sink_caps,
0972         &dsc_enc_caps,
0973         target_bandwidth_kbps,
0974         timing, dsc_min_slice_height_override,
0975         max_target_bpp_limit_override * 16, dsc_cfg);
0976     return is_dsc_possible;
0977 }
0978 
0979 uint32_t dc_dsc_stream_bandwidth_in_kbps(const struct dc_crtc_timing *timing,
0980     uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp)
0981 {
0982     uint32_t overhead_in_kbps;
0983     struct fixed31_32 bpp;
0984     struct fixed31_32 actual_bandwidth_in_kbps;
0985 
0986     overhead_in_kbps = dc_dsc_stream_bandwidth_overhead_in_kbps(
0987         timing, num_slices_h, is_dp);
0988     bpp = dc_fixpt_from_fraction(bpp_x16, 16);
0989     actual_bandwidth_in_kbps = dc_fixpt_from_fraction(timing->pix_clk_100hz, 10);
0990     actual_bandwidth_in_kbps = dc_fixpt_mul(actual_bandwidth_in_kbps, bpp);
0991     actual_bandwidth_in_kbps = dc_fixpt_add_int(actual_bandwidth_in_kbps, overhead_in_kbps);
0992     return dc_fixpt_ceil(actual_bandwidth_in_kbps);
0993 }
0994 
0995 uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps(
0996         const struct dc_crtc_timing *timing,
0997         const int num_slices_h,
0998         const bool is_dp)
0999 {
1000     struct fixed31_32 max_dsc_overhead;
1001     struct fixed31_32 refresh_rate;
1002 
1003     if (dsc_policy_disable_dsc_stream_overhead || !is_dp)
1004         return 0;
1005 
1006     /* use target bpp that can take entire target bandwidth */
1007     refresh_rate = dc_fixpt_from_int(timing->pix_clk_100hz);
1008     refresh_rate = dc_fixpt_div_int(refresh_rate, timing->h_total);
1009     refresh_rate = dc_fixpt_div_int(refresh_rate, timing->v_total);
1010     refresh_rate = dc_fixpt_mul_int(refresh_rate, 100);
1011 
1012     max_dsc_overhead = dc_fixpt_from_int(num_slices_h);
1013     max_dsc_overhead = dc_fixpt_mul_int(max_dsc_overhead, timing->v_total);
1014     max_dsc_overhead = dc_fixpt_mul_int(max_dsc_overhead, 256);
1015     max_dsc_overhead = dc_fixpt_div_int(max_dsc_overhead, 1000);
1016     max_dsc_overhead = dc_fixpt_mul(max_dsc_overhead, refresh_rate);
1017 
1018     return dc_fixpt_ceil(max_dsc_overhead);
1019 }
1020 
1021 void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,
1022         uint32_t max_target_bpp_limit_override_x16,
1023         struct dc_dsc_policy *policy)
1024 {
1025     uint32_t bpc = 0;
1026 
1027     policy->min_target_bpp = 0;
1028     policy->max_target_bpp = 0;
1029 
1030     /* DSC Policy: Use minimum number of slices that fits the pixel clock */
1031     policy->use_min_slices_h = true;
1032 
1033     /* DSC Policy: Use max available slices
1034      * (in our case 4 for or 8, depending on the mode)
1035      */
1036     policy->max_slices_h = 0;
1037 
1038     /* DSC Policy: Use slice height recommended
1039      * by VESA DSC Spreadsheet user guide
1040      */
1041     policy->min_slice_height = 108;
1042 
1043     /* DSC Policy: follow DP specs with an internal upper limit to 16 bpp
1044      * for better interoperability
1045      */
1046     switch (timing->display_color_depth) {
1047     case COLOR_DEPTH_888:
1048         bpc = 8;
1049         break;
1050     case COLOR_DEPTH_101010:
1051         bpc = 10;
1052         break;
1053     case COLOR_DEPTH_121212:
1054         bpc = 12;
1055         break;
1056     default:
1057         return;
1058     }
1059     switch (timing->pixel_encoding) {
1060     case PIXEL_ENCODING_RGB:
1061     case PIXEL_ENCODING_YCBCR444:
1062     case PIXEL_ENCODING_YCBCR422: /* assume no YCbCr422 native support */
1063         /* DP specs limits to 8 */
1064         policy->min_target_bpp = 8;
1065         /* DP specs limits to 3 x bpc */
1066         policy->max_target_bpp = 3 * bpc;
1067         break;
1068     case PIXEL_ENCODING_YCBCR420:
1069         /* DP specs limits to 6 */
1070         policy->min_target_bpp = 6;
1071         /* DP specs limits to 1.5 x bpc assume bpc is an even number */
1072         policy->max_target_bpp = bpc * 3 / 2;
1073         break;
1074     default:
1075         return;
1076     }
1077 
1078     /* internal upper limit, default 16 bpp */
1079     if (policy->max_target_bpp > dsc_policy_max_target_bpp_limit)
1080         policy->max_target_bpp = dsc_policy_max_target_bpp_limit;
1081 
1082     /* apply override */
1083     if (max_target_bpp_limit_override_x16 && policy->max_target_bpp > max_target_bpp_limit_override_x16 / 16)
1084         policy->max_target_bpp = max_target_bpp_limit_override_x16 / 16;
1085 
1086     /* enable DSC when not needed, default false */
1087     if (dsc_policy_enable_dsc_when_not_needed)
1088         policy->enable_dsc_when_not_needed = dsc_policy_enable_dsc_when_not_needed;
1089     else
1090         policy->enable_dsc_when_not_needed = false;
1091 }
1092 
1093 void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit)
1094 {
1095     dsc_policy_max_target_bpp_limit = limit;
1096 }
1097 
1098 void dc_dsc_policy_set_enable_dsc_when_not_needed(bool enable)
1099 {
1100     dsc_policy_enable_dsc_when_not_needed = enable;
1101 }
1102 
1103 void dc_dsc_policy_set_disable_dsc_stream_overhead(bool disable)
1104 {
1105     dsc_policy_disable_dsc_stream_overhead = disable;
1106 }
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