display/dc/dm_helpers.h

0001 /*
0002  * Copyright 2012-15 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 /**
0027  * This file defines helper functions provided by the Display Manager to
0028  * Display Core.
0029  */
0030 #ifndef __DM_HELPERS__
0031 #define __DM_HELPERS__
0032
0033 #include "dc_types.h"
0034 #include "dc.h"
0035
0036 struct dp_mst_stream_allocation_table;
0037 struct aux_payload;
0038 enum aux_return_code_type;
0039
0040 /*
0041  * Allocate memory accessible by the GPU
0042  *
0043  * frame buffer allocations must be aligned to a 4096-byte boundary
0044  *
0045  * Returns virtual address, sets addr to physical address
0046  */
0047 void *dm_helpers_allocate_gpu_mem(
0048         struct dc_context *ctx,
0049         enum dc_gpu_mem_alloc_type type,
0050         size_t size,
0051         long long *addr);
0052
0053 /*
0054  * Free the GPU-accessible memory at the virtual address pvMem
0055  */
0056 void dm_helpers_free_gpu_mem(
0057         struct dc_context *ctx,
0058         enum dc_gpu_mem_alloc_type type,
0059         void *pvMem);
0060
0061 enum dc_edid_status dm_helpers_parse_edid_caps(
0062     struct dc_link *link,
0063     const struct dc_edid *edid,
0064     struct dc_edid_caps *edid_caps);
0065
0066
0067 /*
0068  * Update DP branch info
0069  */
0070 void dm_helpers_dp_update_branch_info(
0071         struct dc_context *ctx,
0072         const struct dc_link *link);
0073
0074 /*
0075  * Writes payload allocation table in immediate downstream device.
0076  */
0077 bool dm_helpers_dp_mst_write_payload_allocation_table(
0078         struct dc_context *ctx,
0079         const struct dc_stream_state *stream,
0080         struct dp_mst_stream_allocation_table *proposed_table,
0081         bool enable);
0082
0083 /*
0084  * poll pending down reply
0085  */
0086 void dm_helpers_dp_mst_poll_pending_down_reply(
0087     struct dc_context *ctx,
0088     const struct dc_link *link);
0089
0090 /*
0091  * Clear payload allocation table before enable MST DP link.
0092  */
0093 void dm_helpers_dp_mst_clear_payload_allocation_table(
0094     struct dc_context *ctx,
0095     const struct dc_link *link);
0096
0097 /*
0098  * Polls for ACT (allocation change trigger) handled and
0099  */
0100 enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger(
0101         struct dc_context *ctx,
0102         const struct dc_stream_state *stream);
0103 /*
0104  * Sends ALLOCATE_PAYLOAD message.
0105  */
0106 bool dm_helpers_dp_mst_send_payload_allocation(
0107         struct dc_context *ctx,
0108         const struct dc_stream_state *stream,
0109         bool enable);
0110
0111 bool dm_helpers_dp_mst_start_top_mgr(
0112         struct dc_context *ctx,
0113         const struct dc_link *link,
0114         bool boot);
0115
0116 bool dm_helpers_dp_mst_stop_top_mgr(
0117         struct dc_context *ctx,
0118         struct dc_link *link);
0119 /**
0120  * OS specific aux read callback.
0121  */
0122 bool dm_helpers_dp_read_dpcd(
0123         struct dc_context *ctx,
0124         const struct dc_link *link,
0125         uint32_t address,
0126         uint8_t *data,
0127         uint32_t size);
0128
0129 /**
0130  * OS specific aux write callback.
0131  */
0132 bool dm_helpers_dp_write_dpcd(
0133         struct dc_context *ctx,
0134         const struct dc_link *link,
0135         uint32_t address,
0136         const uint8_t *data,
0137         uint32_t size);
0138
0139 bool dm_helpers_submit_i2c(
0140         struct dc_context *ctx,
0141         const struct dc_link *link,
0142         struct i2c_command *cmd);
0143
0144 bool dm_helpers_dp_write_dsc_enable(
0145         struct dc_context *ctx,
0146         const struct dc_stream_state *stream,
0147         bool enable
0148 );
0149 bool dm_helpers_is_dp_sink_present(
0150         struct dc_link *link);
0151
0152 void dm_helpers_mst_enable_stream_features(const struct dc_stream_state *stream);
0153
0154 enum dc_edid_status dm_helpers_read_local_edid(
0155         struct dc_context *ctx,
0156         struct dc_link *link,
0157         struct dc_sink *sink);
0158
0159 void dm_set_dcn_clocks(
0160         struct dc_context *ctx,
0161         struct dc_clocks *clks);
0162
0163 void dm_helpers_enable_periodic_detection(struct dc_context *ctx, bool enable);
0164
0165 void dm_set_phyd32clk(struct dc_context *ctx, int freq_khz);
0166
0167 bool dm_helpers_dmub_outbox_interrupt_control(struct dc_context *ctx, bool enable);
0168
0169 void dm_helpers_smu_timeout(struct dc_context *ctx, unsigned int msg_id, unsigned int param, unsigned int timeout_us);
0170
0171 // 0x1 = Result_OK, 0xFE = Result_UnkmownCmd, 0x0 = Status_Busy
0172 #define IS_SMU_TIMEOUT(result) \
0173     (result == 0x0)
0174
0175 int dm_helper_dmub_aux_transfer_sync(
0176         struct dc_context *ctx,
0177         const struct dc_link *link,
0178         struct aux_payload *payload,
0179         enum aux_return_code_type *operation_result);
0180 enum set_config_status;
0181 int dm_helpers_dmub_set_config_sync(struct dc_context *ctx,
0182         const struct dc_link *link,
0183         struct set_config_cmd_payload *payload,
0184         enum set_config_status *operation_result);
0185
0186 enum dc_edid_status dm_helpers_get_sbios_edid(struct dc_link *link, struct dc_edid *edid);
0187
0188 #endif /* __DM_HELPERS__ */