dc/dcn32/dcn32_resource.h

0001 /*
0002  * Copyright 2020 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef _DCN32_RESOURCE_H_
0027 #define _DCN32_RESOURCE_H_
0028
0029 #include "core_types.h"
0030
0031 #define DCN3_2_DET_SEG_SIZE 64
0032 #define DCN3_2_MALL_MBLK_SIZE_BYTES 65536 // 64 * 1024
0033 #define DCN3_2_MBLK_WIDTH 128
0034 #define DCN3_2_MBLK_HEIGHT_4BPE 128
0035 #define DCN3_2_MBLK_HEIGHT_8BPE 64
0036
0037 #define TO_DCN32_RES_POOL(pool)\
0038     container_of(pool, struct dcn32_resource_pool, base)
0039
0040 extern struct _vcs_dpi_ip_params_st dcn3_2_ip;
0041 extern struct _vcs_dpi_soc_bounding_box_st dcn3_2_soc;
0042
0043 struct dcn32_resource_pool {
0044     struct resource_pool base;
0045 };
0046
0047 struct resource_pool *dcn32_create_resource_pool(
0048         const struct dc_init_data *init_data,
0049         struct dc *dc);
0050
0051 struct panel_cntl *dcn32_panel_cntl_create(
0052         const struct panel_cntl_init_data *init_data);
0053
0054 bool dcn32_acquire_post_bldn_3dlut(
0055         struct resource_context *res_ctx,
0056         const struct resource_pool *pool,
0057         int mpcc_id,
0058         struct dc_3dlut **lut,
0059         struct dc_transfer_func **shaper);
0060
0061 bool dcn32_release_post_bldn_3dlut(
0062         struct resource_context *res_ctx,
0063         const struct resource_pool *pool,
0064         struct dc_3dlut **lut,
0065         struct dc_transfer_func **shaper);
0066
0067 bool dcn32_remove_phantom_pipes(struct dc *dc,
0068         struct dc_state *context);
0069
0070 void dcn32_add_phantom_pipes(struct dc *dc,
0071         struct dc_state *context,
0072         display_e2e_pipe_params_st *pipes,
0073         unsigned int pipe_cnt,
0074         unsigned int index);
0075
0076 bool dcn32_validate_bandwidth(struct dc *dc,
0077         struct dc_state *context,
0078         bool fast_validate);
0079
0080 int dcn32_populate_dml_pipes_from_context(
0081     struct dc *dc, struct dc_state *context,
0082     display_e2e_pipe_params_st *pipes,
0083     bool fast_validate);
0084
0085 void dcn32_calculate_wm_and_dlg(
0086         struct dc *dc, struct dc_state *context,
0087         display_e2e_pipe_params_st *pipes,
0088         int pipe_cnt,
0089         int vlevel);
0090
0091 uint32_t dcn32_helper_calculate_num_ways_for_subvp
0092         (struct dc *dc,
0093         struct dc_state *context);
0094
0095 void dcn32_merge_pipes_for_subvp(struct dc *dc,
0096         struct dc_state *context);
0097
0098 bool dcn32_all_pipes_have_stream_and_plane(struct dc *dc,
0099         struct dc_state *context);
0100
0101 bool dcn32_subvp_in_use(struct dc *dc,
0102         struct dc_state *context);
0103
0104 bool dcn32_mpo_in_use(struct dc_state *context);
0105
0106 struct pipe_ctx *dcn32_acquire_idle_pipe_for_head_pipe_in_layer(
0107         struct dc_state *state,
0108         const struct resource_pool *pool,
0109         struct dc_stream_state *stream,
0110         struct pipe_ctx *head_pipe);
0111
0112 void dcn32_determine_det_override(struct dc_state *context, display_e2e_pipe_params_st *pipes,
0113         bool *is_pipe_split_expected, int pipe_cnt);
0114
0115 #endif /* _DCN32_RESOURCE_H_ */