dc/dcn31/dcn31_vpg.h

0001 /*
0002  * Copyright 2019 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef __DAL_DCN31_VPG_H__
0027 #define __DAL_DCN31_VPG_H__
0028
0029
0030 #define DCN31_VPG_FROM_VPG(vpg)\
0031     container_of(vpg, struct dcn31_vpg, base)
0032
0033 #define VPG_DCN31_REG_LIST(id) \
0034     SRI(VPG_GENERIC_STATUS, VPG, id), \
0035     SRI(VPG_GENERIC_PACKET_ACCESS_CTRL, VPG, id), \
0036     SRI(VPG_GENERIC_PACKET_DATA, VPG, id), \
0037     SRI(VPG_GSP_FRAME_UPDATE_CTRL, VPG, id), \
0038     SRI(VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG, id), \
0039     SRI(VPG_MEM_PWR, VPG, id)
0040
0041 struct dcn31_vpg_registers {
0042     uint32_t VPG_GENERIC_STATUS;
0043     uint32_t VPG_GENERIC_PACKET_ACCESS_CTRL;
0044     uint32_t VPG_GENERIC_PACKET_DATA;
0045     uint32_t VPG_GSP_FRAME_UPDATE_CTRL;
0046     uint32_t VPG_GSP_IMMEDIATE_UPDATE_CTRL;
0047     uint32_t VPG_MEM_PWR;
0048 };
0049
0050 #define DCN31_VPG_MASK_SH_LIST(mask_sh)\
0051     SE_SF(VPG0_VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_OCCURED, mask_sh),\
0052     SE_SF(VPG0_VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_CLR, mask_sh),\
0053     SE_SF(VPG0_VPG_GENERIC_PACKET_ACCESS_CTRL, VPG_GENERIC_DATA_INDEX, mask_sh),\
0054     SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE0, mask_sh),\
0055     SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE1, mask_sh),\
0056     SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE2, mask_sh),\
0057     SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE3, mask_sh),\
0058     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC0_FRAME_UPDATE, mask_sh),\
0059     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC1_FRAME_UPDATE, mask_sh),\
0060     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC2_FRAME_UPDATE, mask_sh),\
0061     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC3_FRAME_UPDATE, mask_sh),\
0062     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC4_FRAME_UPDATE, mask_sh),\
0063     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC5_FRAME_UPDATE, mask_sh),\
0064     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC6_FRAME_UPDATE, mask_sh),\
0065     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC7_FRAME_UPDATE, mask_sh),\
0066     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC8_FRAME_UPDATE, mask_sh),\
0067     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC9_FRAME_UPDATE, mask_sh),\
0068     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC10_FRAME_UPDATE, mask_sh),\
0069     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC11_FRAME_UPDATE, mask_sh),\
0070     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC12_FRAME_UPDATE, mask_sh),\
0071     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC13_FRAME_UPDATE, mask_sh),\
0072     SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC14_FRAME_UPDATE, mask_sh),\
0073     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC0_IMMEDIATE_UPDATE, mask_sh),\
0074     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC1_IMMEDIATE_UPDATE, mask_sh),\
0075     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC2_IMMEDIATE_UPDATE, mask_sh),\
0076     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC3_IMMEDIATE_UPDATE, mask_sh),\
0077     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC4_IMMEDIATE_UPDATE, mask_sh),\
0078     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC5_IMMEDIATE_UPDATE, mask_sh),\
0079     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC6_IMMEDIATE_UPDATE, mask_sh),\
0080     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC7_IMMEDIATE_UPDATE, mask_sh),\
0081     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC8_IMMEDIATE_UPDATE, mask_sh),\
0082     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC9_IMMEDIATE_UPDATE, mask_sh),\
0083     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC10_IMMEDIATE_UPDATE, mask_sh),\
0084     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC11_IMMEDIATE_UPDATE, mask_sh),\
0085     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC12_IMMEDIATE_UPDATE, mask_sh),\
0086     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC13_IMMEDIATE_UPDATE, mask_sh),\
0087     SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC14_IMMEDIATE_UPDATE, mask_sh),\
0088     SE_SF(VPG0_VPG_MEM_PWR, VPG_GSP_MEM_LIGHT_SLEEP_DIS, mask_sh),\
0089     SE_SF(VPG0_VPG_MEM_PWR, VPG_GSP_LIGHT_SLEEP_FORCE, mask_sh),\
0090     SE_SF(VPG0_VPG_MEM_PWR, VPG_GSP_MEM_PWR_STATE, mask_sh)
0091
0092 #define VPG_DCN31_REG_FIELD_LIST(type) \
0093     type VPG_GENERIC_CONFLICT_OCCURED;\
0094     type VPG_GENERIC_CONFLICT_CLR;\
0095     type VPG_GENERIC_DATA_INDEX;\
0096     type VPG_GENERIC_DATA_BYTE0;\
0097     type VPG_GENERIC_DATA_BYTE1;\
0098     type VPG_GENERIC_DATA_BYTE2;\
0099     type VPG_GENERIC_DATA_BYTE3;\
0100     type VPG_GENERIC0_FRAME_UPDATE;\
0101     type VPG_GENERIC1_FRAME_UPDATE;\
0102     type VPG_GENERIC2_FRAME_UPDATE;\
0103     type VPG_GENERIC3_FRAME_UPDATE;\
0104     type VPG_GENERIC4_FRAME_UPDATE;\
0105     type VPG_GENERIC5_FRAME_UPDATE;\
0106     type VPG_GENERIC6_FRAME_UPDATE;\
0107     type VPG_GENERIC7_FRAME_UPDATE;\
0108     type VPG_GENERIC8_FRAME_UPDATE;\
0109     type VPG_GENERIC9_FRAME_UPDATE;\
0110     type VPG_GENERIC10_FRAME_UPDATE;\
0111     type VPG_GENERIC11_FRAME_UPDATE;\
0112     type VPG_GENERIC12_FRAME_UPDATE;\
0113     type VPG_GENERIC13_FRAME_UPDATE;\
0114     type VPG_GENERIC14_FRAME_UPDATE;\
0115     type VPG_GENERIC0_IMMEDIATE_UPDATE;\
0116     type VPG_GENERIC1_IMMEDIATE_UPDATE;\
0117     type VPG_GENERIC2_IMMEDIATE_UPDATE;\
0118     type VPG_GENERIC3_IMMEDIATE_UPDATE;\
0119     type VPG_GENERIC4_IMMEDIATE_UPDATE;\
0120     type VPG_GENERIC5_IMMEDIATE_UPDATE;\
0121     type VPG_GENERIC6_IMMEDIATE_UPDATE;\
0122     type VPG_GENERIC7_IMMEDIATE_UPDATE;\
0123     type VPG_GENERIC8_IMMEDIATE_UPDATE;\
0124     type VPG_GENERIC9_IMMEDIATE_UPDATE;\
0125     type VPG_GENERIC10_IMMEDIATE_UPDATE;\
0126     type VPG_GENERIC11_IMMEDIATE_UPDATE;\
0127     type VPG_GENERIC12_IMMEDIATE_UPDATE;\
0128     type VPG_GENERIC13_IMMEDIATE_UPDATE;\
0129     type VPG_GENERIC14_IMMEDIATE_UPDATE;\
0130     type VPG_GSP_MEM_LIGHT_SLEEP_DIS;\
0131     type VPG_GSP_LIGHT_SLEEP_FORCE;\
0132     type VPG_GSP_MEM_PWR_STATE
0133
0134 struct dcn31_vpg_shift {
0135     VPG_DCN31_REG_FIELD_LIST(uint8_t);
0136 };
0137
0138 struct dcn31_vpg_mask {
0139     VPG_DCN31_REG_FIELD_LIST(uint32_t);
0140 };
0141
0142 struct dcn31_vpg {
0143     struct vpg base;
0144     const struct dcn31_vpg_registers *regs;
0145     const struct dcn31_vpg_shift *vpg_shift;
0146     const struct dcn31_vpg_mask *vpg_mask;
0147 };
0148
0149 void vpg31_poweron(
0150         struct vpg *vpg);
0151
0152 void vpg31_powerdown(
0153         struct vpg *vpg);
0154
0155 void vpg31_construct(struct dcn31_vpg *vpg31,
0156     struct dc_context *ctx,
0157     uint32_t inst,
0158     const struct dcn31_vpg_registers *vpg_regs,
0159     const struct dcn31_vpg_shift *vpg_shift,
0160     const struct dcn31_vpg_mask *vpg_mask);
0161
0162 #endif