dc/dcn31/dcn31_hwseq.h

0001 /*
0002 * Copyright 2016 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef __DC_HWSS_DCN31_H__
0027 #define __DC_HWSS_DCN31_H__
0028
0029 #include "hw_sequencer_private.h"
0030
0031 struct dc;
0032
0033 void dcn31_init_hw(struct dc *dc);
0034
0035 void dcn31_dsc_pg_control(
0036         struct dce_hwseq *hws,
0037         unsigned int dsc_inst,
0038         bool power_on);
0039
0040 void dcn31_enable_power_gating_plane(
0041     struct dce_hwseq *hws,
0042     bool enable);
0043
0044 void dcn31_update_info_frame(struct pipe_ctx *pipe_ctx);
0045
0046 void dcn31_z10_restore(const struct dc *dc);
0047 void dcn31_z10_save_init(struct dc *dc);
0048
0049 void dcn31_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
0050 int dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config);
0051 void dcn31_reset_hw_ctx_wrap(
0052         struct dc *dc,
0053         struct dc_state *context);
0054 bool dcn31_is_abm_supported(struct dc *dc,
0055         struct dc_state *context, struct dc_stream_state *stream);
0056 void dcn31_init_pipes(struct dc *dc, struct dc_state *context);
0057 void dcn31_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable);
0058
0059 #endif /* __DC_HWSS_DCN31_H__ */