dc/dcn301/dcn301_panel_cntl.c

0001 /*
0002  * Copyright 2020 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #include "reg_helper.h"
0027 #include "core_types.h"
0028 #include "dc_dmub_srv.h"
0029 #include "dcn301_panel_cntl.h"
0030 #include "atom.h"
0031
0032 #define TO_DCN301_PANEL_CNTL(panel_cntl)\
0033     container_of(panel_cntl, struct dcn301_panel_cntl, base)
0034
0035 #define CTX \
0036     dcn301_panel_cntl->base.ctx
0037
0038 #define DC_LOGGER \
0039     dcn301_panel_cntl->base.ctx->logger
0040
0041 #define REG(reg)\
0042     dcn301_panel_cntl->regs->reg
0043
0044 #undef FN
0045 #define FN(reg_name, field_name) \
0046     dcn301_panel_cntl->shift->field_name, dcn301_panel_cntl->mask->field_name
0047
0048 static unsigned int dcn301_get_16_bit_backlight_from_pwm(struct panel_cntl *panel_cntl)
0049 {
0050     uint64_t current_backlight;
0051     uint32_t round_result;
0052     uint32_t bl_period, bl_int_count;
0053     uint32_t bl_pwm, fractional_duty_cycle_en;
0054     uint32_t bl_period_mask, bl_pwm_mask;
0055     struct dcn301_panel_cntl *dcn301_panel_cntl = TO_DCN301_PANEL_CNTL(panel_cntl);
0056
0057     REG_GET(BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD, &bl_period);
0058     REG_GET(BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD_BITCNT, &bl_int_count);
0059
0060     REG_GET(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, &bl_pwm);
0061     REG_GET(BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN, &fractional_duty_cycle_en);
0062
0063     if (bl_int_count == 0)
0064         bl_int_count = 16;
0065
0066     bl_period_mask = (1 << bl_int_count) - 1;
0067     bl_period &= bl_period_mask;
0068
0069     bl_pwm_mask = bl_period_mask << (16 - bl_int_count);
0070
0071     if (fractional_duty_cycle_en == 0)
0072         bl_pwm &= bl_pwm_mask;
0073     else
0074         bl_pwm &= 0xFFFF;
0075
0076     current_backlight = (uint64_t)bl_pwm << (1 + bl_int_count);
0077
0078     if (bl_period == 0)
0079         bl_period = 0xFFFF;
0080
0081     current_backlight = div_u64(current_backlight, bl_period);
0082     current_backlight = (current_backlight + 1) >> 1;
0083
0084     current_backlight = (uint64_t)(current_backlight) * bl_period;
0085
0086     round_result = (uint32_t)(current_backlight & 0xFFFFFFFF);
0087
0088     round_result = (round_result >> (bl_int_count-1)) & 1;
0089
0090     current_backlight >>= bl_int_count;
0091     current_backlight += round_result;
0092
0093     return (uint32_t)(current_backlight);
0094 }
0095
0096 static uint32_t dcn301_panel_cntl_hw_init(struct panel_cntl *panel_cntl)
0097 {
0098     struct dcn301_panel_cntl *dcn301_panel_cntl = TO_DCN301_PANEL_CNTL(panel_cntl);
0099     uint32_t value;
0100     uint32_t current_backlight;
0101
0102     /* It must not be 0, so we have to restore them
0103      * Bios bug w/a - period resets to zero,
0104      * restoring to cache values which is always correct
0105      */
0106     REG_GET(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, &value);
0107
0108     if (value == 0 || value == 1) {
0109         if (panel_cntl->stored_backlight_registers.BL_PWM_CNTL != 0) {
0110             REG_WRITE(BL_PWM_CNTL,
0111                     panel_cntl->stored_backlight_registers.BL_PWM_CNTL);
0112             REG_WRITE(BL_PWM_CNTL2,
0113                     panel_cntl->stored_backlight_registers.BL_PWM_CNTL2);
0114             REG_WRITE(BL_PWM_PERIOD_CNTL,
0115                     panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL);
0116             REG_UPDATE(PWRSEQ_REF_DIV,
0117                 BL_PWM_REF_DIV,
0118                 panel_cntl->stored_backlight_registers.LVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV);
0119         } else {
0120             /* TODO: Note: This should not really happen since VBIOS
0121              * should have initialized PWM registers on boot.
0122              */
0123             REG_WRITE(BL_PWM_CNTL, 0xC000FA00);
0124             REG_WRITE(BL_PWM_PERIOD_CNTL, 0x000C0FA0);
0125         }
0126     } else {
0127         panel_cntl->stored_backlight_registers.BL_PWM_CNTL =
0128                 REG_READ(BL_PWM_CNTL);
0129         panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 =
0130                 REG_READ(BL_PWM_CNTL2);
0131         panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL =
0132                 REG_READ(BL_PWM_PERIOD_CNTL);
0133
0134         REG_GET(PWRSEQ_REF_DIV, BL_PWM_REF_DIV,
0135                 &panel_cntl->stored_backlight_registers.LVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV);
0136     }
0137
0138     // Enable the backlight output
0139     REG_UPDATE(BL_PWM_CNTL, BL_PWM_EN, 1);
0140
0141     // Unlock group 2 backlight registers
0142     REG_UPDATE(BL_PWM_GRP1_REG_LOCK,
0143             BL_PWM_GRP1_REG_LOCK, 0);
0144
0145     current_backlight = dcn301_get_16_bit_backlight_from_pwm(panel_cntl);
0146
0147     return current_backlight;
0148 }
0149
0150 static void dcn301_panel_cntl_destroy(struct panel_cntl **panel_cntl)
0151 {
0152     struct dcn301_panel_cntl *dcn301_panel_cntl = TO_DCN301_PANEL_CNTL(*panel_cntl);
0153
0154     kfree(dcn301_panel_cntl);
0155     *panel_cntl = NULL;
0156 }
0157
0158 static bool dcn301_is_panel_backlight_on(struct panel_cntl *panel_cntl)
0159 {
0160     struct dcn301_panel_cntl *dcn301_panel_cntl = TO_DCN301_PANEL_CNTL(panel_cntl);
0161     uint32_t value;
0162
0163     REG_GET(PWRSEQ_CNTL, PANEL_BLON, &value);
0164
0165     return value;
0166 }
0167
0168 static bool dcn301_is_panel_powered_on(struct panel_cntl *panel_cntl)
0169 {
0170     struct dcn301_panel_cntl *dcn301_panel_cntl = TO_DCN301_PANEL_CNTL(panel_cntl);
0171     uint32_t pwr_seq_state, dig_on, dig_on_ovrd;
0172
0173     REG_GET(PWRSEQ_STATE, PANEL_PWRSEQ_TARGET_STATE_R, &pwr_seq_state);
0174
0175     REG_GET_2(PWRSEQ_CNTL, PANEL_DIGON, &dig_on, PANEL_DIGON_OVRD, &dig_on_ovrd);
0176
0177     return (pwr_seq_state == 1) || (dig_on == 1 && dig_on_ovrd == 1);
0178 }
0179
0180 static void dcn301_store_backlight_level(struct panel_cntl *panel_cntl)
0181 {
0182     struct dcn301_panel_cntl *dcn301_panel_cntl = TO_DCN301_PANEL_CNTL(panel_cntl);
0183
0184     panel_cntl->stored_backlight_registers.BL_PWM_CNTL =
0185         REG_READ(BL_PWM_CNTL);
0186     panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 =
0187         REG_READ(BL_PWM_CNTL2);
0188     panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL =
0189         REG_READ(BL_PWM_PERIOD_CNTL);
0190
0191     REG_GET(PWRSEQ_REF_DIV, BL_PWM_REF_DIV,
0192         &panel_cntl->stored_backlight_registers.LVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV);
0193 }
0194
0195 static const struct panel_cntl_funcs dcn301_link_panel_cntl_funcs = {
0196     .destroy = dcn301_panel_cntl_destroy,
0197     .hw_init = dcn301_panel_cntl_hw_init,
0198     .is_panel_backlight_on = dcn301_is_panel_backlight_on,
0199     .is_panel_powered_on = dcn301_is_panel_powered_on,
0200     .store_backlight_level = dcn301_store_backlight_level,
0201     .get_current_backlight = dcn301_get_16_bit_backlight_from_pwm,
0202 };
0203
0204 void dcn301_panel_cntl_construct(
0205     struct dcn301_panel_cntl *dcn301_panel_cntl,
0206     const struct panel_cntl_init_data *init_data,
0207     const struct dce_panel_cntl_registers *regs,
0208     const struct dcn301_panel_cntl_shift *shift,
0209     const struct dcn301_panel_cntl_mask *mask)
0210 {
0211     dcn301_panel_cntl->regs = regs;
0212     dcn301_panel_cntl->shift = shift;
0213     dcn301_panel_cntl->mask = mask;
0214
0215     dcn301_panel_cntl->base.funcs = &dcn301_link_panel_cntl_funcs;
0216     dcn301_panel_cntl->base.ctx = init_data->ctx;
0217     dcn301_panel_cntl->base.inst = init_data->inst;
0218 }