dc/dcn30/dcn30_resource.h

0001 /*
0002  * Copyright 2020 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef _DCN30_RESOURCE_H_
0027 #define _DCN30_RESOURCE_H_
0028
0029 #include "core_types.h"
0030
0031 #define TO_DCN30_RES_POOL(pool)\
0032     container_of(pool, struct dcn30_resource_pool, base)
0033
0034 struct dc;
0035 struct resource_pool;
0036 struct _vcs_dpi_display_pipe_params_st;
0037
0038 extern struct _vcs_dpi_ip_params_st dcn3_0_ip;
0039 extern struct _vcs_dpi_soc_bounding_box_st dcn3_0_soc;
0040
0041 struct dcn30_resource_pool {
0042     struct resource_pool base;
0043 };
0044 struct resource_pool *dcn30_create_resource_pool(
0045         const struct dc_init_data *init_data,
0046         struct dc *dc);
0047
0048 void dcn30_set_mcif_arb_params(
0049         struct dc *dc,
0050         struct dc_state *context,
0051         display_e2e_pipe_params_st *pipes,
0052         int pipe_cnt);
0053
0054 unsigned int dcn30_calc_max_scaled_time(
0055         unsigned int time_per_pixel,
0056         enum mmhubbub_wbif_mode mode,
0057         unsigned int urgent_watermark);
0058
0059 bool dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context,
0060         bool fast_validate);
0061 bool dcn30_internal_validate_bw(
0062         struct dc *dc,
0063         struct dc_state *context,
0064         display_e2e_pipe_params_st *pipes,
0065         int *pipe_cnt_out,
0066         int *vlevel_out,
0067         bool fast_validate);
0068 void dcn30_calculate_wm_and_dlg(
0069         struct dc *dc, struct dc_state *context,
0070         display_e2e_pipe_params_st *pipes,
0071         int pipe_cnt,
0072         int vlevel);
0073 void dcn30_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
0074 void dcn30_populate_dml_writeback_from_context(
0075         struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
0076
0077 int dcn30_populate_dml_pipes_from_context(
0078     struct dc *dc, struct dc_state *context,
0079     display_e2e_pipe_params_st *pipes,
0080     bool fast_validate);
0081
0082 bool dcn30_acquire_post_bldn_3dlut(
0083         struct resource_context *res_ctx,
0084         const struct resource_pool *pool,
0085         int mpcc_id,
0086         struct dc_3dlut **lut,
0087         struct dc_transfer_func **shaper);
0088
0089 bool dcn30_release_post_bldn_3dlut(
0090         struct resource_context *res_ctx,
0091         const struct resource_pool *pool,
0092         struct dc_3dlut **lut,
0093         struct dc_transfer_func **shaper);
0094
0095 enum dc_status dcn30_add_stream_to_ctx(
0096         struct dc *dc,
0097         struct dc_state *new_ctx,
0098         struct dc_stream_state *dc_stream);
0099
0100 void dcn30_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
0101
0102 bool dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context);
0103 void dcn30_setup_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context);
0104 int dcn30_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, struct dc_state *context,
0105         display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel);
0106
0107 #endif /* _DCN30_RESOURCE_H_ */