dc/dcn30/dcn30_hwseq.h

0001 /*
0002 * Copyright 2020 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef __DC_HWSS_DCN30_H__
0027 #define __DC_HWSS_DCN30_H__
0028
0029 #include "hw_sequencer_private.h"
0030 #include "dcn20/dcn20_hwseq.h"
0031 struct dc;
0032
0033 void dcn30_init_hw(struct dc *dc);
0034 void dcn30_program_all_writeback_pipes_in_tree(
0035         struct dc *dc,
0036         const struct dc_stream_state *stream,
0037         struct dc_state *context);
0038 void dcn30_update_writeback(
0039         struct dc *dc,
0040         struct dc_writeback_info *wb_info,
0041         struct dc_state *context);
0042 void dcn30_enable_writeback(
0043         struct dc *dc,
0044         struct dc_writeback_info *wb_info,
0045         struct dc_state *context);
0046 void dcn30_disable_writeback(
0047         struct dc *dc,
0048         unsigned int dwb_pipe_inst);
0049
0050 bool dcn30_mmhubbub_warmup(
0051     struct dc *dc,
0052     unsigned int num_dwb,
0053     struct dc_writeback_info *wb_info);
0054
0055 bool dcn30_set_blend_lut(struct pipe_ctx *pipe_ctx,
0056         const struct dc_plane_state *plane_state);
0057
0058 bool dcn30_set_input_transfer_func(struct dc *dc,
0059                 struct pipe_ctx *pipe_ctx,
0060                 const struct dc_plane_state *plane_state);
0061 bool dcn30_set_output_transfer_func(struct dc *dc,
0062                 struct pipe_ctx *pipe_ctx,
0063                 const struct dc_stream_state *stream);
0064 void dcn30_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
0065 void dcn30_update_info_frame(struct pipe_ctx *pipe_ctx);
0066 void dcn30_program_dmdata_engine(struct pipe_ctx *pipe_ctx);
0067
0068 bool dcn30_does_plane_fit_in_mall(struct dc *dc, struct dc_plane_state *plane,
0069         struct dc_cursor_attributes *cursor_attr);
0070
0071 bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable);
0072
0073 void dcn30_hardware_release(struct dc *dc);
0074
0075 void dcn30_set_disp_pattern_generator(const struct dc *dc,
0076         struct pipe_ctx *pipe_ctx,
0077         enum controller_dp_test_pattern test_pattern,
0078         enum controller_dp_color_space color_space,
0079         enum dc_color_depth color_depth,
0080         const struct tg_color *solid_color,
0081         int width, int height, int offset);
0082
0083 void dcn30_set_hubp_blank(const struct dc *dc,
0084         struct pipe_ctx *pipe_ctx,
0085         bool blank_enable);
0086
0087 void dcn30_prepare_bandwidth(struct dc *dc,
0088     struct dc_state *context);
0089
0090
0091 #endif /* __DC_HWSS_DCN30_H__ */