dc/dcn30/dcn30_dccg.c

0001 /*
0002  * Copyright 2020 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #include "reg_helper.h"
0027 #include "core_types.h"
0028 #include "dcn30_dccg.h"
0029
0030 #define TO_DCN_DCCG(dccg)\
0031     container_of(dccg, struct dcn_dccg, base)
0032
0033 #define REG(reg) \
0034     (dccg_dcn->regs->reg)
0035
0036 #undef FN
0037 #define FN(reg_name, field_name) \
0038     dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
0039
0040 #define CTX \
0041     dccg_dcn->base.ctx
0042 #define DC_LOGGER \
0043     dccg->ctx->logger
0044
0045
0046 static const struct dccg_funcs dccg3_funcs = {
0047     .update_dpp_dto = dccg2_update_dpp_dto,
0048     .get_dccg_ref_freq = dccg2_get_dccg_ref_freq,
0049     .set_fifo_errdet_ovr_en = dccg2_set_fifo_errdet_ovr_en,
0050     .otg_add_pixel = dccg2_otg_add_pixel,
0051     .otg_drop_pixel = dccg2_otg_drop_pixel,
0052     .dccg_init = dccg2_init
0053 };
0054
0055 struct dccg *dccg3_create(
0056     struct dc_context *ctx,
0057     const struct dccg_registers *regs,
0058     const struct dccg_shift *dccg_shift,
0059     const struct dccg_mask *dccg_mask)
0060 {
0061     struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL);
0062     struct dccg *base;
0063
0064     if (dccg_dcn == NULL) {
0065         BREAK_TO_DEBUGGER();
0066         return NULL;
0067     }
0068
0069     base = &dccg_dcn->base;
0070     base->ctx = ctx;
0071     base->funcs = &dccg3_funcs;
0072
0073     dccg_dcn->regs = regs;
0074     dccg_dcn->dccg_shift = dccg_shift;
0075     dccg_dcn->dccg_mask = dccg_mask;
0076
0077     return &dccg_dcn->base;
0078 }
0079
0080 struct dccg *dccg30_create(
0081     struct dc_context *ctx,
0082     const struct dccg_registers *regs,
0083     const struct dccg_shift *dccg_shift,
0084     const struct dccg_mask *dccg_mask)
0085 {
0086     struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL);
0087     struct dccg *base;
0088
0089     if (dccg_dcn == NULL) {
0090         BREAK_TO_DEBUGGER();
0091         return NULL;
0092     }
0093
0094     base = &dccg_dcn->base;
0095     base->ctx = ctx;
0096     base->funcs = &dccg3_funcs;
0097
0098     dccg_dcn->regs = regs;
0099     dccg_dcn->dccg_shift = dccg_shift;
0100     dccg_dcn->dccg_mask = dccg_mask;
0101
0102     return &dccg_dcn->base;
0103 }